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[ 4 / 4 ] Application profile is long enough (311.52 s)
To have good quality measurements, it is advised that the application profiling time is greater than 10 seconds.
[ 3.00 / 3 ] Most of time spent in analyzed modules comes from functions compiled with -g and -fno-omit-frame-pointer
-g option gives access to debugging informations, such are source locations. -fno-omit-frame-pointer improve the accuracy of callchains found during the application profiling.
[ 3 / 3 ] Optimization level option is correctly used
[ 3 / 3 ] Host configuration allows retrieval of all necessary metrics.
[ 0 / 3 ] Compilation of some functions is not optimized for the target processor
Architecture specific options are needed to produce efficient code for a specific processor ( -x(target) or -ax(target) ). Application run on the SKYLAKE micro-architecture while the code was specialized for skylake-avx512.
[ 2 / 2 ] Application is correctly profiled ("Others" category represents 0.00 % of the execution time)
To have a representative profiling, it is advised that the category "Others" represents less than 20% of the execution time in order to analyze as much as possible of the user code
[ 1 / 1 ] Lstopo present. The Topology lstopo report will be generated.
[ 4 / 4 ] Enough time of the experiment time spent in analyzed loops (97.66%)
If the time spent in analyzed loops is less than 30%, standard loop optimizations will have a limited impact on application performances.
[ 4 / 4 ] CPU activity is good
CPU cores are active 98.99% of time
[ 4 / 4 ] Threads activity is good
On average, more than 98.99% of observed threads are actually active
[ 4 / 4 ] Affinity is good (99.98%)
Threads are not migrating to CPU cores: probably successfully pinned
[ 4 / 4 ] Loop profile is not flat
At least one loop coverage is greater than 4% (47.25%), representing an hotspot for the application
[ 4 / 4 ] Enough time of the experiment time spent in analyzed innermost loops (97.66%)
If the time spent in analyzed innermost loops is less than 15%, standard innermost loop optimizations such as vectorisation will have a limited impact on application performances.
[ 3 / 3 ] Cumulative Outermost/In between loops coverage (0.00%) lower than cumulative innermost loop coverage (97.66%)
Having cumulative Outermost/In between loops coverage greater than cumulative innermost loop coverage will make loop optimization more complex
[ 3 / 3 ] Less than 10% (0.00%) is spend in BLAS1 operations
It could be more efficient to inline by hand BLAS1 operations
[ 2 / 2 ] Less than 10% (0.00%) is spend in BLAS2 operations
BLAS2 calls usually could make a poor cache usage and could benefit from inlining.
[ 2 / 2 ] Less than 10% (0.00%) is spend in Libm/SVML (special functions)
| Loop ID | Analysis | Penalty Score |
|---|---|---|
| ►Loop 1318 - bench | Execution Time: 47 % - Vectorization Ratio: 100.00 % - Vector Length Use: 45.93 % | |
| ►Data Access Issues | 55 | |
| ○ | [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange or use gather instructions to lower a bit the cost. There are 4 issues ( = data accesses) costing 2 point each. | 8 |
| ○ | [SA] Presence of special instructions executing on a single port (INSERT/EXTRACT, SHUFFLE/PERM) - Simplify data access and try to get stride 1 access. There are 47 issues (= instructions) costing 1 point each. | 47 |
| ►Vectorization Roadblocks | 8 | |
| ○ | [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange or use gather instructions to lower a bit the cost. There are 4 issues ( = data accesses) costing 2 point each. | 8 |
| ►Inefficient Vectorization | 47 | |
| ○ | [SA] Presence of special instructions executing on a single port (INSERT/EXTRACT, SHUFFLE/PERM) - Simplify data access and try to get stride 1 access. There are 47 issues (= instructions) costing 1 point each. | 47 |
| ►Loop 1643 - bench | Execution Time: 25 % - Vectorization Ratio: 100.00 % - Vector Length Use: 93.59 % | |
| ►Data Access Issues | 60 | |
| ○ | [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange or use gather instructions to lower a bit the cost. There are 4 issues ( = data accesses) costing 2 point each. | 8 |
| ○ | [SA] Inefficient vectorization: more than 10% of the vector loads instructions are unaligned - When allocating arrays, don’t forget to align them. There are 0 issues ( = arrays) costing 2 points each | 0 |
| ○ | [SA] Presence of special instructions executing on a single port (BLEND/MERGE, SHUFFLE/PERM, BROADCAST) - Simplify data access and try to get stride 1 access. There are 52 issues (= instructions) costing 1 point each. | 52 |
| ►Vectorization Roadblocks | 8 | |
| ○ | [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange or use gather instructions to lower a bit the cost. There are 4 issues ( = data accesses) costing 2 point each. | 8 |
| ►Inefficient Vectorization | 52 | |
| ○ | [SA] Presence of special instructions executing on a single port (BLEND/MERGE, SHUFFLE/PERM, BROADCAST) - Simplify data access and try to get stride 1 access. There are 52 issues (= instructions) costing 1 point each. | 52 |
| ►Loop 1703 - bench | Execution Time: 23 % - Vectorization Ratio: 100.00 % - Vector Length Use: 93.00 % | |
| ►Data Access Issues | 32 | |
| ○ | [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange or use gather instructions to lower a bit the cost. There are 4 issues ( = data accesses) costing 2 point each. | 8 |
| ○ | [SA] Inefficient vectorization: more than 10% of the vector loads instructions are unaligned - When allocating arrays, don’t forget to align them. There are 0 issues ( = arrays) costing 2 points each | 0 |
| ○ | [SA] Presence of special instructions executing on a single port (BLEND/MERGE, SHUFFLE/PERM, BROADCAST) - Simplify data access and try to get stride 1 access. There are 24 issues (= instructions) costing 1 point each. | 24 |
| ►Vectorization Roadblocks | 8 | |
| ○ | [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange or use gather instructions to lower a bit the cost. There are 4 issues ( = data accesses) costing 2 point each. | 8 |
| ►Inefficient Vectorization | 24 | |
| ○ | [SA] Presence of special instructions executing on a single port (BLEND/MERGE, SHUFFLE/PERM, BROADCAST) - Simplify data access and try to get stride 1 access. There are 24 issues (= instructions) costing 1 point each. | 24 |
| ►Loop 404 - bench | Execution Time: 0 % - Vectorization Ratio: 0.00 % - Vector Length Use: 12.50 % | |
| ►Control Flow Issues | 1 | |
| ○ | [SA] Presence of calls - Inline either by compiler or by hand and use SVML for libm calls. There are 1 issues (= calls) costing 1 point each. | 1 |
| ►Data Access Issues | 4 | |
| ○ | [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange or use gather instructions to lower a bit the cost. There are 1 issues ( = data accesses) costing 2 point each. | 2 |
| ○ | [SA] More than 20% of the loads are accessing the stack - Perform loop splitting to decrease pressure on registers. This issue costs 2 points. | 2 |
| ►Vectorization Roadblocks | 3 | |
| ○ | [SA] Presence of calls - Inline either by compiler or by hand and use SVML for libm calls. There are 1 issues (= calls) costing 1 point each. | 1 |
| ○ | [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange or use gather instructions to lower a bit the cost. There are 1 issues ( = data accesses) costing 2 point each. | 2 |
| ►Loop 367 - bench | Execution Time: 0 % - Vectorization Ratio: 0.00 % - Vector Length Use: 12.50 % | |
| ►Control Flow Issues | 1 | |
| ○ | [SA] Presence of calls - Inline either by compiler or by hand and use SVML for libm calls. There are 1 issues (= calls) costing 1 point each. | 1 |
| ►Data Access Issues | 2 | |
| ○ | [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange or use gather instructions to lower a bit the cost. There are 1 issues ( = data accesses) costing 2 point each. | 2 |
| ►Vectorization Roadblocks | 3 | |
| ○ | [SA] Presence of calls - Inline either by compiler or by hand and use SVML for libm calls. There are 1 issues (= calls) costing 1 point each. | 1 |
| ○ | [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange or use gather instructions to lower a bit the cost. There are 1 issues ( = data accesses) costing 2 point each. | 2 |