Loop Id: 40 | Module: exec | Source: NonLocalPP.hpp:131-132 [...] | Coverage: 0.01% |
---|
Loop Id: 40 | Module: exec | Source: NonLocalPP.hpp:131-132 [...] | Coverage: 0.01% |
---|
0x20b820 MOV (%R10),%RDX [10] |
0x20b823 MOV (%R14),%RSI [4] |
0x20b826 MOV -0x10(%R14),%R8 [4] |
0x20b82a VMOVSD (%R15,%RAX,1),%XMM0 [5] |
0x20b830 INC %RCX |
0x20b833 VMOVDDUP (%RDX,%R12,8),%XMM1 [1] |
0x20b839 SAL $0x20,%R8 |
0x20b83d LEA (%RSI,%R12,8),%RDI |
0x20b841 VMOVSD (%RSI,%R12,8),%XMM2 [11] |
0x20b847 LEA (%RBX,%RBX,2),%RSI |
0x20b84b MOV %R8,%RDX |
0x20b84e SAR $0x1d,%RDX |
0x20b852 SAR $0x1c,%R8 |
0x20b856 VMOVHPD (%RDX,%RDI,1),%XMM2,%XMM2 [9] |
0x20b85b MOV 0x40(%R9),%RDX [2] |
0x20b85f VFMADD213SD (%R8,%RDI,1),%XMM1,%XMM0 [6] |
0x20b865 VFMADD231PD -0x10(%R15,%RAX,1),%XMM1,%XMM2 [5] |
0x20b86c VADDSD 0x10(%RDX,%RSI,8),%XMM0,%XMM0 [8] |
0x20b872 VADDPD (%RDX,%RSI,8),%XMM2,%XMM1 [8] |
0x20b877 MOV -0xc0(%RBP),%RDX [12] |
0x20b87e VMOVUPD %XMM1,-0x10(%RDX,%RAX,1) [7] |
0x20b884 VMOVSD %XMM0,(%RDX,%RAX,1) [7] |
0x20b889 ADD $0x18,%RAX |
0x20b88d MOV 0x2830(%R13),%RDX [3] |
0x20b894 SUB 0x2828(%R13),%RDX [3] |
0x20b89b SHR $0x3,%RDX |
0x20b89f IMUL $-0x55555555,%EDX,%EDX |
0x20b8a5 MOVSXD %EDX,%RDX |
0x20b8a8 CMP %RDX,%RCX |
0x20b8ab JL 20b820 |
/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/VectorSoAContainer.h: 231 - 231 |
-------------------------------------------------------------------------------- |
231: inline const AoSElement_t operator[](size_t i) const { return AoSElement_t(myData + i, nGhosts); } |
/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVector.h: 144 - 145 |
-------------------------------------------------------------------------------- |
144: for (int i = 0; i < D; ++i) |
145: X[i] = base[i * offset]; |
/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 229 - 229 |
-------------------------------------------------------------------------------- |
229: return X[i]; |
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h: 919 - 1046 |
-------------------------------------------------------------------------------- |
919: { return size_type(this->_M_impl._M_finish - this->_M_impl._M_start); } |
[...] |
1046: return *(this->_M_impl._M_start + __n); |
/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h: 43 - 63 |
-------------------------------------------------------------------------------- |
43: return (a + b); |
[...] |
63: return (a * b); |
/beegfs/hackathon/users/eoseret/qaas_runs/170-855-3059/intel/miniqmc/build/miniqmc/src/Drivers/NonLocalPP.hpp: 131 - 132 |
-------------------------------------------------------------------------------- |
131: for (int k = 0; k < size(); k++) |
132: virtualPos[k] = dist[iat] * rOnSphere[k] + displ[iat] + els.R[jel]; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.13 |
CQA speedup if FP arith vectorized | 1.45 |
CQA speedup if fully vectorized | 3.68 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.17 |
Bottlenecks | P5, P6, P7, |
Function | .omp_outlined..64 |
Source | VectorSoAContainer.h:231-231,TinyVector.h:144-145,OhmmsVector.h:229-229,stl_vector.h:919-919,stl_vector.h:1046-1046,OperatorTags.h:43-43,OperatorTags.h:63-63,NonLocalPP.hpp:131-132 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 5.67 |
CQA cycles if no scalar integer | 5.00 |
CQA cycles if FP arith vectorized | 3.92 |
CQA cycles if fully vectorized | 1.54 |
Front-end cycles | 4.83 |
DIV/SQRT cycles | 3.00 |
P0 cycles | 3.00 |
P1 cycles | 2.75 |
P2 cycles | 2.75 |
P3 cycles | 0.50 |
P4 cycles | 5.67 |
P5 cycles | 5.67 |
P6 cycles | 5.67 |
P7 cycles | 1.00 |
P8 cycles | 1.33 |
P9 cycles | 1.33 |
P10 cycles | 1.33 |
P11 cycles | 1.00 |
P12 cycles | 1.00 |
P13 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 30.00 |
Nb uops | 29.00 |
Nb loads | 15.00 |
Nb stores | 2.00 |
Nb stack references | 1.00 |
FLOP/cycle | 1.59 |
Nb FLOP add-sub | 3.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 3.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 28.24 |
Bytes prefetched | 0.00 |
Bytes loaded | 136.00 |
Bytes stored | 24.00 |
Stride 0 | 5.00 |
Stride 1 | 0.00 |
Stride n | 2.00 |
Stride unknown | 4.00 |
Stride indirect | 1.00 |
Vectorization ratio all | 30.00 |
Vectorization ratio load | 25.00 |
Vectorization ratio store | 50.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 50.00 |
Vectorization ratio fma | 50.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 16.25 |
Vector-efficiency ratio load | 15.63 |
Vector-efficiency ratio store | 18.75 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 18.75 |
Vector-efficiency ratio fma | 18.75 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | NA |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.13 |
CQA speedup if FP arith vectorized | 1.45 |
CQA speedup if fully vectorized | 3.68 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.17 |
Bottlenecks | P5, P6, P7, |
Function | .omp_outlined..64 |
Source | VectorSoAContainer.h:231-231,TinyVector.h:144-145,OhmmsVector.h:229-229,stl_vector.h:919-919,stl_vector.h:1046-1046,OperatorTags.h:43-43,OperatorTags.h:63-63,NonLocalPP.hpp:131-132 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 5.67 |
CQA cycles if no scalar integer | 5.00 |
CQA cycles if FP arith vectorized | 3.92 |
CQA cycles if fully vectorized | 1.54 |
Front-end cycles | 4.83 |
DIV/SQRT cycles | 3.00 |
P0 cycles | 3.00 |
P1 cycles | 2.75 |
P2 cycles | 2.75 |
P3 cycles | 0.50 |
P4 cycles | 5.67 |
P5 cycles | 5.67 |
P6 cycles | 5.67 |
P7 cycles | 1.00 |
P8 cycles | 1.33 |
P9 cycles | 1.33 |
P10 cycles | 1.33 |
P11 cycles | 1.00 |
P12 cycles | 1.00 |
P13 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 30.00 |
Nb uops | 29.00 |
Nb loads | 15.00 |
Nb stores | 2.00 |
Nb stack references | 1.00 |
FLOP/cycle | 1.59 |
Nb FLOP add-sub | 3.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 3.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 28.24 |
Bytes prefetched | 0.00 |
Bytes loaded | 136.00 |
Bytes stored | 24.00 |
Stride 0 | 5.00 |
Stride 1 | 0.00 |
Stride n | 2.00 |
Stride unknown | 4.00 |
Stride indirect | 1.00 |
Vectorization ratio all | 30.00 |
Vectorization ratio load | 25.00 |
Vectorization ratio store | 50.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 50.00 |
Vectorization ratio fma | 50.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 16.25 |
Vector-efficiency ratio load | 15.63 |
Vector-efficiency ratio store | 18.75 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 18.75 |
Vector-efficiency ratio fma | 18.75 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | NA |
Path / |
Function | .omp_outlined..64 |
Source file and lines | NonLocalPP.hpp:131-132 |
Module | exec |
nb instructions | 30 |
nb uops | 29 |
loop length | 145 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 3 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 1 |
micro-operation queue | 4.83 cycles |
front end | 4.83 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 3.00 | 3.00 | 2.75 | 2.75 | 0.50 | 5.67 | 5.67 | 5.67 | 1.00 | 1.33 | 1.33 | 1.33 | 1.00 | 1.00 |
cycles | 3.00 | 3.00 | 2.75 | 2.75 | 0.50 | 5.67 | 5.67 | 5.67 | 1.00 | 1.33 | 1.33 | 1.33 | 1.00 | 1.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
Front-end | 4.83 |
Dispatch | 5.67 |
Data deps. | 1.00 |
Overall L1 | 5.67 |
all | 30% |
load | 25% |
store | 50% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | 50% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 16% |
load | 15% |
store | 18% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 18% |
fma | 18% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV (%R10),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%R14),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x10(%R14),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
VMOVSD (%R15,%RAX,1),%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
INC %RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVDDUP (%RDX,%R12,8),%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SAL $0x20,%R8 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (%RSI,%R12,8),%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVSD (%RSI,%R12,8),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (%RBX,%RBX,2),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAR $0x1d,%RDX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SAR $0x1c,%R8 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVHPD (%RDX,%RDI,1),%XMM2,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 9 | 0.50 |
MOV 0x40(%R9),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
VFMADD213SD (%R8,%RDI,1),%XMM1,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231PD -0x10(%R15,%RAX,1),%XMM1,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDSD 0x10(%RDX,%RSI,8),%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
VADDPD (%RDX,%RSI,8),%XMM2,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
MOV -0xc0(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
VMOVUPD %XMM1,-0x10(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 |
VMOVSD %XMM0,(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
ADD $0x18,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV 0x2830(%R13),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
SUB 0x2828(%R13),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
SHR $0x3,%RDX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IMUL $-0x55555555,%EDX,%EDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOVSXD %EDX,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %RDX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JL 20b820 <.omp_outlined..64+0xe00> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
Function | .omp_outlined..64 |
Source file and lines | NonLocalPP.hpp:131-132 |
Module | exec |
nb instructions | 30 |
nb uops | 29 |
loop length | 145 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 3 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 1 |
micro-operation queue | 4.83 cycles |
front end | 4.83 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 3.00 | 3.00 | 2.75 | 2.75 | 0.50 | 5.67 | 5.67 | 5.67 | 1.00 | 1.33 | 1.33 | 1.33 | 1.00 | 1.00 |
cycles | 3.00 | 3.00 | 2.75 | 2.75 | 0.50 | 5.67 | 5.67 | 5.67 | 1.00 | 1.33 | 1.33 | 1.33 | 1.00 | 1.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
Front-end | 4.83 |
Dispatch | 5.67 |
Data deps. | 1.00 |
Overall L1 | 5.67 |
all | 30% |
load | 25% |
store | 50% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | 50% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 16% |
load | 15% |
store | 18% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 18% |
fma | 18% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV (%R10),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%R14),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x10(%R14),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
VMOVSD (%R15,%RAX,1),%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
INC %RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVDDUP (%RDX,%R12,8),%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SAL $0x20,%R8 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (%RSI,%R12,8),%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVSD (%RSI,%R12,8),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (%RBX,%RBX,2),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAR $0x1d,%RDX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SAR $0x1c,%R8 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVHPD (%RDX,%RDI,1),%XMM2,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 9 | 0.50 |
MOV 0x40(%R9),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
VFMADD213SD (%R8,%RDI,1),%XMM1,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231PD -0x10(%R15,%RAX,1),%XMM1,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDSD 0x10(%RDX,%RSI,8),%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
VADDPD (%RDX,%RSI,8),%XMM2,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
MOV -0xc0(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
VMOVUPD %XMM1,-0x10(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 |
VMOVSD %XMM0,(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
ADD $0x18,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV 0x2830(%R13),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
SUB 0x2828(%R13),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
SHR $0x3,%RDX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IMUL $-0x55555555,%EDX,%EDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOVSXD %EDX,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %RDX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JL 20b820 <.omp_outlined..64+0xe00> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |