Loop Id: 855 | Module: exec | Source: MultiBsplineRef.hpp:276-286 | Coverage: 0.14% |
---|
Loop Id: 855 | Module: exec | Source: MultiBsplineRef.hpp:276-286 | Coverage: 0.14% |
---|
0x25d910 VMULPD (%R14,%RDX,8),%ZMM0,%ZMM15 [8] |
0x25d917 VMULPD (%R15,%RDX,8),%ZMM3,%ZMM16 [4] |
0x25d91e VMOVUPD %ZMM15,(%R14,%RDX,8) [8] |
0x25d925 VMOVUPD %ZMM16,(%R15,%RDX,8) [4] |
0x25d92c VMULPD (%R13,%RDX,8),%ZMM1,%ZMM15 [7] |
0x25d934 VMOVUPD %ZMM15,(%R13,%RDX,8) [7] |
0x25d93c VMULPD (%RBX,%RDX,8),%ZMM2,%ZMM15 [3] |
0x25d943 VMOVUPD %ZMM15,(%RBX,%RDX,8) [3] |
0x25d94a VMULPD (%R8,%RDX,8),%ZMM4,%ZMM15 [5] |
0x25d951 VMOVUPD %ZMM15,(%R8,%RDX,8) [5] |
0x25d958 VMULPD (%R10,%RDX,8),%ZMM11,%ZMM15 [9] |
0x25d95f VMOVUPD %ZMM15,(%R10,%RDX,8) [9] |
0x25d966 VMULPD (%RSI,%RDX,8),%ZMM12,%ZMM15 [1] |
0x25d96d VMOVUPD %ZMM15,(%RSI,%RDX,8) [1] |
0x25d974 VMULPD (%RDI,%RDX,8),%ZMM13,%ZMM15 [6] |
0x25d97b VMOVUPD %ZMM15,(%RDI,%RDX,8) [6] |
0x25d982 VMULPD (%R9,%RDX,8),%ZMM14,%ZMM15 [2] |
0x25d989 VMOVUPD %ZMM15,(%R9,%RDX,8) [2] |
0x25d990 ADD $0x8,%RDX |
0x25d994 CMP %RDX,%RCX |
0x25d997 JNE 25d910 |
/home/kcamus/qaas_runs/170-254-9426/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineRef.hpp: 276 - 286 |
-------------------------------------------------------------------------------- |
276: for (int n = 0; n < num_splines; n++) |
277: { |
278: gx[n] *= dxInv; |
279: gy[n] *= dyInv; |
280: gz[n] *= dzInv; |
281: hxx[n] *= dxx; |
282: hyy[n] *= dyy; |
283: hzz[n] *= dzz; |
284: hxy[n] *= dxy; |
285: hxz[n] *= dxz; |
286: hyz[n] *= dyz; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.86 |
Bottlenecks | P5, P6, P7, P8, P9, P12, P13, |
Function | void miniqmcreference::MultiBsplineEvalRef::evaluate_vgh |
Source | MultiBsplineRef.hpp:276-286 |
Source loop unroll info | unrolled by 8 |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | main |
Unroll factor | 8 |
CQA cycles | 9.00 |
CQA cycles if no scalar integer | 9.00 |
CQA cycles if FP arith vectorized | 9.00 |
CQA cycles if fully vectorized | 9.00 |
Front-end cycles | 4.83 |
DIV/SQRT cycles | 0.50 |
P0 cycles | 0.50 |
P1 cycles | 0.25 |
P2 cycles | 0.25 |
P3 cycles | 0.50 |
P4 cycles | 9.00 |
P5 cycles | 9.00 |
P6 cycles | 9.00 |
P7 cycles | 9.00 |
P8 cycles | 9.00 |
P9 cycles | 0.00 |
P10 cycles | 0.00 |
P11 cycles | 9.00 |
P12 cycles | 9.00 |
P13 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 21.00 |
Nb uops | 29.00 |
Nb loads | 9.00 |
Nb stores | 9.00 |
Nb stack references | 0.00 |
FLOP/cycle | 8.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 72.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 128.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 576.00 |
Bytes stored | 576.00 |
Stride 0 | 0.00 |
Stride 1 | 9.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 100.00 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 100.00 |
Vector-efficiency ratio load | 100.00 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | NA |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.86 |
Bottlenecks | P5, P6, P7, P8, P9, P12, P13, |
Function | void miniqmcreference::MultiBsplineEvalRef::evaluate_vgh |
Source | MultiBsplineRef.hpp:276-286 |
Source loop unroll info | unrolled by 8 |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | main |
Unroll factor | 8 |
CQA cycles | 9.00 |
CQA cycles if no scalar integer | 9.00 |
CQA cycles if FP arith vectorized | 9.00 |
CQA cycles if fully vectorized | 9.00 |
Front-end cycles | 4.83 |
DIV/SQRT cycles | 0.50 |
P0 cycles | 0.50 |
P1 cycles | 0.25 |
P2 cycles | 0.25 |
P3 cycles | 0.50 |
P4 cycles | 9.00 |
P5 cycles | 9.00 |
P6 cycles | 9.00 |
P7 cycles | 9.00 |
P8 cycles | 9.00 |
P9 cycles | 0.00 |
P10 cycles | 0.00 |
P11 cycles | 9.00 |
P12 cycles | 9.00 |
P13 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 21.00 |
Nb uops | 29.00 |
Nb loads | 9.00 |
Nb stores | 9.00 |
Nb stack references | 0.00 |
FLOP/cycle | 8.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 72.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 128.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 576.00 |
Bytes stored | 576.00 |
Stride 0 | 0.00 |
Stride 1 | 9.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 100.00 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 100.00 |
Vector-efficiency ratio load | 100.00 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | NA |
Path / |
Function | void miniqmcreference::MultiBsplineEvalRef::evaluate_vgh |
Source file and lines | MultiBsplineRef.hpp:276-286 |
Module | exec |
nb instructions | 21 |
nb uops | 29 |
loop length | 141 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 11 |
nb stack references | 0 |
micro-operation queue | 4.83 cycles |
front end | 4.83 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 0.50 | 0.50 | 0.25 | 0.25 | 0.50 | 6.00 | 6.00 | 6.00 | 4.50 | 4.50 | 0.00 | 0.00 | 9.00 | 9.00 |
cycles | 0.50 | 0.50 | 0.25 | 0.25 | 0.50 | 9.00 | 9.00 | 9.00 | 9.00 | 9.00 | 0.00 | 0.00 | 9.00 | 9.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
Front-end | 4.83 |
Dispatch | 9.00 |
Data deps. | 1.00 |
Overall L1 | 9.00 |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMULPD (%R14,%RDX,8),%ZMM0,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VMULPD (%R15,%RDX,8),%ZMM3,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %ZMM15,(%R14,%RDX,8) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 |
VMOVUPD %ZMM16,(%R15,%RDX,8) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 |
VMULPD (%R13,%RDX,8),%ZMM1,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %ZMM15,(%R13,%RDX,8) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 |
VMULPD (%RBX,%RDX,8),%ZMM2,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %ZMM15,(%RBX,%RDX,8) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 |
VMULPD (%R8,%RDX,8),%ZMM4,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %ZMM15,(%R8,%RDX,8) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 |
VMULPD (%R10,%RDX,8),%ZMM11,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %ZMM15,(%R10,%RDX,8) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 |
VMULPD (%RSI,%RDX,8),%ZMM12,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %ZMM15,(%RSI,%RDX,8) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 |
VMULPD (%RDI,%RDX,8),%ZMM13,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %ZMM15,(%RDI,%RDX,8) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 |
VMULPD (%R9,%RDX,8),%ZMM14,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %ZMM15,(%R9,%RDX,8) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 |
ADD $0x8,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %RDX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JNE 25d910 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0x17c0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
Function | void miniqmcreference::MultiBsplineEvalRef::evaluate_vgh |
Source file and lines | MultiBsplineRef.hpp:276-286 |
Module | exec |
nb instructions | 21 |
nb uops | 29 |
loop length | 141 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 11 |
nb stack references | 0 |
micro-operation queue | 4.83 cycles |
front end | 4.83 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 0.50 | 0.50 | 0.25 | 0.25 | 0.50 | 6.00 | 6.00 | 6.00 | 4.50 | 4.50 | 0.00 | 0.00 | 9.00 | 9.00 |
cycles | 0.50 | 0.50 | 0.25 | 0.25 | 0.50 | 9.00 | 9.00 | 9.00 | 9.00 | 9.00 | 0.00 | 0.00 | 9.00 | 9.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
Front-end | 4.83 |
Dispatch | 9.00 |
Data deps. | 1.00 |
Overall L1 | 9.00 |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMULPD (%R14,%RDX,8),%ZMM0,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VMULPD (%R15,%RDX,8),%ZMM3,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %ZMM15,(%R14,%RDX,8) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 |
VMOVUPD %ZMM16,(%R15,%RDX,8) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 |
VMULPD (%R13,%RDX,8),%ZMM1,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %ZMM15,(%R13,%RDX,8) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 |
VMULPD (%RBX,%RDX,8),%ZMM2,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %ZMM15,(%RBX,%RDX,8) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 |
VMULPD (%R8,%RDX,8),%ZMM4,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %ZMM15,(%R8,%RDX,8) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 |
VMULPD (%R10,%RDX,8),%ZMM11,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %ZMM15,(%R10,%RDX,8) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 |
VMULPD (%RSI,%RDX,8),%ZMM12,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %ZMM15,(%RSI,%RDX,8) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 |
VMULPD (%RDI,%RDX,8),%ZMM13,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %ZMM15,(%RDI,%RDX,8) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 |
VMULPD (%R9,%RDX,8),%ZMM14,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %ZMM15,(%R9,%RDX,8) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 |
ADD $0x8,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %RDX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JNE 25d910 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0x17c0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |