Loop Id: 861 | Module: exec | Source: inner_product.hpp:81-82 | Coverage: 0.06% |
---|
Loop Id: 861 | Module: exec | Source: inner_product.hpp:81-82 | Coverage: 0.06% |
---|
0x470939 VMOVSD (%RCX,%RAX,1),%XMM12 [1] |
0x47093e VMOVSD 0x8(%RCX,%RAX,1),%XMM15 [1] |
0x470944 VMOVSD 0x10(%RCX,%RAX,1),%XMM5 [1] |
0x47094a VMOVSD 0x18(%RCX,%RAX,1),%XMM6 [1] |
0x470950 VFMADD231SD (%RDX,%RAX,1),%XMM12,%XMM1 [2] |
0x470956 VMOVSD 0x20(%RCX,%RAX,1),%XMM7 [1] |
0x47095c VMOVSD 0x28(%RCX,%RAX,1),%XMM8 [1] |
0x470962 VMOVSD 0x30(%RCX,%RAX,1),%XMM9 [1] |
0x470968 VMOVSD 0x38(%RCX,%RAX,1),%XMM10 [1] |
0x47096e VFMADD231SD 0x8(%RDX,%RAX,1),%XMM15,%XMM1 [2] |
0x470975 VFMADD231SD 0x10(%RDX,%RAX,1),%XMM5,%XMM1 [2] |
0x47097c VFMADD231SD 0x18(%RDX,%RAX,1),%XMM6,%XMM1 [2] |
0x470983 VFMADD231SD 0x20(%RDX,%RAX,1),%XMM7,%XMM1 [2] |
0x47098a VFMADD231SD 0x28(%RDX,%RAX,1),%XMM8,%XMM1 [2] |
0x470991 VFMADD231SD 0x30(%RDX,%RAX,1),%XMM9,%XMM1 [2] |
0x470998 VFMADD231SD 0x38(%RDX,%RAX,1),%XMM10,%XMM1 [2] |
0x47099f ADD $0x40,%RAX |
0x4709a3 CMP %RAX,%R11 |
0x4709a6 JNE 470939 |
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp: 81 - 82 |
-------------------------------------------------------------------------------- |
81: for (int i = 0; i < n; i++) |
82: res += a[i] * b[i]; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►54.55+ | qmcplusplus::WaveFunction::eva[...] | WaveFunction.cpp:177 | exec |
○ | main._omp_fn.0 | miniqmc.cpp:390 | exec |
○ | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
►45.45+ | qmcplusplus::WaveFunction::eva[...] | WaveFunction.cpp:178 | exec |
○ | main._omp_fn.0 | miniqmc.cpp:390 | exec |
○ | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.48 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 4.00 |
Bottlenecks | |
Function | miniqmcreference::DiracDeterminantRef |
Source | inner_product.hpp:81-82 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 32.00 |
CQA cycles if no scalar integer | 32.00 |
CQA cycles if FP arith vectorized | 21.68 |
CQA cycles if fully vectorized | 4.00 |
Front-end cycles | 6.50 |
DIV/SQRT cycles | 4.00 |
P0 cycles | 4.00 |
P1 cycles | 8.00 |
P2 cycles | 8.00 |
P3 cycles | 0.00 |
P4 cycles | 1.00 |
P5 cycles | 1.00 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | 32 |
FE+BE cycles (UFS) | 32.12 |
Stall cycles (UFS) | 25.34 |
Nb insns | 19.00 |
Nb uops | 18.00 |
Nb loads | 16.00 |
Nb stores | 0.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.50 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 8.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 4.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 128.00 |
Bytes stored | 0.00 |
Stride 0 | 0.00 |
Stride 1 | 2.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | 12.50 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | NA |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.48 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 4.00 |
Bottlenecks | |
Function | miniqmcreference::DiracDeterminantRef |
Source | inner_product.hpp:81-82 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 32.00 |
CQA cycles if no scalar integer | 32.00 |
CQA cycles if FP arith vectorized | 21.68 |
CQA cycles if fully vectorized | 4.00 |
Front-end cycles | 6.50 |
DIV/SQRT cycles | 4.00 |
P0 cycles | 4.00 |
P1 cycles | 8.00 |
P2 cycles | 8.00 |
P3 cycles | 0.00 |
P4 cycles | 1.00 |
P5 cycles | 1.00 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | 32 |
FE+BE cycles (UFS) | 32.12 |
Stall cycles (UFS) | 25.34 |
Nb insns | 19.00 |
Nb uops | 18.00 |
Nb loads | 16.00 |
Nb stores | 0.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.50 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 8.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 4.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 128.00 |
Bytes stored | 0.00 |
Stride 0 | 0.00 |
Stride 1 | 2.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | 12.50 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | NA |
Path / |
Function | miniqmcreference::DiracDeterminantRef |
Source file and lines | inner_product.hpp:81-82 |
Module | exec |
nb instructions | 19 |
nb uops | 18 |
loop length | 111 |
used x86 registers | 4 |
used mmx registers | 0 |
used xmm registers | 9 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 6.50 cycles |
front end | 6.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 4.00 | 4.00 | 8.00 | 8.00 | 0.00 | 1.00 | 1.00 | 0.00 |
cycles | 4.00 | 4.00 | 8.00 | 8.00 | 0.00 | 1.00 | 1.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 32.00 |
FE+BE cycles | 32.12 |
Stall cycles | 25.34 |
LB full (events) | 28.80 |
LM full (events) | 0.04 |
Front-end | 6.50 |
Dispatch | 8.00 |
Data deps. | 32.00 |
Overall L1 | 32.00 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
VMOVSD (%RCX,%RAX,1),%XMM12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x8(%RCX,%RAX,1),%XMM15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x10(%RCX,%RAX,1),%XMM5 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x18(%RCX,%RAX,1),%XMM6 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD231SD (%RDX,%RAX,1),%XMM12,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x20(%RCX,%RAX,1),%XMM7 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x28(%RCX,%RAX,1),%XMM8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x30(%RCX,%RAX,1),%XMM9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x38(%RCX,%RAX,1),%XMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD231SD 0x8(%RDX,%RAX,1),%XMM15,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0x10(%RDX,%RAX,1),%XMM5,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0x18(%RDX,%RAX,1),%XMM6,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0x20(%RDX,%RAX,1),%XMM7,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0x28(%RDX,%RAX,1),%XMM8,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0x30(%RDX,%RAX,1),%XMM9,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0x38(%RDX,%RAX,1),%XMM10,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %RAX,%R11 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JNE 470939 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
Function | miniqmcreference::DiracDeterminantRef |
Source file and lines | inner_product.hpp:81-82 |
Module | exec |
nb instructions | 19 |
nb uops | 18 |
loop length | 111 |
used x86 registers | 4 |
used mmx registers | 0 |
used xmm registers | 9 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 6.50 cycles |
front end | 6.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 4.00 | 4.00 | 8.00 | 8.00 | 0.00 | 1.00 | 1.00 | 0.00 |
cycles | 4.00 | 4.00 | 8.00 | 8.00 | 0.00 | 1.00 | 1.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 32.00 |
FE+BE cycles | 32.12 |
Stall cycles | 25.34 |
LB full (events) | 28.80 |
LM full (events) | 0.04 |
Front-end | 6.50 |
Dispatch | 8.00 |
Data deps. | 32.00 |
Overall L1 | 32.00 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
VMOVSD (%RCX,%RAX,1),%XMM12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x8(%RCX,%RAX,1),%XMM15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x10(%RCX,%RAX,1),%XMM5 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x18(%RCX,%RAX,1),%XMM6 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD231SD (%RDX,%RAX,1),%XMM12,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x20(%RCX,%RAX,1),%XMM7 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x28(%RCX,%RAX,1),%XMM8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x30(%RCX,%RAX,1),%XMM9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x38(%RCX,%RAX,1),%XMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD231SD 0x8(%RDX,%RAX,1),%XMM15,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0x10(%RDX,%RAX,1),%XMM5,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0x18(%RDX,%RAX,1),%XMM6,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0x20(%RDX,%RAX,1),%XMM7,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0x28(%RDX,%RAX,1),%XMM8,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0x30(%RDX,%RAX,1),%XMM9,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0x38(%RDX,%RAX,1),%XMM10,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %RAX,%R11 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JNE 470939 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |