Loop Id: 834 | Module: exec | Source: TinyVectorOps.h:59-59 [...] | Coverage: 0.02% |
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Loop Id: 834 | Module: exec | Source: TinyVectorOps.h:59-59 [...] | Coverage: 0.02% |
---|
0x43c3c0 MOV 0x120(%RSP),%RDX |
0x43c3c8 INC %RDX |
0x43c3cb MOVSXD 0x30(%R15),%RAX |
0x43c3cf CMP %RAX,%RDX |
0x43c3d2 JGE 43d4b8 |
0x43c3d8 MOV 0x2e8(%R15),%RAX |
0x43c3df MOV 0x300(%R15),%RCX |
0x43c3e6 MOV (%RAX,%RDX,8),%RSI |
0x43c3ea LEA (%RDX,%RDX,2),%RAX |
0x43c3ee MOV (%RCX,%RAX,8),%RDI |
0x43c3f2 MOV 0x318(%R15),%RAX |
0x43c3f9 MOV %RDX,0x120(%RSP) |
0x43c401 LEA (,%RDX,8),%RCX |
0x43c409 LEA (%RCX,%RCX,4),%RCX |
0x43c40d MOV 0x18(%RAX,%RCX,1),%R8 |
0x43c412 MOV 0x330(%R15),%RAX |
0x43c419 MOV 0x18(%RAX,%RCX,1),%R9 |
0x43c41e MOVSXD 0x40(%R15),%RDX |
0x43c422 VMOVUPD 0x210(%RSP),%XMM0 |
0x43c42b VSUBSD 0x78(%RSI),%XMM0,%XMM0 |
0x43c430 VMOVSD 0x98(%RSI),%XMM1 |
0x43c438 VMOVUPD %XMM1,0x250(%RSP) |
0x43c441 VMULSD %XMM0,%XMM1,%XMM8 |
0x43c445 MOV 0x88(%RSI),%R10D |
0x43c44c DEC %R10D |
0x43c44f VROUNDSD $0x9,%XMM8,%XMM8,%XMM9 |
0x43c455 VCVTTSD2SI %XMM9,%EAX |
0x43c45a MOV %EAX,%ECX |
0x43c45c SAR $0x1f,%ECX |
0x43c45f ANDN %EAX,%ECX,%EAX |
0x43c464 VMOVSD 0x28(%RSI),%XMM2 |
0x43c469 VMOVHPD 0x50(%RSI),%XMM2,%XMM2 |
0x43c46e VMOVUPD 0x220(%RSP),%XMM0 |
0x43c477 VSUBPD %XMM2,%XMM0,%XMM2 |
0x43c47b VMOVSD 0x48(%RSI),%XMM0 |
0x43c480 VMOVSD 0x70(%RSI),%XMM1 |
0x43c485 VMOVUPD %XMM0,0x240(%RSP) |
0x43c48e VMOVUPD %XMM1,0x230(%RSP) |
0x43c497 VUNPCKLPD %XMM1,%XMM0,%XMM3 |
0x43c49b VMULPD %XMM2,%XMM3,%XMM2 |
0x43c49f VRNDSCALEPD $0x9,%XMM2,%XMM18 |
0x43c4a6 VMOVD 0x38(%RSI),%XMM3 |
0x43c4ab VPINSRD $0x1,0x60(%RSI),%XMM3,%XMM19 |
0x43c4b3 VSUBPD %XMM18,%XMM2,%XMM2 |
0x43c4b9 VMOVSD 0x5c9bf(%RIP),%XMM10 |
0x43c4c1 VMULSD %XMM2,%XMM10,%XMM3 |
0x43c4c5 VMOVSD 0x59b43(%RIP),%XMM12 |
0x43c4cd VSUBSD %XMM3,%XMM12,%XMM4 |
0x43c4d1 VMULPD %XMM2,%XMM2,%XMM5 |
0x43c4d5 VMOVDDUP %XMM2,%XMM6 |
0x43c4d9 VMOVUPD 0x200(%RSP),%XMM0 |
0x43c4e2 VBLENDPD $0x1,%XMM4,%XMM0,%XMM4 |
0x43c4e8 VMULPD %XMM4,%XMM6,%XMM4 |
0x43c4ec VMOVUPD 0x5cb6c(%RIP),%XMM11 |
0x43c4f4 VADDPD %XMM4,%XMM11,%XMM6 |
0x43c4f8 VUNPCKLPD %XMM5,%XMM2,%XMM7 |
0x43c4fc VMOVUPD 0x5cb6c(%RIP),%XMM13 |
0x43c504 VFMADD213PD %XMM13,%XMM6,%XMM7 |
0x43c509 VMOVUPD %XMM7,0x300(%RSP) |
0x43c512 VMOVAPD %XMM2,%XMM6 |
0x43c516 VMOVSD 0x59b5a(%RIP),%XMM14 |
0x43c51e VFMADD213SD %XMM12,%XMM14,%XMM6 |
0x43c523 VFMADD213SD %XMM12,%XMM2,%XMM6 |
0x43c528 VFMADD213SD %XMM10,%XMM2,%XMM6 |
0x43c52d VMOVSD %XMM6,0x310(%RSP) |
0x43c536 VMULSD %XMM5,%XMM3,%XMM3 |
0x43c53a VMOVSD %XMM3,0x318(%RSP) |
0x43c543 VMOVAPD %XMM2,%XMM3 |
0x43c547 VMOVSD 0x59ad9(%RIP),%XMM1 |
0x43c54f VFMADD213SD %XMM1,%XMM14,%XMM3 |
0x43c554 VFMADD213SD %XMM14,%XMM2,%XMM3 |
0x43c559 VMOVSD %XMM3,0x1e0(%RSP) |
0x43c562 VMOVAPD %XMM2,%XMM3 |
0x43c566 VMOVSD 0x5c91a(%RIP),%XMM15 |
0x43c56e VMOVSD 0x59ae8(%RIP),%XMM16 |
0x43c578 VFMADD213SD %XMM16,%XMM15,%XMM3 |
0x43c57e VMULSD %XMM2,%XMM3,%XMM3 |
0x43c582 VMOVSD %XMM3,0x1e8(%RSP) |
0x43c58b VMOVAPD %XMM2,%XMM3 |
0x43c58f VFMSUB213SD %XMM1,%XMM15,%XMM3 |
0x43c594 VFNMADD213SD %XMM12,%XMM2,%XMM3 |
0x43c599 VMOVSD %XMM3,0x1f0(%RSP) |
0x43c5a2 VPERMILPD $0x1,%XMM4,%XMM3 |
0x43c5a8 VMULSD %XMM2,%XMM3,%XMM3 |
0x43c5ac VMOVSD %XMM3,0x1f8(%RSP) |
0x43c5b5 VSUBSD %XMM2,%XMM1,%XMM3 |
0x43c5b9 VMOVSD %XMM3,0x1a0(%RSP) |
0x43c5c2 VMOVAPD %XMM2,%XMM3 |
0x43c5c6 VMOVSD 0x5bb48(%RIP),%XMM17 |
0x43c5d0 VFMADD213SD %XMM16,%XMM17,%XMM3 |
0x43c5d6 VMOVSD %XMM3,0x1a8(%RSP) |
0x43c5df CMP %EAX,%R10D |
0x43c5e2 VMOVAPD %XMM2,%XMM3 |
0x43c5e6 VFNMADD213SD %XMM1,%XMM17,%XMM3 |
0x43c5ec VMOVSD %XMM3,0x1b0(%RSP) |
0x43c5f5 VMOVLPD %XMM2,0x1b8(%RSP) |
0x43c5fe VPERMILPD $0x1,%XMM2,%XMM3 |
0x43c604 VMULSD %XMM3,%XMM10,%XMM4 |
0x43c608 VSUBSD %XMM4,%XMM12,%XMM5 |
0x43c60c VMULSD %XMM3,%XMM3,%XMM6 |
0x43c610 VPERMILPD $0x3,%XMM2,%XMM7 |
0x43c616 VBLENDPD $0x1,%XMM5,%XMM0,%XMM5 |
0x43c61c VMULPD %XMM5,%XMM7,%XMM5 |
0x43c620 VADDPD %XMM5,%XMM11,%XMM7 |
0x43c624 VSHUFPD $0x1,%XMM6,%XMM2,%XMM0 |
0x43c629 VFMADD213PD %XMM13,%XMM7,%XMM0 |
0x43c62e VMOVUPD %XMM0,0x2e0(%RSP) |
0x43c637 VMOVAPD %XMM3,%XMM0 |
0x43c63b VFMADD213SD %XMM12,%XMM14,%XMM0 |
0x43c640 VFMADD213SD %XMM12,%XMM3,%XMM0 |
0x43c645 VFMADD213SD %XMM10,%XMM3,%XMM0 |
0x43c64a VMOVSD %XMM0,0x2f0(%RSP) |
0x43c653 VMULSD %XMM6,%XMM4,%XMM0 |
0x43c657 VMOVSD %XMM0,0x2f8(%RSP) |
0x43c660 VMOVAPD %XMM3,%XMM0 |
0x43c664 VFMADD213SD %XMM1,%XMM14,%XMM0 |
0x43c669 VFMADD213SD %XMM14,%XMM3,%XMM0 |
0x43c66e VMOVSD %XMM0,0x1c0(%RSP) |
0x43c677 CMOVGE %EAX,%R10D |
0x43c67b VMOVAPD %XMM3,%XMM0 |
0x43c67f VFMADD213SD %XMM16,%XMM15,%XMM0 |
0x43c685 VMULSD %XMM3,%XMM0,%XMM0 |
0x43c689 VMOVSD %XMM0,0x1c8(%RSP) |
0x43c692 VMOVAPD %XMM3,%XMM0 |
0x43c696 VFMSUB213SD %XMM1,%XMM15,%XMM0 |
0x43c69b VFNMADD213SD %XMM12,%XMM3,%XMM0 |
0x43c6a0 VMOVSD %XMM0,0x1d0(%RSP) |
0x43c6a9 VMULPD %XMM2,%XMM5,%XMM0 |
0x43c6ad VMOVHPD %XMM0,0x1d8(%RSP) |
0x43c6b6 VSUBSD %XMM3,%XMM1,%XMM0 |
0x43c6ba VMOVSD %XMM0,0x180(%RSP) |
0x43c6c3 VMOVAPD %XMM3,%XMM0 |
0x43c6c7 VFMADD213SD %XMM16,%XMM17,%XMM0 |
0x43c6cd VMOVSD %XMM0,0x188(%RSP) |
0x43c6d6 VFNMADD213SD %XMM1,%XMM17,%XMM3 |
0x43c6dc VMOVSD %XMM3,0x190(%RSP) |
0x43c6e5 VMOVHPD %XMM2,0x198(%RSP) |
0x43c6ee MOVSXD 0xe8(%RSI),%R14 |
0x43c6f5 LEA (%R14,%R14,1),%R11 |
0x43c6f9 LEA (,%R14,4),%RAX |
0x43c701 VSUBSD %XMM9,%XMM8,%XMM8 |
0x43c706 VMULSD %XMM8,%XMM8,%XMM5 |
0x43c70b VMULSD %XMM14,%XMM8,%XMM4 |
0x43c710 VADDSD %XMM4,%XMM12,%XMM0 |
0x43c714 VMOVUPD 0x5c964(%RIP),%XMM1 |
0x43c71c VUNPCKLPD %XMM0,%XMM1,%XMM0 |
0x43c720 VMOVDDUP %XMM8,%XMM1 |
0x43c725 VMULPD %XMM0,%XMM1,%XMM9 |
0x43c729 VADDPD 0x5c90f(%RIP),%XMM9,%XMM0 |
0x43c731 VUNPCKLPD %XMM1,%XMM5,%XMM10 |
0x43c735 VFMADD213PD 0x5c912(%RIP),%XMM0,%XMM10 |
0x43c73e VMOVDQU 0x10(%RSI),%XMM6 |
0x43c743 MOV 0x20(%RSI),%R13 |
0x43c747 LEA (%R14,%R14,2),%RBX |
0x43c74b LEA (%R14,%R14,4),%R12 |
0x43c74f TEST %RDX,%RDX |
0x43c752 MOV %RDX,0x20(%RSP) |
0x43c757 VMOVUPD %XMM8,0x170(%RSP) |
0x43c760 VMOVUPD %XMM9,0x160(%RSP) |
0x43c769 VMOVUPD %YMM10,0x320(%RSP) |
0x43c772 MOV %R8,0x18(%RSP) |
0x43c777 MOV %R9,0x28(%RSP) |
0x43c77c MOV %RDI,0x30(%RSP) |
0x43c781 MOV %R11,0x38(%RSP) |
0x43c786 MOV %RAX,0x118(%RSP) |
0x43c78e JE 43c90f |
0x43c794 LEA (%R9,%R12,8),%RCX |
0x43c798 MOV %RCX,0xd0(%RSP) |
0x43c7a0 LEA (%R9,%RAX,8),%RCX |
0x43c7a4 MOV %RCX,0xc0(%RSP) |
0x43c7ac LEA (%R9,%RBX,8),%RCX |
0x43c7b0 MOV %RCX,0x68(%RSP) |
0x43c7b5 LEA (%R9,%R11,8),%RCX |
0x43c7b9 MOV %RCX,0x60(%RSP) |
0x43c7be LEA (%R9,%R14,8),%RCX |
0x43c7c2 MOV %RCX,0x58(%RSP) |
0x43c7c7 LEA (%R8,%R11,8),%RCX |
0x43c7cb MOV %RCX,0x50(%RSP) |
0x43c7d0 LEA (%R8,%R14,8),%RCX |
0x43c7d4 MOV %RCX,0x48(%RSP) |
0x43c7d9 LEA (,%RDX,8),%R15 |
0x43c7e1 MOV %R10D,0x8(%RSP) |
0x43c7e6 MOV %RSI,0x10(%RSP) |
0x43c7eb XOR %ESI,%ESI |
0x43c7ed MOV %R15,%RDX |
0x43c7f0 VMOVUPD %XMM18,0x70(%RSP) |
0x43c7f8 VMOVDQU64 %XMM19,0xa0(%RSP) |
0x43c800 VMOVUPD %XMM5,0x90(%RSP) |
0x43c809 VMOVDQU %XMM6,0x80(%RSP) |
0x43c812 VMOVSD %XMM4,0xe0(%RSP) |
0x43c81b VZEROUPPER |
0x43c81e CALL 4879b0 <_intel_fast_memset> |
0x43c823 MOV 0x18(%RSP),%RDI |
0x43c828 XOR %ESI,%ESI |
0x43c82a MOV %R15,%RDX |
0x43c82d CALL 4879b0 <_intel_fast_memset> |
0x43c832 MOV 0x48(%RSP),%RDI |
0x43c837 XOR %ESI,%ESI |
0x43c839 MOV %R15,%RDX |
0x43c83c CALL 4879b0 <_intel_fast_memset> |
0x43c841 MOV 0x50(%RSP),%RDI |
0x43c846 XOR %ESI,%ESI |
0x43c848 MOV %R15,%RDX |
0x43c84b CALL 4879b0 <_intel_fast_memset> |
0x43c850 MOV 0x28(%RSP),%RDI |
0x43c855 XOR %ESI,%ESI |
0x43c857 MOV %R15,%RDX |
0x43c85a CALL 4879b0 <_intel_fast_memset> |
0x43c85f MOV 0x58(%RSP),%RDI |
0x43c864 XOR %ESI,%ESI |
0x43c866 MOV %R15,%RDX |
0x43c869 CALL 4879b0 <_intel_fast_memset> |
0x43c86e MOV 0x60(%RSP),%RDI |
0x43c873 XOR %ESI,%ESI |
0x43c875 MOV %R15,%RDX |
0x43c878 CALL 4879b0 <_intel_fast_memset> |
0x43c87d MOV 0x68(%RSP),%RDI |
0x43c882 XOR %ESI,%ESI |
0x43c884 MOV %R15,%RDX |
0x43c887 CALL 4879b0 <_intel_fast_memset> |
0x43c88c MOV 0xc0(%RSP),%RDI |
0x43c894 XOR %ESI,%ESI |
0x43c896 MOV %R15,%RDX |
0x43c899 CALL 4879b0 <_intel_fast_memset> |
0x43c89e MOV 0xd0(%RSP),%RDI |
0x43c8a6 XOR %ESI,%ESI |
0x43c8a8 MOV %R15,%RDX |
0x43c8ab CALL 4879b0 <_intel_fast_memset> |
0x43c8b0 VMOVSD 0xe0(%RSP),%XMM4 |
0x43c8b9 VMOVDQU 0x80(%RSP),%XMM6 |
0x43c8c2 VMOVUPD 0x90(%RSP),%XMM5 |
0x43c8cb MOV 0x38(%RSP),%R11 |
0x43c8d0 VMOVDQU64 0xa0(%RSP),%XMM19 |
0x43c8d8 VMOVUPD 0x70(%RSP),%XMM18 |
0x43c8e0 MOV 0x8(%RSP),%R10D |
0x43c8e5 MOV 0x10(%RSP),%RSI |
0x43c8ea MOV 0x18(%RSP),%R8 |
0x43c8ef VMOVUPD 0x320(%RSP),%YMM10 |
0x43c8f8 VMOVUPD 0x160(%RSP),%XMM9 |
0x43c901 VMOVUPD 0x170(%RSP),%XMM8 |
0x43c90a MOV 0x20(%RSP),%RDX |
0x43c90f MOV %R12,0xb0(%RSP) |
0x43c917 MOV %RBX,0xb8(%RSP) |
0x43c91f VMOVSD 0x5c559(%RIP),%XMM2 |
0x43c927 VMOVAPD %XMM2,%XMM11 |
0x43c92b VMOVSD 0x596dd(%RIP),%XMM0 |
0x43c933 VFMSUB213SD %XMM0,%XMM8,%XMM11 |
0x43c938 VMOVSD 0x59738(%RIP),%XMM1 |
0x43c940 VFMSUB213SD %XMM1,%XMM8,%XMM11 |
0x43c945 VFNMADD213SD %XMM2,%XMM8,%XMM11 |
0x43c94a VMOVSD 0x596d6(%RIP),%XMM3 |
0x43c952 VADDSD %XMM3,%XMM4,%XMM12 |
0x43c956 VFMADD213SD %XMM1,%XMM8,%XMM12 |
0x43c95b VMOVAPD %XMM8,%XMM22 |
0x43c961 VMOVSD 0x5c51f(%RIP),%XMM1 |
0x43c969 VMOVSD 0x596ef(%RIP),%XMM4 |
0x43c971 VFMADD213SD %XMM4,%XMM1,%XMM22 |
0x43c977 VMOVAPD %XMM8,%XMM23 |
0x43c97d VFMSUB213SD %XMM3,%XMM1,%XMM23 |
0x43c983 VFNMADD213SD %XMM0,%XMM8,%XMM23 |
0x43c989 VSUBSD %XMM8,%XMM3,%XMM24 |
0x43c98f VMOVAPD %XMM8,%XMM25 |
0x43c995 VMOVSD 0x5b77b(%RIP),%XMM0 |
0x43c99d VFMADD213SD %XMM4,%XMM0,%XMM25 |
0x43c9a3 VMOVAPD %XMM8,%XMM26 |
0x43c9a9 VFNMADD213SD %XMM3,%XMM0,%XMM26 |
0x43c9af VPCMPEQD %XMM0,%XMM0,%XMM0 |
0x43c9b3 VPADDD %XMM0,%XMM19,%XMM0 |
0x43c9b9 VCVTTPD2DQ %XMM18,%XMM1 |
0x43c9bf VPMAXSD 0x59e38(%RIP),%XMM1,%XMM1 |
0x43c9c8 VPMINSD %XMM1,%XMM0,%XMM0 |
0x43c9cd MOV 0x8(%RSI),%RAX |
0x43c9d1 MOV %RAX,0x70(%RSP) |
0x43c9d6 MOVSXD %R10D,%RAX |
0x43c9d9 MOV %R13,%RCX |
0x43c9dc VPMOVSXDQ %XMM0,%XMM0 |
0x43c9e1 VPMULLQ %XMM0,%XMM6,%XMM3 |
0x43c9e7 IMUL %RAX,%RCX |
0x43c9eb VMULSD %XMM2,%XMM5,%XMM27 |
0x43c9f1 VMOVQ %XMM6,0x128(%RSP) |
0x43c9fa VPEXTRQ $0x1,%XMM6,0x140(%RSP) |
0x43ca05 LEA (%RCX,%R13,1),%RDI |
0x43ca09 LEA 0x2(%RAX),%RSI |
0x43ca0d IMUL %R13,%RSI |
0x43ca11 ADD $0x3,%RAX |
0x43ca15 IMUL %R13,%RAX |
0x43ca19 VMOVQ %RAX,%XMM0 |
0x43ca1e VMOVQ %RSI,%XMM1 |
0x43ca23 VPUNPCKLQDQ %XMM0,%XMM1,%XMM0 |
0x43ca27 VMOVQ %RCX,%XMM1 |
0x43ca2c VMOVQ %RDI,%XMM2 |
0x43ca31 VPUNPCKLQDQ %XMM2,%XMM1,%XMM1 |
0x43ca35 VINSERTI128 $0x1,%XMM0,%YMM1,%YMM0 |
0x43ca3b VMOVDQU %YMM3,0x400(%RSP) |
0x43ca44 VPERMQ $0x55,%YMM3,%YMM1 |
0x43ca4a VPADDQ %YMM1,%YMM0,%YMM0 |
0x43ca4e VMOVDQU %YMM0,0x3e0(%RSP) |
0x43ca57 MOV %RDX,%RAX |
0x43ca5a AND $-0x8,%RAX |
0x43ca5e MOV %RAX,0x138(%RSP) |
0x43ca66 VBROADCASTSD %XMM11,%YMM29 |
0x43ca6c VBROADCASTSD %XMM10,%YMM0 |
0x43ca71 VMOVUPD %YMM0,0x3c0(%RSP) |
0x43ca7a VPERMPD $0x55,%YMM10,%YMM0 |
0x43ca80 VMOVUPD %YMM0,0x3a0(%RSP) |
0x43ca89 VBROADCASTSD %XMM8,%YMM13 |
0x43ca8e VBROADCASTSD %XMM27,%YMM0 |
0x43ca94 VMOVUPD %YMM0,0x380(%RSP) |
0x43ca9d VBROADCASTSD %XMM12,%YMM0 |
0x43caa2 VMOVUPD %YMM0,0x360(%RSP) |
0x43caab VBROADCASTSD %XMM22,%YMM0 |
0x43cab1 VMOVUPD %YMM0,0x340(%RSP) |
0x43caba VBROADCASTSD %XMM23,%YMM19 |
0x43cac0 VBROADCASTSD %XMM9,%YMM20 |
0x43cac6 VBROADCASTSD %XMM24,%YMM14 |
0x43cacc VBROADCASTSD %XMM25,%YMM15 |
0x43cad2 VBROADCASTSD %XMM26,%YMM16 |
0x43cad8 LEA (%R8,%R11,8),%RAX |
0x43cadc MOV %RAX,0x8(%RSP) |
0x43cae1 LEA (%R8,%R14,8),%RAX |
0x43cae5 MOV %RAX,0x40(%RSP) |
0x43caea LEA (,%R14,8),%RDI |
0x43caf2 XOR %EAX,%EAX |
0x43caf4 VMOVUPD %XMM23,0x2d0(%RSP) |
0x43cafc VMOVUPD %XMM24,0x2c0(%RSP) |
0x43cb04 VMOVUPD %XMM25,0x2b0(%RSP) |
0x43cb0c VMOVUPD %XMM26,0x2a0(%RSP) |
0x43cb14 VMOVUPD %XMM27,0x290(%RSP) |
0x43cb1c VMOVUPD %XMM22,0x280(%RSP) |
0x43cb24 VMOVUPD %XMM12,0x270(%RSP) |
0x43cb2d VMOVUPD %XMM11,0x260(%RSP) |
0x43cb36 JMP 43cb56 |
(837) 0x43cb40 MOV 0x130(%RSP),%RCX |
(837) 0x43cb48 LEA 0x1(%RCX),%RAX |
(837) 0x43cb4c CMP $0x3,%RCX |
(837) 0x43cb50 JE 43d210 |
(837) 0x43cb56 VMOVSD 0x1a0(%RSP,%RAX,8),%XMM0 |
(837) 0x43cb5f VMOVSD %XMM0,0x48(%RSP) |
(837) 0x43cb65 VMOVSD 0x1e0(%RSP,%RAX,8),%XMM0 |
(837) 0x43cb6e VMOVSD %XMM0,0x158(%RSP) |
(837) 0x43cb77 VMOVSD 0x300(%RSP,%RAX,8),%XMM0 |
(837) 0x43cb80 VMOVSD %XMM0,0x150(%RSP) |
(837) 0x43cb89 MOV 0x128(%RSP),%RCX |
(837) 0x43cb91 MOV %RAX,0x130(%RSP) |
(837) 0x43cb99 IMUL %RAX,%RCX |
(837) 0x43cb9d MOV %RCX,0x148(%RSP) |
(837) 0x43cba5 XOR %EAX,%EAX |
(837) 0x43cba7 MOV %RAX,0x10(%RSP) |
(837) 0x43cbac JMP 43cbcd |
(838) 0x43cbb0 MOV 0x10(%RSP),%RCX |
(838) 0x43cbb5 LEA 0x1(%RCX),%RAX |
(838) 0x43cbb9 CMP $0x3,%RCX |
(838) 0x43cbbd MOV %RAX,0x10(%RSP) |
(838) 0x43cbc2 MOV 0x20(%RSP),%RDX |
(838) 0x43cbc7 JE 43cb40 |
(838) 0x43cbcd TEST %EDX,%EDX |
(838) 0x43cbcf JLE 43cbb0 |
(838) 0x43cbd1 MOV 0x10(%RSP),%RCX |
(838) 0x43cbd6 VMOVSD 0x2e0(%RSP,%RCX,8),%XMM0 |
(838) 0x43cbdf VMULSD 0x48(%RSP),%XMM0,%XMM21 |
(838) 0x43cbe7 VMOVSD 0x158(%RSP),%XMM1 |
(838) 0x43cbf0 VMULSD %XMM1,%XMM0,%XMM28 |
(838) 0x43cbf6 VMOVSD 0x150(%RSP),%XMM2 |
(838) 0x43cbff VMULSD %XMM2,%XMM0,%XMM30 |
(838) 0x43cc05 VMOVSD 0x1c0(%RSP,%RCX,8),%XMM0 |
(838) 0x43cc0e VMULSD %XMM1,%XMM0,%XMM1 |
(838) 0x43cc12 VMULSD %XMM2,%XMM0,%XMM3 |
(838) 0x43cc16 VMULSD 0x180(%RSP,%RCX,8),%XMM2,%XMM2 |
(838) 0x43cc1f MOV 0x140(%RSP),%RAX |
(838) 0x43cc27 IMUL %RCX,%RAX |
(838) 0x43cc2b ADD 0x148(%RSP),%RAX |
(838) 0x43cc33 VMOVQ %RAX,%XMM0 |
(838) 0x43cc38 VPADDQ 0x400(%RSP),%XMM0,%XMM0 |
(838) 0x43cc41 VPBROADCASTQ %XMM0,%YMM0 |
(838) 0x43cc46 VPADDQ 0x3e0(%RSP),%YMM0,%YMM0 |
(838) 0x43cc4f VPEXTRQ $0x1,%XMM0,%RDX |
(838) 0x43cc55 VMOVQ %XMM0,%RCX |
(838) 0x43cc5a VEXTRACTI128 $0x1,%YMM0,%XMM0 |
(838) 0x43cc60 VMOVQ %XMM0,%RSI |
(838) 0x43cc65 VPEXTRQ $0x1,%XMM0,%RBX |
(838) 0x43cc6b MOV 0x138(%RSP),%R12 |
(838) 0x43cc73 TEST %R12,%R12 |
(838) 0x43cc76 JE 43d070 |
(838) 0x43cc7c VMOVAPD %XMM21,%XMM0 |
(838) 0x43cc82 VMOVAPD %YMM20,%YMM21 |
(838) 0x43cc88 VMOVAPD %YMM19,%YMM20 |
(838) 0x43cc8e VMOVUPD 0x340(%RSP),%YMM19 |
(838) 0x43cc96 VMOVUPD 0x360(%RSP),%YMM18 |
(838) 0x43cc9e VMOVUPD 0x380(%RSP),%YMM17 |
(838) 0x43cca6 VMOVUPD %XMM0,0xa0(%RSP) |
(838) 0x43ccaf VBROADCASTSD %XMM0,%YMM31 |
(838) 0x43ccb5 VMOVUPD %XMM1,0xe0(%RSP) |
(838) 0x43ccbe VBROADCASTSD %XMM1,%YMM8 |
(838) 0x43ccc3 VMOVUPD %XMM28,0x90(%RSP) |
(838) 0x43cccb VBROADCASTSD %XMM28,%YMM9 |
(838) 0x43ccd1 VMOVUPD %XMM2,0xc0(%RSP) |
(838) 0x43ccda VBROADCASTSD %XMM2,%YMM22 |
(838) 0x43cce0 VMOVUPD %XMM3,0xd0(%RSP) |
(838) 0x43cce9 VBROADCASTSD %XMM3,%YMM23 |
(838) 0x43ccef VMOVUPD %XMM30,0x80(%RSP) |
(838) 0x43ccf7 VBROADCASTSD %XMM30,%YMM24 |
(838) 0x43ccfd MOV 0x70(%RSP),%RAX |
(838) 0x43cd02 MOV %RBX,0x50(%RSP) |
(838) 0x43cd07 LEA (%RAX,%RBX,8),%R8 |
(838) 0x43cd0b MOV %RSI,0x58(%RSP) |
(838) 0x43cd10 LEA (%RAX,%RSI,8),%R10 |
(838) 0x43cd14 MOV %RDX,0x60(%RSP) |
(838) 0x43cd19 LEA (%RAX,%RDX,8),%R9 |
(838) 0x43cd1d MOV %RCX,0x68(%RSP) |
(838) 0x43cd22 LEA (%RAX,%RCX,8),%R11 |
(838) 0x43cd26 XOR %R13D,%R13D |
(838) 0x43cd29 MOV 0x18(%RSP),%R15 |
(838) 0x43cd2e MOV 0x28(%RSP),%RSI |
(838) 0x43cd33 MOV 0x30(%RSP),%RDX |
(838) 0x43cd38 MOV 0x8(%RSP),%RBX |
(838) 0x43cd3d MOV 0x40(%RSP),%RCX |
(838) 0x43cd42 VMOVUPD 0x3c0(%RSP),%YMM2 |
(838) 0x43cd4b VMOVUPD 0x3a0(%RSP),%YMM1 |
(838) 0x43cd54 NOPW %CS:(%RAX,%RAX,1) |
(840) 0x43cd60 VMOVUPD (%R11,%R13,8),%YMM28 |
(840) 0x43cd67 VMOVUPD 0x20(%R11,%R13,8),%YMM27 |
(840) 0x43cd6f VMOVUPD (%R9,%R13,8),%YMM30 |
(840) 0x43cd76 VMOVUPD 0x20(%R9,%R13,8),%YMM7 |
(840) 0x43cd7d VMOVUPD (%R10,%R13,8),%YMM6 |
(840) 0x43cd83 VMOVUPD 0x20(%R10,%R13,8),%YMM0 |
(840) 0x43cd8a VMOVUPD (%R8,%R13,8),%YMM5 |
(840) 0x43cd90 VMOVUPD 0x20(%R8,%R13,8),%YMM11 |
(840) 0x43cd97 VMULPD %YMM29,%YMM27,%YMM25 |
(840) 0x43cd9d VMULPD %YMM29,%YMM28,%YMM26 |
(840) 0x43cda3 VMULPD %YMM13,%YMM11,%YMM10 |
(840) 0x43cda8 VMULPD %YMM5,%YMM13,%YMM4 |
(840) 0x43cdac VFMADD231PD %YMM2,%YMM30,%YMM26 |
(840) 0x43cdb2 VFMADD231PD %YMM2,%YMM7,%YMM25 |
(840) 0x43cdb8 VFMADD231PD %YMM1,%YMM0,%YMM25 |
(840) 0x43cdbe VFMADD231PD %YMM1,%YMM6,%YMM26 |
(840) 0x43cdc4 VFMADD231PD %YMM4,%YMM17,%YMM26 |
(840) 0x43cdca VFMADD231PD %YMM10,%YMM17,%YMM25 |
(840) 0x43cdd0 VMOVAPD %YMM29,%YMM3 |
(840) 0x43cdd6 VMULPD %YMM18,%YMM28,%YMM29 |
(840) 0x43cddc VMULPD %YMM19,%YMM7,%YMM12 |
(840) 0x43cde2 VFMADD231PD %YMM11,%YMM21,%YMM12 |
(840) 0x43cde8 VMULPD %YMM19,%YMM30,%YMM11 |
(840) 0x43cdee VFMADD231PD %YMM5,%YMM21,%YMM11 |
(840) 0x43cdf4 VFMADD231PD %YMM20,%YMM6,%YMM29 |
(840) 0x43cdfa VFMADD231PD %YMM11,%YMM13,%YMM29 |
(840) 0x43ce00 VMOVUPD (%RSI,%R13,8),%YMM11 |
(840) 0x43ce06 VMULPD %YMM18,%YMM27,%YMM5 |
(840) 0x43ce0c VFMADD231PD %YMM26,%YMM31,%YMM11 |
(840) 0x43ce12 VMOVUPD %YMM11,(%RSI,%R13,8) |
(840) 0x43ce18 VMOVUPD 0x20(%RSI,%R13,8),%YMM11 |
(840) 0x43ce1f LEA (%RSI,%R13,8),%RAX |
(840) 0x43ce23 VFMADD231PD %YMM25,%YMM31,%YMM11 |
(840) 0x43ce29 VMOVUPD %YMM11,0x20(%RSI,%R13,8) |
(840) 0x43ce30 VMOVUPD (%RAX,%R14,8),%YMM11 |
(840) 0x43ce36 VFMADD231PD %YMM20,%YMM0,%YMM5 |
(840) 0x43ce3c VFMADD231PD %YMM26,%YMM8,%YMM11 |
(840) 0x43ce42 VMOVUPD %YMM11,(%RAX,%R14,8) |
(840) 0x43ce48 VMOVUPD 0x20(%RAX,%R14,8),%YMM11 |
(840) 0x43ce4f VFMADD231PD %YMM25,%YMM8,%YMM11 |
(840) 0x43ce55 VMOVUPD %YMM11,0x20(%RAX,%R14,8) |
(840) 0x43ce5c LEA (%RAX,%R14,8),%RAX |
(840) 0x43ce60 VMOVUPD (%RDI,%RAX,1),%YMM11 |
(840) 0x43ce65 VFMADD231PD %YMM12,%YMM13,%YMM5 |
(840) 0x43ce6a VFMADD231PD %YMM9,%YMM29,%YMM11 |
(840) 0x43ce70 VMOVUPD %YMM11,(%RDI,%RAX,1) |
(840) 0x43ce75 VMOVUPD 0x20(%RDI,%RAX,1),%YMM11 |
(840) 0x43ce7b VFMADD231PD %YMM9,%YMM5,%YMM11 |
(840) 0x43ce80 VMOVUPD %YMM11,0x20(%RDI,%RAX,1) |
(840) 0x43ce86 LEA (%RAX,%RDI,1),%RAX |
(840) 0x43ce8a VMOVUPD (%RDI,%RAX,1),%YMM11 |
(840) 0x43ce8f VFMADD231PD %YMM26,%YMM22,%YMM11 |
(840) 0x43ce95 VMOVUPD %YMM11,(%RDI,%RAX,1) |
(840) 0x43ce9a VMOVUPD 0x20(%RDI,%RAX,1),%YMM11 |
(840) 0x43cea0 VFMADD231PD %YMM25,%YMM22,%YMM11 |
(840) 0x43cea6 VMOVUPD %YMM11,0x20(%RDI,%RAX,1) |
(840) 0x43ceac LEA (%RAX,%RDI,1),%RAX |
(840) 0x43ceb0 VMOVUPD (%RDI,%RAX,1),%YMM11 |
(840) 0x43ceb5 VFMADD231PD %YMM23,%YMM29,%YMM11 |
(840) 0x43cebb VMOVUPD %YMM11,(%RDI,%RAX,1) |
(840) 0x43cec0 VMOVUPD 0x20(%RDI,%RAX,1),%YMM11 |
(840) 0x43cec6 VFMADD231PD %YMM23,%YMM5,%YMM11 |
(840) 0x43cecc VMOVUPD %YMM11,0x20(%RDI,%RAX,1) |
(840) 0x43ced2 VFMADD213PD %YMM10,%YMM14,%YMM27 |
(840) 0x43ced8 VFMADD231PD %YMM7,%YMM15,%YMM27 |
(840) 0x43cede VFMADD231PD %YMM0,%YMM16,%YMM27 |
(840) 0x43cee4 VFMADD213PD %YMM4,%YMM14,%YMM28 |
(840) 0x43ceea VFMADD231PD %YMM30,%YMM15,%YMM28 |
(840) 0x43cef0 VFMADD231PD %YMM6,%YMM16,%YMM28 |
(840) 0x43cef6 LEA (%RAX,%RDI,1),%RAX |
(840) 0x43cefa VFMADD213PD (%RDI,%RAX,1),%YMM24,%YMM28 |
(840) 0x43cf01 VMOVUPD %YMM28,(%RDI,%RAX,1) |
(840) 0x43cf08 VFMADD213PD 0x20(%RDI,%RAX,1),%YMM24,%YMM27 |
(840) 0x43cf10 VMOVUPD %YMM27,0x20(%RDI,%RAX,1) |
(840) 0x43cf18 VMOVUPD (%R15,%R13,8),%YMM0 |
(840) 0x43cf1e VFMADD231PD %YMM9,%YMM26,%YMM0 |
(840) 0x43cf24 VMOVUPD %YMM0,(%R15,%R13,8) |
(840) 0x43cf2a VMOVUPD 0x20(%R15,%R13,8),%YMM0 |
(840) 0x43cf31 VFMADD231PD %YMM9,%YMM25,%YMM0 |
(840) 0x43cf37 VMOVUPD %YMM0,0x20(%R15,%R13,8) |
(840) 0x43cf3e VMOVUPD (%RCX,%R13,8),%YMM0 |
(840) 0x43cf44 VFMADD231PD %YMM23,%YMM26,%YMM0 |
(840) 0x43cf4a VMOVUPD %YMM0,(%RCX,%R13,8) |
(840) 0x43cf50 VMOVUPD 0x20(%RCX,%R13,8),%YMM0 |
(840) 0x43cf57 VFMADD231PD %YMM23,%YMM25,%YMM0 |
(840) 0x43cf5d VMOVUPD %YMM0,0x20(%RCX,%R13,8) |
(840) 0x43cf64 VFMADD213PD (%RBX,%R13,8),%YMM24,%YMM29 |
(840) 0x43cf6b VMOVUPD %YMM29,(%RBX,%R13,8) |
(840) 0x43cf72 VMOVAPD %YMM3,%YMM29 |
(840) 0x43cf78 VFMADD213PD 0x20(%RBX,%R13,8),%YMM24,%YMM5 |
(840) 0x43cf80 VMOVUPD %YMM5,0x20(%RBX,%R13,8) |
(840) 0x43cf87 VFMADD213PD (%RDX,%R13,8),%YMM24,%YMM26 |
(840) 0x43cf8e VMOVUPD %YMM26,(%RDX,%R13,8) |
(840) 0x43cf95 VFMADD213PD 0x20(%RDX,%R13,8),%YMM24,%YMM25 |
(840) 0x43cf9d VMOVUPD %YMM25,0x20(%RDX,%R13,8) |
(840) 0x43cfa5 ADD $0x8,%R13 |
(840) 0x43cfa9 CMP %R12,%R13 |
(840) 0x43cfac JL 43cd60 |
(838) 0x43cfb2 MOV %R12,%R8 |
(838) 0x43cfb5 CMP 0x20(%RSP),%R12 |
(838) 0x43cfba VMOVUPD 0x170(%RSP),%XMM8 |
(838) 0x43cfc3 VMOVUPD 0x160(%RSP),%XMM9 |
(838) 0x43cfcc VMOVUPD 0x320(%RSP),%YMM10 |
(838) 0x43cfd5 VMOVUPD 0x260(%RSP),%XMM11 |
(838) 0x43cfde VMOVUPD 0x270(%RSP),%XMM12 |
(838) 0x43cfe7 VMOVUPD 0x280(%RSP),%XMM22 |
(838) 0x43cfef VMOVUPD 0x2d0(%RSP),%XMM23 |
(838) 0x43cff7 VMOVUPD 0x2c0(%RSP),%XMM24 |
(838) 0x43cfff VMOVUPD 0x2b0(%RSP),%XMM25 |
(838) 0x43d007 VMOVUPD 0x2a0(%RSP),%XMM26 |
(838) 0x43d00f VMOVUPD 0x290(%RSP),%XMM27 |
(838) 0x43d017 VMOVAPD %YMM20,%YMM19 |
(838) 0x43d01d VMOVAPD %YMM21,%YMM20 |
(838) 0x43d023 VMOVUPD 0xa0(%RSP),%XMM21 |
(838) 0x43d02b VMOVUPD 0x90(%RSP),%XMM28 |
(838) 0x43d033 VMOVUPD 0x80(%RSP),%XMM30 |
(838) 0x43d03b VMOVUPD 0xe0(%RSP),%XMM31 |
(838) 0x43d043 VMOVUPD 0xd0(%RSP),%XMM17 |
(838) 0x43d04b VMOVUPD 0xc0(%RSP),%XMM18 |
(838) 0x43d053 MOV 0x68(%RSP),%RCX |
(838) 0x43d058 MOV 0x60(%RSP),%RDX |
(838) 0x43d05d MOV 0x58(%RSP),%RSI |
(838) 0x43d062 MOV 0x50(%RSP),%RBX |
(838) 0x43d067 JE 43cbb0 |
(838) 0x43d06d JMP 43d085 |
(838) 0x43d070 XOR %R8D,%R8D |
(838) 0x43d073 VMOVAPD %XMM1,%XMM31 |
(838) 0x43d079 VMOVAPD %XMM3,%XMM17 |
(838) 0x43d07f VMOVAPD %XMM2,%XMM18 |
(838) 0x43d085 ADD %R8,%RBX |
(838) 0x43d088 MOV 0x70(%RSP),%RAX |
(838) 0x43d08d LEA (%RAX,%RBX,8),%R9 |
(838) 0x43d091 ADD %R8,%RSI |
(838) 0x43d094 LEA (%RAX,%RSI,8),%R10 |
(838) 0x43d098 ADD %R8,%RDX |
(838) 0x43d09b LEA (%RAX,%RDX,8),%R11 |
(838) 0x43d09f ADD %R8,%RCX |
(838) 0x43d0a2 LEA (%RAX,%RCX,8),%R13 |
(838) 0x43d0a6 MOV 0x20(%RSP),%RBX |
(838) 0x43d0ab SUB %R8,%RBX |
(838) 0x43d0ae MOV 0x30(%RSP),%RAX |
(838) 0x43d0b3 LEA (%RAX,%R8,8),%RSI |
(838) 0x43d0b7 MOV 0x18(%RSP),%R15 |
(838) 0x43d0bc LEA (%R15,%R8,8),%RCX |
(838) 0x43d0c0 MOV 0x8(%RSP),%RAX |
(838) 0x43d0c5 LEA (%RAX,%R8,8),%RAX |
(838) 0x43d0c9 LEA (%R14,%R8,1),%RDX |
(838) 0x43d0cd LEA (%R15,%RDX,8),%R12 |
(838) 0x43d0d1 MOV 0x28(%RSP),%RDX |
(838) 0x43d0d6 LEA (%RDX,%R8,8),%R15 |
(838) 0x43d0da XOR %R8D,%R8D |
(838) 0x43d0dd NOPL (%RAX) |
(839) 0x43d0e0 VMOVSD (%R13,%R8,8),%XMM0 |
(839) 0x43d0e7 VMOVSD (%R9,%R8,8),%XMM4 |
(839) 0x43d0ed VMOVSD (%R11,%R8,8),%XMM5 |
(839) 0x43d0f3 VMOVSD (%R10,%R8,8),%XMM6 |
(839) 0x43d0f9 VUNPCKLPD %XMM6,%XMM5,%XMM7 |
(839) 0x43d0fd VMULPD %XMM7,%XMM10,%XMM7 |
(839) 0x43d101 VMULSD %XMM4,%XMM8,%XMM1 |
(839) 0x43d105 VPERMILPD $0x1,%XMM7,%XMM3 |
(839) 0x43d10b VFMADD231SD %XMM0,%XMM11,%XMM7 |
(839) 0x43d110 VFMADD231SD %XMM27,%XMM1,%XMM3 |
(839) 0x43d116 VADDSD %XMM7,%XMM3,%XMM3 |
(839) 0x43d11a VMULSD %XMM0,%XMM12,%XMM7 |
(839) 0x43d11e VMULSD %XMM22,%XMM5,%XMM2 |
(839) 0x43d124 VFMADD231SD %XMM4,%XMM9,%XMM2 |
(839) 0x43d129 VFMADD231SD %XMM23,%XMM6,%XMM7 |
(839) 0x43d12f VFMADD231SD %XMM2,%XMM8,%XMM7 |
(839) 0x43d134 LEA (%R15,%R8,8),%RDX |
(839) 0x43d138 VMOVSD (%R15,%R8,8),%XMM2 |
(839) 0x43d13e VFMADD231SD %XMM3,%XMM21,%XMM2 |
(839) 0x43d144 VMOVSD %XMM2,(%R15,%R8,8) |
(839) 0x43d14a VMOVSD (%RDX,%R14,8),%XMM2 |
(839) 0x43d150 VFMADD231SD %XMM3,%XMM31,%XMM2 |
(839) 0x43d156 VMOVSD %XMM2,(%RDX,%R14,8) |
(839) 0x43d15c LEA (%RDX,%R14,8),%RDX |
(839) 0x43d160 VMOVSD (%RDI,%RDX,1),%XMM2 |
(839) 0x43d165 VFMADD231SD %XMM28,%XMM7,%XMM2 |
(839) 0x43d16b VMOVSD %XMM2,(%RDI,%RDX,1) |
(839) 0x43d170 LEA (%RDX,%RDI,1),%RDX |
(839) 0x43d174 VMOVSD (%RDI,%RDX,1),%XMM2 |
(839) 0x43d179 VFMADD231SD %XMM3,%XMM18,%XMM2 |
(839) 0x43d17f VMOVSD %XMM2,(%RDI,%RDX,1) |
(839) 0x43d184 LEA (%RDX,%RDI,1),%RDX |
(839) 0x43d188 VMOVSD (%RDI,%RDX,1),%XMM2 |
(839) 0x43d18d VFMADD231SD %XMM17,%XMM7,%XMM2 |
(839) 0x43d193 VMOVSD %XMM2,(%RDI,%RDX,1) |
(839) 0x43d198 LEA (%RDX,%RDI,1),%RDX |
(839) 0x43d19c VFMADD213SD %XMM1,%XMM24,%XMM0 |
(839) 0x43d1a2 VFMADD231SD %XMM5,%XMM25,%XMM0 |
(839) 0x43d1a8 VFMADD231SD %XMM6,%XMM26,%XMM0 |
(839) 0x43d1ae VFMADD213SD (%RDI,%RDX,1),%XMM30,%XMM0 |
(839) 0x43d1b5 VMOVSD %XMM0,(%RDI,%RDX,1) |
(839) 0x43d1ba VMOVSD (%RCX,%R8,8),%XMM0 |
(839) 0x43d1c0 VFMADD231SD %XMM28,%XMM3,%XMM0 |
(839) 0x43d1c6 VMOVSD %XMM0,(%RCX,%R8,8) |
(839) 0x43d1cc VMOVSD (%R12,%R8,8),%XMM0 |
(839) 0x43d1d2 VFMADD231SD %XMM17,%XMM3,%XMM0 |
(839) 0x43d1d8 VMOVSD %XMM0,(%R12,%R8,8) |
(839) 0x43d1de VFMADD213SD (%RAX,%R8,8),%XMM30,%XMM7 |
(839) 0x43d1e5 VMOVSD %XMM7,(%RAX,%R8,8) |
(839) 0x43d1eb VFMADD213SD (%RSI,%R8,8),%XMM30,%XMM3 |
(839) 0x43d1f2 VMOVSD %XMM3,(%RSI,%R8,8) |
(839) 0x43d1f8 INC %R8 |
(839) 0x43d1fb CMP %R8,%RBX |
(839) 0x43d1fe JNE 43d0e0 |
(838) 0x43d204 JMP 43cbb0 |
0x43d210 TEST %EDX,%EDX |
0x43d212 MOV 0x110(%RSP),%R15 |
0x43d21a MOV 0x18(%RSP),%R10 |
0x43d21f MOV 0x28(%RSP),%R11 |
0x43d224 VMOVUPD 0x250(%RSP),%XMM0 |
0x43d22d VMOVUPD 0x240(%RSP),%XMM1 |
0x43d236 VMOVUPD 0x230(%RSP),%XMM2 |
0x43d23f MOV 0x118(%RSP),%RBX |
0x43d247 MOV 0xb8(%RSP),%RAX |
0x43d24f MOV 0xb0(%RSP),%RCX |
0x43d257 JLE 43c3c0 |
0x43d25d VMULSD %XMM1,%XMM1,%XMM17 |
0x43d263 VMULSD %XMM2,%XMM2,%XMM18 |
0x43d269 VMULSD %XMM0,%XMM0,%XMM19 |
0x43d26f VMULSD %XMM1,%XMM2,%XMM3 |
0x43d273 VMULSD %XMM1,%XMM0,%XMM4 |
0x43d277 VMULSD %XMM2,%XMM0,%XMM5 |
0x43d27b MOV %RDX,%RSI |
0x43d27e AND $-0x8,%RSI |
0x43d282 JE 43d410 |
0x43d288 VBROADCASTSD %XMM1,%YMM6 |
0x43d28d VBROADCASTSD %XMM2,%YMM7 |
0x43d292 VBROADCASTSD %XMM0,%YMM8 |
0x43d297 VBROADCASTSD %XMM17,%YMM9 |
0x43d29d VBROADCASTSD %XMM18,%YMM10 |
0x43d2a3 VBROADCASTSD %XMM19,%YMM11 |
0x43d2a9 VBROADCASTSD %XMM3,%YMM12 |
0x43d2ae VBROADCASTSD %XMM4,%YMM13 |
0x43d2b3 VBROADCASTSD %XMM5,%YMM14 |
0x43d2b8 LEA (%R11,%RBX,8),%R8 |
0x43d2bc LEA (%R11,%RCX,8),%R9 |
0x43d2c0 LEA (%R11,%RAX,8),%RDX |
0x43d2c4 MOV 0x38(%RSP),%RAX |
0x43d2c9 LEA (%R11,%RAX,8),%RDI |
0x43d2cd LEA (%R11,%R14,8),%RAX |
0x43d2d1 XOR %ECX,%ECX |
0x43d2d3 MOV 0x8(%RSP),%R12 |
0x43d2d8 MOV 0x40(%RSP),%R13 |
0x43d2dd NOPL (%RAX) |
(836) 0x43d2e0 VMULPD 0x20(%R10,%RCX,8),%YMM6,%YMM15 |
(836) 0x43d2e7 VMULPD (%R10,%RCX,8),%YMM6,%YMM16 |
(836) 0x43d2ee VMOVUPD %YMM16,(%R10,%RCX,8) |
(836) 0x43d2f5 VMOVUPD %YMM15,0x20(%R10,%RCX,8) |
(836) 0x43d2fc VMULPD 0x20(%R13,%RCX,8),%YMM7,%YMM15 |
(836) 0x43d303 VMULPD (%R13,%RCX,8),%YMM7,%YMM16 |
(836) 0x43d30b VMOVUPD %YMM16,(%R13,%RCX,8) |
(836) 0x43d313 VMOVUPD %YMM15,0x20(%R13,%RCX,8) |
(836) 0x43d31a VMULPD 0x20(%R12,%RCX,8),%YMM8,%YMM15 |
(836) 0x43d321 VMULPD (%R12,%RCX,8),%YMM8,%YMM16 |
(836) 0x43d328 VMOVUPD %YMM16,(%R12,%RCX,8) |
(836) 0x43d32f VMOVUPD %YMM15,0x20(%R12,%RCX,8) |
(836) 0x43d336 VMULPD 0x20(%R11,%RCX,8),%YMM9,%YMM15 |
(836) 0x43d33d VMULPD (%R11,%RCX,8),%YMM9,%YMM16 |
(836) 0x43d344 VMOVUPD %YMM16,(%R11,%RCX,8) |
(836) 0x43d34b VMOVUPD %YMM15,0x20(%R11,%RCX,8) |
(836) 0x43d352 VMULPD 0x20(%RDX,%RCX,8),%YMM10,%YMM15 |
(836) 0x43d358 VMULPD (%RDX,%RCX,8),%YMM10,%YMM16 |
(836) 0x43d35f VMOVUPD %YMM16,(%RDX,%RCX,8) |
(836) 0x43d366 VMOVUPD %YMM15,0x20(%RDX,%RCX,8) |
(836) 0x43d36c VMULPD 0x20(%R9,%RCX,8),%YMM11,%YMM15 |
(836) 0x43d373 VMULPD (%R9,%RCX,8),%YMM11,%YMM16 |
(836) 0x43d37a VMOVUPD %YMM16,(%R9,%RCX,8) |
(836) 0x43d381 VMOVUPD %YMM15,0x20(%R9,%RCX,8) |
(836) 0x43d388 VMULPD 0x20(%RAX,%RCX,8),%YMM12,%YMM15 |
(836) 0x43d38e VMULPD (%RAX,%RCX,8),%YMM12,%YMM16 |
(836) 0x43d395 VMOVUPD %YMM16,(%RAX,%RCX,8) |
(836) 0x43d39c VMOVUPD %YMM15,0x20(%RAX,%RCX,8) |
(836) 0x43d3a2 VMULPD 0x20(%RDI,%RCX,8),%YMM13,%YMM15 |
(836) 0x43d3a8 VMULPD (%RDI,%RCX,8),%YMM13,%YMM16 |
(836) 0x43d3af VMOVUPD %YMM16,(%RDI,%RCX,8) |
(836) 0x43d3b6 VMOVUPD %YMM15,0x20(%RDI,%RCX,8) |
(836) 0x43d3bc VMULPD 0x20(%R8,%RCX,8),%YMM14,%YMM15 |
(836) 0x43d3c3 VMULPD (%R8,%RCX,8),%YMM14,%YMM16 |
(836) 0x43d3ca VMOVUPD %YMM16,(%R8,%RCX,8) |
(836) 0x43d3d1 VMOVUPD %YMM15,0x20(%R8,%RCX,8) |
(836) 0x43d3d8 ADD $0x8,%RCX |
(836) 0x43d3dc CMP %RSI,%RCX |
(836) 0x43d3df JL 43d2e0 |
0x43d3e5 MOV 0x20(%RSP),%RDX |
0x43d3ea CMP %RDX,%RSI |
0x43d3ed MOV 0xb8(%RSP),%RAX |
0x43d3f5 MOV 0xb0(%RSP),%RCX |
0x43d3fd JE 43c3c0 |
0x43d403 JMP 43d41c |
0x43d410 XOR %ESI,%ESI |
0x43d412 MOV 0x8(%RSP),%R12 |
0x43d417 MOV 0x40(%RSP),%R13 |
0x43d41c LEA (%R11,%RBX,8),%R8 |
0x43d420 LEA (%R11,%RCX,8),%RCX |
0x43d424 LEA (%R11,%RAX,8),%RAX |
0x43d428 MOV 0x38(%RSP),%RDI |
0x43d42d LEA (%R11,%RDI,8),%RDI |
0x43d431 LEA (%R11,%R14,8),%RBX |
0x43d435 NOPW %CS:(%RAX,%RAX,1) |
(835) 0x43d440 VMULSD (%R10,%RSI,8),%XMM1,%XMM6 |
(835) 0x43d446 VMOVSD %XMM6,(%R10,%RSI,8) |
(835) 0x43d44c VMULSD (%R13,%RSI,8),%XMM2,%XMM6 |
(835) 0x43d453 VMOVSD %XMM6,(%R13,%RSI,8) |
(835) 0x43d45a VMULSD (%R12,%RSI,8),%XMM0,%XMM6 |
(835) 0x43d460 VMOVSD %XMM6,(%R12,%RSI,8) |
(835) 0x43d466 VMULSD (%R11,%RSI,8),%XMM17,%XMM6 |
(835) 0x43d46d VMOVSD %XMM6,(%R11,%RSI,8) |
(835) 0x43d473 VMULSD (%RAX,%RSI,8),%XMM18,%XMM6 |
(835) 0x43d47a VMOVSD %XMM6,(%RAX,%RSI,8) |
(835) 0x43d47f VMULSD (%RCX,%RSI,8),%XMM19,%XMM6 |
(835) 0x43d486 VMOVSD %XMM6,(%RCX,%RSI,8) |
(835) 0x43d48b VMULSD (%RBX,%RSI,8),%XMM3,%XMM6 |
(835) 0x43d490 VMOVSD %XMM6,(%RBX,%RSI,8) |
(835) 0x43d495 VMULSD (%RDI,%RSI,8),%XMM4,%XMM6 |
(835) 0x43d49a VMOVSD %XMM6,(%RDI,%RSI,8) |
(835) 0x43d49f VMULSD (%R8,%RSI,8),%XMM5,%XMM6 |
(835) 0x43d4a5 VMOVSD %XMM6,(%R8,%RSI,8) |
(835) 0x43d4ab INC %RSI |
(835) 0x43d4ae CMP %RSI,%RDX |
(835) 0x43d4b1 JNE 43d440 |
0x43d4b3 JMP 43c3c0 |
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVectorOps.h: 59 - 59 |
-------------------------------------------------------------------------------- |
59: for (unsigned d = 0; d < D; ++d) |
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp: 47 - 49 |
-------------------------------------------------------------------------------- |
47: T sf = std::floor(x); |
48: T dx2 = x - sf; |
49: int ind2 = std::min(std::max(0, static_cast<int>(sf)), nmax); |
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineRef.hpp: 193 - 295 |
-------------------------------------------------------------------------------- |
193: y -= spline_m->y_grid.start; |
194: z -= spline_m->z_grid.start; |
195: spline2::getSplineBound(x * spline_m->x_grid.delta_inv, tx, ix, spline_m->x_grid.num - 1); |
196: spline2::getSplineBound(y * spline_m->y_grid.delta_inv, ty, iy, spline_m->y_grid.num - 1); |
197: spline2::getSplineBound(z * spline_m->z_grid.delta_inv, tz, iz, spline_m->z_grid.num - 1); |
[...] |
203: const intptr_t xs = spline_m->x_stride; |
204: const intptr_t ys = spline_m->y_stride; |
205: const intptr_t zs = spline_m->z_stride; |
206: |
207: const size_t out_offset = spline_m->num_splines; |
208: |
209: T* restrict gx = grads; |
210: T* restrict gy = grads + out_offset; |
211: T* restrict gz = grads + 2 * out_offset; |
212: |
213: T* restrict hxx = hess; |
214: T* restrict hxy = hess + out_offset; |
215: T* restrict hxz = hess + 2 * out_offset; |
216: T* restrict hyy = hess + 3 * out_offset; |
217: T* restrict hyz = hess + 4 * out_offset; |
218: T* restrict hzz = hess + 5 * out_offset; |
[...] |
233: for (int i = 0; i < 4; i++) |
234: for (int j = 0; j < 4; j++) |
235: { |
236: const T* restrict coefs = spline_m->coefs + (ix + i) * xs + (iy + j) * ys + iz * zs; |
237: const T* restrict coefszs = coefs + zs; |
238: const T* restrict coefs2zs = coefs + 2 * zs; |
239: const T* restrict coefs3zs = coefs + 3 * zs; |
240: |
241: const T pre20 = d2a[i] * b[j]; |
242: const T pre10 = da[i] * b[j]; |
243: const T pre00 = a[i] * b[j]; |
244: const T pre11 = da[i] * db[j]; |
245: const T pre01 = a[i] * db[j]; |
246: const T pre02 = a[i] * d2b[j]; |
247: |
248: const int iSplitPoint = num_splines; |
249: #pragma omp simd aligned(coefs, coefszs, coefs2zs, coefs3zs: QMC_SIMD_ALIGNMENT) simdlen(simdlen_) |
250: for (int n = 0; n < iSplitPoint; n++) |
251: { |
252: T coefsv = coefs[n]; |
253: T coefsvzs = coefszs[n]; |
254: T coefsv2zs = coefs2zs[n]; |
255: T coefsv3zs = coefs3zs[n]; |
256: |
257: T sum0 = c[0] * coefsv + c[1] * coefsvzs + c[2] * coefsv2zs + c[3] * coefsv3zs; |
258: T sum1 = dc[0] * coefsv + dc[1] * coefsvzs + dc[2] * coefsv2zs + dc[3] * coefsv3zs; |
259: T sum2 = d2c[0] * coefsv + d2c[1] * coefsvzs + d2c[2] * coefsv2zs + d2c[3] * coefsv3zs; |
260: |
261: hxx[n] += pre20 * sum0; |
262: hxy[n] += pre11 * sum0; |
263: hxz[n] += pre10 * sum1; |
264: hyy[n] += pre02 * sum0; |
265: hyz[n] += pre01 * sum1; |
266: hzz[n] += pre00 * sum2; |
267: gx[n] += pre10 * sum0; |
268: gy[n] += pre01 * sum0; |
269: gz[n] += pre00 * sum1; |
270: vals[n] += pre00 * sum0; |
[...] |
277: const T dxx = dxInv * dxInv; |
278: const T dyy = dyInv * dyInv; |
279: const T dzz = dzInv * dzInv; |
280: const T dxy = dxInv * dyInv; |
281: const T dxz = dxInv * dzInv; |
282: const T dyz = dyInv * dzInv; |
283: |
284: #pragma omp simd simdlen(simdlen_) |
285: for (int n = 0; n < num_splines; n++) |
286: { |
287: gx[n] *= dxInv; |
288: gy[n] *= dyInv; |
289: gz[n] *= dzInv; |
290: hxx[n] *= dxx; |
291: hyy[n] *= dyy; |
292: hzz[n] *= dzz; |
293: hxy[n] *= dxy; |
294: hxz[n] *= dxz; |
295: hyz[n] *= dyz; |
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/einspline_spo_ref.hpp: 206 - 208 |
-------------------------------------------------------------------------------- |
206: for (int i = 0; i < nBlocks; ++i) |
207: MultiBsplineEvalRef::evaluate_vgh(einsplines[i], u[0], u[1], u[2], psi[i].data(), grad[i].data(), hess[i].data(), |
208: nSplinesPerBlock); |
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineData.hpp: 68 - 79 |
-------------------------------------------------------------------------------- |
68: a[0] = ((A00 * tx + A01) * tx + A02) * tx + A03; |
69: a[1] = ((A10 * tx + A11) * tx + A12) * tx + A13; |
70: a[2] = ((A20 * tx + A21) * tx + A22) * tx + A23; |
71: a[3] = ((A30 * tx + A31) * tx + A32) * tx + A33; |
72: da[0] = (dA01 * tx + dA02) * tx + dA03; |
73: da[1] = (dA11 * tx + dA12) * tx + dA13; |
74: da[2] = (dA21 * tx + dA22) * tx + dA23; |
75: da[3] = (dA31 * tx + dA32) * tx + dA33; |
76: d2a[0] = d2A02 * tx + d2A03; |
77: d2a[1] = d2A12 * tx + d2A13; |
78: d2a[2] = d2A22 * tx + d2A23; |
79: d2a[3] = d2A32 * tx + d2A33; |
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/VectorSoAContainer.h: 237 - 237 |
-------------------------------------------------------------------------------- |
237: T* data() { return myData; } |
/usr/lib64/gcc/x86_64-pc-linux-gnu/13.1.1/../../../../include/c++/13.1.1/bits/stl_algobase.h: 238 - 931 |
-------------------------------------------------------------------------------- |
238: if (__b < __a) |
[...] |
930: for (; __first != __last; ++__first) |
931: *__first = __tmp; |
/usr/lib64/gcc/x86_64-pc-linux-gnu/13.1.1/../../../../include/c++/13.1.1/bits/stl_vector.h: 1126 - 1258 |
-------------------------------------------------------------------------------- |
1126: return *(this->_M_impl._M_start + __n); |
[...] |
1258: { return _M_data_ptr(this->_M_impl._M_start); } |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | miniqmcreference::DiracDetermi[...] | DiracDeterminantRef.cpp:100 | exec |
○ | qmcplusplus::WaveFunction::rat[...] | WaveFunction.cpp:202 | exec |
○ | main.extracted.104 | refwrap.h:347 | exec |
○ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_fork_call | libiomp5.so | |
○ | __kmpc_fork_call | libiomp5.so | |
○ | main | miniqmc.cpp:404 | exec |
○ | __libc_init_first | libc.so.6 |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.52 |
CQA speedup if FP arith vectorized | 1.40 |
CQA speedup if fully vectorized | 6.85 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.25 |
Bottlenecks | micro-operation queue, |
Function | miniqmcreference::einspline_spo_ref |
Source | TinyVectorOps.h:59-59,MultiBsplineEvalHelper.hpp:47-49,MultiBsplineRef.hpp:193-295,einspline_spo_ref.hpp:206-208,MultiBsplineData.hpp:68-79,VectorSoAContainer.h:237-237,stl_algobase.h:238-931,stl_vector.h:1126-1258 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 102.25 |
CQA cycles if no scalar integer | 67.25 |
CQA cycles if FP arith vectorized | 73.25 |
CQA cycles if fully vectorized | 14.94 |
Front-end cycles | 102.25 |
DIV/SQRT cycles | 55.67 |
P0 cycles | 55.83 |
P1 cycles | 56.50 |
P2 cycles | 56.17 |
P3 cycles | 82.00 |
P4 cycles | 55.50 |
P5 cycles | 29.00 |
P6 cycles | 56.33 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 107.53 |
Stall cycles (UFS) | 8.07 |
Nb insns | 388.00 |
Nb uops | 409.00 |
Nb loads | 87.00 |
Nb stores | 72.00 |
Nb stack references | 74.00 |
FLOP/cycle | 1.16 |
Nb FLOP add-sub | 19.00 |
Nb FLOP mul | 30.00 |
Nb FLOP fma | 35.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 17.21 |
Bytes prefetched | 0.00 |
Bytes loaded | 844.00 |
Bytes stored | 916.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 35.91 |
Vectorization ratio load | 43.48 |
Vectorization ratio store | 37.50 |
Vectorization ratio mul | 28.00 |
Vectorization ratio add_sub | 41.18 |
Vectorization ratio fma | 9.38 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 44.44 |
Vector-efficiency ratio all | 17.88 |
Vector-efficiency ratio load | 17.93 |
Vector-efficiency ratio store | 19.88 |
Vector-efficiency ratio mul | 16.00 |
Vector-efficiency ratio add_sub | 18.75 |
Vector-efficiency ratio fma | 13.67 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 18.23 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.52 |
CQA speedup if FP arith vectorized | 1.40 |
CQA speedup if fully vectorized | 6.85 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.25 |
Bottlenecks | micro-operation queue, |
Function | miniqmcreference::einspline_spo_ref |
Source | TinyVectorOps.h:59-59,MultiBsplineEvalHelper.hpp:47-49,MultiBsplineRef.hpp:193-295,einspline_spo_ref.hpp:206-208,MultiBsplineData.hpp:68-79,VectorSoAContainer.h:237-237,stl_algobase.h:238-931,stl_vector.h:1126-1258 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 102.25 |
CQA cycles if no scalar integer | 67.25 |
CQA cycles if FP arith vectorized | 73.25 |
CQA cycles if fully vectorized | 14.94 |
Front-end cycles | 102.25 |
DIV/SQRT cycles | 55.67 |
P0 cycles | 55.83 |
P1 cycles | 56.50 |
P2 cycles | 56.17 |
P3 cycles | 82.00 |
P4 cycles | 55.50 |
P5 cycles | 29.00 |
P6 cycles | 56.33 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 107.53 |
Stall cycles (UFS) | 8.07 |
Nb insns | 388.00 |
Nb uops | 409.00 |
Nb loads | 87.00 |
Nb stores | 72.00 |
Nb stack references | 74.00 |
FLOP/cycle | 1.16 |
Nb FLOP add-sub | 19.00 |
Nb FLOP mul | 30.00 |
Nb FLOP fma | 35.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 17.21 |
Bytes prefetched | 0.00 |
Bytes loaded | 844.00 |
Bytes stored | 916.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 35.91 |
Vectorization ratio load | 43.48 |
Vectorization ratio store | 37.50 |
Vectorization ratio mul | 28.00 |
Vectorization ratio add_sub | 41.18 |
Vectorization ratio fma | 9.38 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 44.44 |
Vector-efficiency ratio all | 17.88 |
Vector-efficiency ratio load | 17.93 |
Vector-efficiency ratio store | 19.88 |
Vector-efficiency ratio mul | 16.00 |
Vector-efficiency ratio add_sub | 18.75 |
Vector-efficiency ratio fma | 13.67 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 18.23 |
Path / |
Function | miniqmcreference::einspline_spo_ref |
Source file and lines | TinyVectorOps.h:59-59 |
Module | exec |
nb instructions | 388 |
nb uops | 409 |
loop length | 2205 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 26 |
used ymm registers | 17 |
used zmm registers | 0 |
nb stack references | 74 |
ADD-SUB / MUL ratio | 0.58 |
micro-operation queue | 102.25 cycles |
front end | 102.25 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 55.67 | 55.83 | 56.50 | 56.17 | 82.00 | 55.50 | 29.00 | 56.33 |
cycles | 55.67 | 55.83 | 56.50 | 56.17 | 82.00 | 55.50 | 29.00 | 56.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 107.53 |
Stall cycles | 8.07 |
RS full (events) | 14.12 |
Front-end | 102.25 |
Dispatch | 82.00 |
Overall L1 | 102.25 |
all | 29% |
load | 44% |
store | 14% |
mul | 100% |
add-sub | 66% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 36% |
all | 37% |
load | 43% |
store | 52% |
mul | 25% |
add-sub | 35% |
fma | 9% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 47% |
all | 35% |
load | 43% |
store | 37% |
mul | 28% |
add-sub | 41% |
fma | 9% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 44% |
all | 16% |
load | 15% |
store | 15% |
mul | 25% |
add-sub | 27% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 16% |
all | 18% |
load | 18% |
store | 22% |
mul | 15% |
add-sub | 16% |
fma | 13% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 18% |
all | 17% |
load | 17% |
store | 19% |
mul | 16% |
add-sub | 18% |
fma | 13% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 18% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
MOV 0x120(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
INC %RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOVSXD 0x30(%R15),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP %RAX,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JGE 43d4b8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV 0x2e8(%R15),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x300(%R15),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RAX,%RDX,8),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RDX,%RDX,2),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RCX,%RAX,8),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x318(%R15),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RDX,0x120(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA (,%RDX,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RCX,%RCX,4),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RAX,%RCX,1),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x330(%R15),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x18(%RAX,%RCX,1),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOVSXD 0x40(%R15),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVUPD 0x210(%RSP),%XMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VSUBSD 0x78(%RSI),%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x98(%RSI),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVUPD %XMM1,0x250(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMULSD %XMM0,%XMM1,%XMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x88(%RSI),%R10D | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
DEC %R10D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VROUNDSD $0x9,%XMM8,%XMM8,%XMM9 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VCVTTSD2SI %XMM9,%EAX | 2 | 1.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 6 | 1 |
MOV %EAX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
SAR $0x1f,%ECX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
ANDN %EAX,%ECX,%EAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x28(%RSI),%XMM2 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVHPD 0x50(%RSI),%XMM2,%XMM2 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 4 | 1 |
VMOVUPD 0x220(%RSP),%XMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VSUBPD %XMM2,%XMM0,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x48(%RSI),%XMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x70(%RSI),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVUPD %XMM0,0x240(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVUPD %XMM1,0x230(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VUNPCKLPD %XMM1,%XMM0,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMULPD %XMM2,%XMM3,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VRNDSCALEPD $0x9,%XMM2,%XMM18 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VMOVD 0x38(%RSI),%XMM3 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VPINSRD $0x1,0x60(%RSI),%XMM3,%XMM19 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 |
VSUBPD %XMM18,%XMM2,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x5c9bf(%RIP),%XMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMULSD %XMM2,%XMM10,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x59b43(%RIP),%XMM12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VSUBSD %XMM3,%XMM12,%XMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %XMM2,%XMM2,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVDDUP %XMM2,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMOVUPD 0x200(%RSP),%XMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VBLENDPD $0x1,%XMM4,%XMM0,%XMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 1 | 0.33 |
VMULPD %XMM4,%XMM6,%XMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD 0x5cb6c(%RIP),%XMM11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VADDPD %XMM4,%XMM11,%XMM6 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VUNPCKLPD %XMM5,%XMM2,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMOVUPD 0x5cb6c(%RIP),%XMM13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD213PD %XMM13,%XMM6,%XMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD %XMM7,0x300(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVAPD %XMM2,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVSD 0x59b5a(%RIP),%XMM14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD213SD %XMM12,%XMM14,%XMM6 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD213SD %XMM12,%XMM2,%XMM6 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD213SD %XMM10,%XMM2,%XMM6 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM6,0x310(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMULSD %XMM5,%XMM3,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM3,0x318(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVAPD %XMM2,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVSD 0x59ad9(%RIP),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD213SD %XMM1,%XMM14,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD213SD %XMM14,%XMM2,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM3,0x1e0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVAPD %XMM2,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVSD 0x5c91a(%RIP),%XMM15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x59ae8(%RIP),%XMM16 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD213SD %XMM16,%XMM15,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM2,%XMM3,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM3,0x1e8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVAPD %XMM2,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VFMSUB213SD %XMM1,%XMM15,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFNMADD213SD %XMM12,%XMM2,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM3,0x1f0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VPERMILPD $0x1,%XMM4,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMULSD %XMM2,%XMM3,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM3,0x1f8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VSUBSD %XMM2,%XMM1,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM3,0x1a0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVAPD %XMM2,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVSD 0x5bb48(%RIP),%XMM17 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD213SD %XMM16,%XMM17,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM3,0x1a8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
CMP %EAX,%R10D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVAPD %XMM2,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VFNMADD213SD %XMM1,%XMM17,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM3,0x1b0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVLPD %XMM2,0x1b8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VPERMILPD $0x1,%XMM2,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMULSD %XMM3,%XMM10,%XMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VSUBSD %XMM4,%XMM12,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM3,%XMM3,%XMM6 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VPERMILPD $0x3,%XMM2,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VBLENDPD $0x1,%XMM5,%XMM0,%XMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 1 | 0.33 |
VMULPD %XMM5,%XMM7,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDPD %XMM5,%XMM11,%XMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VSHUFPD $0x1,%XMM6,%XMM2,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VFMADD213PD %XMM13,%XMM7,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD %XMM0,0x2e0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVAPD %XMM3,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VFMADD213SD %XMM12,%XMM14,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD213SD %XMM12,%XMM3,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD213SD %XMM10,%XMM3,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM0,0x2f0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMULSD %XMM6,%XMM4,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM0,0x2f8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVAPD %XMM3,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VFMADD213SD %XMM1,%XMM14,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD213SD %XMM14,%XMM3,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM0,0x1c0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
CMOVGE %EAX,%R10D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
VMOVAPD %XMM3,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VFMADD213SD %XMM16,%XMM15,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM3,%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM0,0x1c8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVAPD %XMM3,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VFMSUB213SD %XMM1,%XMM15,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFNMADD213SD %XMM12,%XMM3,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM0,0x1d0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMULPD %XMM2,%XMM5,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVHPD %XMM0,0x1d8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VSUBSD %XMM3,%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM0,0x180(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVAPD %XMM3,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VFMADD213SD %XMM16,%XMM17,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM0,0x188(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VFNMADD213SD %XMM1,%XMM17,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM3,0x190(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVHPD %XMM2,0x198(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOVSXD 0xe8(%RSI),%R14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%R14,%R14,1),%R11 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%R14,4),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VSUBSD %XMM9,%XMM8,%XMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM8,%XMM8,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM14,%XMM8,%XMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDSD %XMM4,%XMM12,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD 0x5c964(%RIP),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VUNPCKLPD %XMM0,%XMM1,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMOVDDUP %XMM8,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMULPD %XMM0,%XMM1,%XMM9 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDPD 0x5c90f(%RIP),%XMM9,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VUNPCKLPD %XMM1,%XMM5,%XMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VFMADD213PD 0x5c912(%RIP),%XMM0,%XMM10 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVDQU 0x10(%RSI),%XMM6 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x20(%RSI),%R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%R14,%R14,2),%RBX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R14,%R14,4),%R12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RDX,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %RDX,0x20(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVUPD %XMM8,0x170(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVUPD %XMM9,0x160(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVUPD %YMM10,0x320(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R8,0x18(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R9,0x28(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RDI,0x30(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R11,0x38(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RAX,0x118(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JE 43c90f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
LEA (%R9,%R12,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0xd0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA (%R9,%RAX,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0xc0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA (%R9,%RBX,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x68(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA (%R9,%R11,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x60(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA (%R9,%R14,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x58(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA (%R8,%R11,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x50(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA (%R8,%R14,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x48(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA (,%RDX,8),%R15 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10D,0x8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RSI,0x10(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVUPD %XMM18,0x70(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVDQU64 %XMM19,0xa0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 4 | 1 |
VMOVUPD %XMM5,0x90(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVDQU %XMM6,0x80(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 4 | 1 |
VMOVSD %XMM4,0xe0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 4879b0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV 0x18(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 4879b0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV 0x48(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 4879b0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV 0x50(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 4879b0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV 0x28(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 4879b0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV 0x58(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 4879b0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV 0x60(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 4879b0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV 0x68(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 4879b0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV 0xc0(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 4879b0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV 0xd0(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 4879b0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
VMOVSD 0xe0(%RSP),%XMM4 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVDQU 0x80(%RSP),%XMM6 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD 0x90(%RSP),%XMM5 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x38(%RSP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVDQU64 0xa0(%RSP),%XMM19 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD 0x70(%RSP),%XMM18 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x8(%RSP),%R10D | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x10(%RSP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x18(%RSP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVUPD 0x320(%RSP),%YMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 |
VMOVUPD 0x160(%RSP),%XMM9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVUPD 0x170(%RSP),%XMM8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x20(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R12,0xb0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RBX,0xb8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD 0x5c559(%RIP),%XMM2 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVAPD %XMM2,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVSD 0x596dd(%RIP),%XMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMSUB213SD %XMM0,%XMM8,%XMM11 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x59738(%RIP),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMSUB213SD %XMM1,%XMM8,%XMM11 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFNMADD213SD %XMM2,%XMM8,%XMM11 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x596d6(%RIP),%XMM3 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VADDSD %XMM3,%XMM4,%XMM12 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD213SD %XMM1,%XMM8,%XMM12 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %XMM8,%XMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVSD 0x5c51f(%RIP),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x596ef(%RIP),%XMM4 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD213SD %XMM4,%XMM1,%XMM22 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %XMM8,%XMM23 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VFMSUB213SD %XMM3,%XMM1,%XMM23 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFNMADD213SD %XMM0,%XMM8,%XMM23 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VSUBSD %XMM8,%XMM3,%XMM24 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %XMM8,%XMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVSD 0x5b77b(%RIP),%XMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD213SD %XMM4,%XMM0,%XMM25 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %XMM8,%XMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VFNMADD213SD %XMM3,%XMM0,%XMM26 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VPCMPEQD %XMM0,%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VPADDD %XMM0,%XMM19,%XMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 1 | 0.33 |
VCVTTPD2DQ %XMM18,%XMM1 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 5 | 1 |
VPMAXSD 0x59e38(%RIP),%XMM1,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VPMINSD %XMM1,%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%RSI),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,0x70(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOVSXD %R10D,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %R13,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VPMOVSXDQ %XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VPMULLQ %XMM0,%XMM6,%XMM3 | 3 | 1.50 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
IMUL %RAX,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMULSD %XMM2,%XMM5,%XMM27 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVQ %XMM6,0x128(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VPEXTRQ $0x1,%XMM6,0x140(%RSP) | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 1 | 0 | 0.33 | 3 | 1 |
LEA (%RCX,%R13,1),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x2(%RAX),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R13,%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD $0x3,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
IMUL %R13,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVQ %RAX,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMOVQ %RSI,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VPUNPCKLQDQ %XMM0,%XMM1,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMOVQ %RCX,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMOVQ %RDI,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VPUNPCKLQDQ %XMM2,%XMM1,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VINSERTI128 $0x1,%XMM0,%YMM1,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM3,0x400(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 4 | 1 |
VPERMQ $0x55,%YMM3,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VPADDQ %YMM1,%YMM0,%YMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 1 | 0.33 |
VMOVDQU %YMM0,0x3e0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 4 | 1 |
MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
AND $-0x8,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %RAX,0x138(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VBROADCASTSD %XMM11,%YMM29 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM10,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VMOVUPD %YMM0,0x3c0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VPERMPD $0x55,%YMM10,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VMOVUPD %YMM0,0x3a0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VBROADCASTSD %XMM8,%YMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM27,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VMOVUPD %YMM0,0x380(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VBROADCASTSD %XMM12,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VMOVUPD %YMM0,0x360(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VBROADCASTSD %XMM22,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VMOVUPD %YMM0,0x340(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VBROADCASTSD %XMM23,%YMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM9,%YMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM24,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM25,%YMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM26,%YMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
LEA (%R8,%R11,8),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA (%R8,%R14,8),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x40(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA (,%R14,8),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVUPD %XMM23,0x2d0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVUPD %XMM24,0x2c0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVUPD %XMM25,0x2b0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVUPD %XMM26,0x2a0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVUPD %XMM27,0x290(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVUPD %XMM22,0x280(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVUPD %XMM12,0x270(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVUPD %XMM11,0x260(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JMP 43cb56 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
TEST %EDX,%EDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV 0x110(%RSP),%R15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x18(%RSP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x28(%RSP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVUPD 0x250(%RSP),%XMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVUPD 0x240(%RSP),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVUPD 0x230(%RSP),%XMM2 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x118(%RSP),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xb8(%RSP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xb0(%RSP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
JLE 43c3c0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VMULSD %XMM1,%XMM1,%XMM17 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM2,%XMM2,%XMM18 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM0,%XMM0,%XMM19 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM1,%XMM2,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM1,%XMM0,%XMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM2,%XMM0,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RDX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
AND $-0x8,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 43d410 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VBROADCASTSD %XMM1,%YMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM2,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM0,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM17,%YMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM18,%YMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM19,%YMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM3,%YMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM4,%YMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM5,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
LEA (%R11,%RBX,8),%R8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R11,%RCX,8),%R9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R11,%RAX,8),%RDX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RSP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%R11,%RAX,8),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R11,%R14,8),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV 0x8(%RSP),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x40(%RSP),%R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV 0x20(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP %RDX,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV 0xb8(%RSP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xb0(%RSP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
JE 43c3c0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
JMP 43d41c | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV 0x8(%RSP),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x40(%RSP),%R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%R11,%RBX,8),%R8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R11,%RCX,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R11,%RAX,8),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%R11,%RDI,8),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R11,%R14,8),%RBX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 43c3c0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
Function | miniqmcreference::einspline_spo_ref |
Source file and lines | TinyVectorOps.h:59-59 |
Module | exec |
nb instructions | 388 |
nb uops | 409 |
loop length | 2205 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 26 |
used ymm registers | 17 |
used zmm registers | 0 |
nb stack references | 74 |
ADD-SUB / MUL ratio | 0.58 |
micro-operation queue | 102.25 cycles |
front end | 102.25 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 55.67 | 55.83 | 56.50 | 56.17 | 82.00 | 55.50 | 29.00 | 56.33 |
cycles | 55.67 | 55.83 | 56.50 | 56.17 | 82.00 | 55.50 | 29.00 | 56.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 107.53 |
Stall cycles | 8.07 |
RS full (events) | 14.12 |
Front-end | 102.25 |
Dispatch | 82.00 |
Overall L1 | 102.25 |
all | 29% |
load | 44% |
store | 14% |
mul | 100% |
add-sub | 66% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 36% |
all | 37% |
load | 43% |
store | 52% |
mul | 25% |
add-sub | 35% |
fma | 9% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 47% |
all | 35% |
load | 43% |
store | 37% |
mul | 28% |
add-sub | 41% |
fma | 9% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 44% |
all | 16% |
load | 15% |
store | 15% |
mul | 25% |
add-sub | 27% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 16% |
all | 18% |
load | 18% |
store | 22% |
mul | 15% |
add-sub | 16% |
fma | 13% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 18% |
all | 17% |
load | 17% |
store | 19% |
mul | 16% |
add-sub | 18% |
fma | 13% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 18% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
MOV 0x120(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
INC %RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOVSXD 0x30(%R15),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP %RAX,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JGE 43d4b8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV 0x2e8(%R15),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x300(%R15),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RAX,%RDX,8),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RDX,%RDX,2),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RCX,%RAX,8),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x318(%R15),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RDX,0x120(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA (,%RDX,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RCX,%RCX,4),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RAX,%RCX,1),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x330(%R15),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x18(%RAX,%RCX,1),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOVSXD 0x40(%R15),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVUPD 0x210(%RSP),%XMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VSUBSD 0x78(%RSI),%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x98(%RSI),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVUPD %XMM1,0x250(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMULSD %XMM0,%XMM1,%XMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x88(%RSI),%R10D | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
DEC %R10D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VROUNDSD $0x9,%XMM8,%XMM8,%XMM9 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VCVTTSD2SI %XMM9,%EAX | 2 | 1.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 6 | 1 |
MOV %EAX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
SAR $0x1f,%ECX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
ANDN %EAX,%ECX,%EAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x28(%RSI),%XMM2 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVHPD 0x50(%RSI),%XMM2,%XMM2 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 4 | 1 |
VMOVUPD 0x220(%RSP),%XMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VSUBPD %XMM2,%XMM0,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x48(%RSI),%XMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x70(%RSI),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVUPD %XMM0,0x240(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVUPD %XMM1,0x230(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VUNPCKLPD %XMM1,%XMM0,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMULPD %XMM2,%XMM3,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VRNDSCALEPD $0x9,%XMM2,%XMM18 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VMOVD 0x38(%RSI),%XMM3 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VPINSRD $0x1,0x60(%RSI),%XMM3,%XMM19 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 |
VSUBPD %XMM18,%XMM2,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x5c9bf(%RIP),%XMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMULSD %XMM2,%XMM10,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x59b43(%RIP),%XMM12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VSUBSD %XMM3,%XMM12,%XMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %XMM2,%XMM2,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVDDUP %XMM2,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMOVUPD 0x200(%RSP),%XMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VBLENDPD $0x1,%XMM4,%XMM0,%XMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 1 | 0.33 |
VMULPD %XMM4,%XMM6,%XMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD 0x5cb6c(%RIP),%XMM11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VADDPD %XMM4,%XMM11,%XMM6 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VUNPCKLPD %XMM5,%XMM2,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMOVUPD 0x5cb6c(%RIP),%XMM13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD213PD %XMM13,%XMM6,%XMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD %XMM7,0x300(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVAPD %XMM2,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVSD 0x59b5a(%RIP),%XMM14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD213SD %XMM12,%XMM14,%XMM6 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD213SD %XMM12,%XMM2,%XMM6 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD213SD %XMM10,%XMM2,%XMM6 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM6,0x310(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMULSD %XMM5,%XMM3,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM3,0x318(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVAPD %XMM2,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVSD 0x59ad9(%RIP),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD213SD %XMM1,%XMM14,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD213SD %XMM14,%XMM2,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM3,0x1e0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVAPD %XMM2,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVSD 0x5c91a(%RIP),%XMM15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x59ae8(%RIP),%XMM16 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD213SD %XMM16,%XMM15,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM2,%XMM3,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM3,0x1e8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVAPD %XMM2,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VFMSUB213SD %XMM1,%XMM15,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFNMADD213SD %XMM12,%XMM2,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM3,0x1f0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VPERMILPD $0x1,%XMM4,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMULSD %XMM2,%XMM3,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM3,0x1f8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VSUBSD %XMM2,%XMM1,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM3,0x1a0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVAPD %XMM2,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVSD 0x5bb48(%RIP),%XMM17 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD213SD %XMM16,%XMM17,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM3,0x1a8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
CMP %EAX,%R10D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVAPD %XMM2,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VFNMADD213SD %XMM1,%XMM17,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM3,0x1b0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVLPD %XMM2,0x1b8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VPERMILPD $0x1,%XMM2,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMULSD %XMM3,%XMM10,%XMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VSUBSD %XMM4,%XMM12,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM3,%XMM3,%XMM6 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VPERMILPD $0x3,%XMM2,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VBLENDPD $0x1,%XMM5,%XMM0,%XMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 1 | 0.33 |
VMULPD %XMM5,%XMM7,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDPD %XMM5,%XMM11,%XMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VSHUFPD $0x1,%XMM6,%XMM2,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VFMADD213PD %XMM13,%XMM7,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD %XMM0,0x2e0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVAPD %XMM3,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VFMADD213SD %XMM12,%XMM14,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD213SD %XMM12,%XMM3,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD213SD %XMM10,%XMM3,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM0,0x2f0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMULSD %XMM6,%XMM4,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM0,0x2f8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVAPD %XMM3,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VFMADD213SD %XMM1,%XMM14,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD213SD %XMM14,%XMM3,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM0,0x1c0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
CMOVGE %EAX,%R10D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
VMOVAPD %XMM3,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VFMADD213SD %XMM16,%XMM15,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM3,%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM0,0x1c8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVAPD %XMM3,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VFMSUB213SD %XMM1,%XMM15,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFNMADD213SD %XMM12,%XMM3,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM0,0x1d0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMULPD %XMM2,%XMM5,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVHPD %XMM0,0x1d8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VSUBSD %XMM3,%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM0,0x180(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVAPD %XMM3,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VFMADD213SD %XMM16,%XMM17,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM0,0x188(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VFNMADD213SD %XMM1,%XMM17,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM3,0x190(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVHPD %XMM2,0x198(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOVSXD 0xe8(%RSI),%R14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%R14,%R14,1),%R11 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%R14,4),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VSUBSD %XMM9,%XMM8,%XMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM8,%XMM8,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM14,%XMM8,%XMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDSD %XMM4,%XMM12,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD 0x5c964(%RIP),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VUNPCKLPD %XMM0,%XMM1,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMOVDDUP %XMM8,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMULPD %XMM0,%XMM1,%XMM9 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDPD 0x5c90f(%RIP),%XMM9,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VUNPCKLPD %XMM1,%XMM5,%XMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VFMADD213PD 0x5c912(%RIP),%XMM0,%XMM10 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVDQU 0x10(%RSI),%XMM6 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x20(%RSI),%R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%R14,%R14,2),%RBX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R14,%R14,4),%R12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RDX,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %RDX,0x20(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVUPD %XMM8,0x170(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVUPD %XMM9,0x160(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVUPD %YMM10,0x320(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R8,0x18(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R9,0x28(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RDI,0x30(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R11,0x38(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RAX,0x118(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JE 43c90f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
LEA (%R9,%R12,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0xd0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA (%R9,%RAX,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0xc0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA (%R9,%RBX,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x68(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA (%R9,%R11,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x60(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA (%R9,%R14,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x58(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA (%R8,%R11,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x50(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA (%R8,%R14,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x48(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA (,%RDX,8),%R15 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10D,0x8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RSI,0x10(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVUPD %XMM18,0x70(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVDQU64 %XMM19,0xa0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 4 | 1 |
VMOVUPD %XMM5,0x90(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVDQU %XMM6,0x80(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 4 | 1 |
VMOVSD %XMM4,0xe0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 4879b0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV 0x18(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 4879b0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV 0x48(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 4879b0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV 0x50(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 4879b0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV 0x28(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 4879b0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV 0x58(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 4879b0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV 0x60(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 4879b0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV 0x68(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 4879b0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV 0xc0(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 4879b0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV 0xd0(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 4879b0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
VMOVSD 0xe0(%RSP),%XMM4 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVDQU 0x80(%RSP),%XMM6 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD 0x90(%RSP),%XMM5 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x38(%RSP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVDQU64 0xa0(%RSP),%XMM19 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD 0x70(%RSP),%XMM18 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x8(%RSP),%R10D | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x10(%RSP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x18(%RSP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVUPD 0x320(%RSP),%YMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 |
VMOVUPD 0x160(%RSP),%XMM9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVUPD 0x170(%RSP),%XMM8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x20(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R12,0xb0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RBX,0xb8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD 0x5c559(%RIP),%XMM2 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVAPD %XMM2,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVSD 0x596dd(%RIP),%XMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMSUB213SD %XMM0,%XMM8,%XMM11 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x59738(%RIP),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMSUB213SD %XMM1,%XMM8,%XMM11 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFNMADD213SD %XMM2,%XMM8,%XMM11 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD 0x596d6(%RIP),%XMM3 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VADDSD %XMM3,%XMM4,%XMM12 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD213SD %XMM1,%XMM8,%XMM12 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %XMM8,%XMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVSD 0x5c51f(%RIP),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x596ef(%RIP),%XMM4 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD213SD %XMM4,%XMM1,%XMM22 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %XMM8,%XMM23 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VFMSUB213SD %XMM3,%XMM1,%XMM23 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFNMADD213SD %XMM0,%XMM8,%XMM23 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VSUBSD %XMM8,%XMM3,%XMM24 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %XMM8,%XMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVSD 0x5b77b(%RIP),%XMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD213SD %XMM4,%XMM0,%XMM25 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %XMM8,%XMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VFNMADD213SD %XMM3,%XMM0,%XMM26 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VPCMPEQD %XMM0,%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VPADDD %XMM0,%XMM19,%XMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 1 | 0.33 |
VCVTTPD2DQ %XMM18,%XMM1 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 5 | 1 |
VPMAXSD 0x59e38(%RIP),%XMM1,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VPMINSD %XMM1,%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%RSI),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,0x70(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOVSXD %R10D,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %R13,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VPMOVSXDQ %XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VPMULLQ %XMM0,%XMM6,%XMM3 | 3 | 1.50 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
IMUL %RAX,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMULSD %XMM2,%XMM5,%XMM27 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVQ %XMM6,0x128(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VPEXTRQ $0x1,%XMM6,0x140(%RSP) | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 1 | 0 | 0.33 | 3 | 1 |
LEA (%RCX,%R13,1),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x2(%RAX),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R13,%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD $0x3,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
IMUL %R13,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVQ %RAX,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMOVQ %RSI,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VPUNPCKLQDQ %XMM0,%XMM1,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMOVQ %RCX,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMOVQ %RDI,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VPUNPCKLQDQ %XMM2,%XMM1,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VINSERTI128 $0x1,%XMM0,%YMM1,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM3,0x400(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 4 | 1 |
VPERMQ $0x55,%YMM3,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VPADDQ %YMM1,%YMM0,%YMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 1 | 0.33 |
VMOVDQU %YMM0,0x3e0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 4 | 1 |
MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
AND $-0x8,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %RAX,0x138(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VBROADCASTSD %XMM11,%YMM29 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM10,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VMOVUPD %YMM0,0x3c0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VPERMPD $0x55,%YMM10,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VMOVUPD %YMM0,0x3a0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VBROADCASTSD %XMM8,%YMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM27,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VMOVUPD %YMM0,0x380(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VBROADCASTSD %XMM12,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VMOVUPD %YMM0,0x360(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VBROADCASTSD %XMM22,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VMOVUPD %YMM0,0x340(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VBROADCASTSD %XMM23,%YMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM9,%YMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM24,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM25,%YMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM26,%YMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
LEA (%R8,%R11,8),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA (%R8,%R14,8),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x40(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA (,%R14,8),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVUPD %XMM23,0x2d0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVUPD %XMM24,0x2c0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVUPD %XMM25,0x2b0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVUPD %XMM26,0x2a0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVUPD %XMM27,0x290(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVUPD %XMM22,0x280(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVUPD %XMM12,0x270(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVUPD %XMM11,0x260(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JMP 43cb56 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
TEST %EDX,%EDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV 0x110(%RSP),%R15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x18(%RSP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x28(%RSP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVUPD 0x250(%RSP),%XMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVUPD 0x240(%RSP),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVUPD 0x230(%RSP),%XMM2 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x118(%RSP),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xb8(%RSP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xb0(%RSP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
JLE 43c3c0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VMULSD %XMM1,%XMM1,%XMM17 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM2,%XMM2,%XMM18 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM0,%XMM0,%XMM19 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM1,%XMM2,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM1,%XMM0,%XMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM2,%XMM0,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RDX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
AND $-0x8,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 43d410 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VBROADCASTSD %XMM1,%YMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM2,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM0,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM17,%YMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM18,%YMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM19,%YMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM3,%YMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM4,%YMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM5,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
LEA (%R11,%RBX,8),%R8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R11,%RCX,8),%R9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R11,%RAX,8),%RDX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RSP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%R11,%RAX,8),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R11,%R14,8),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV 0x8(%RSP),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x40(%RSP),%R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV 0x20(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP %RDX,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV 0xb8(%RSP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xb0(%RSP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
JE 43c3c0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
JMP 43d41c | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV 0x8(%RSP),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x40(%RSP),%R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%R11,%RBX,8),%R8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R11,%RCX,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R11,%RAX,8),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%R11,%RDI,8),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R11,%R14,8),%RBX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 43c3c0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |