Loop Id: 1184 | Module: exec | Source: ParticleIOUtility.h:70-91 [...] | Coverage: 0.01% |
---|
Loop Id: 1184 | Module: exec | Source: ParticleIOUtility.h:70-91 [...] | Coverage: 0.01% |
---|
0x49b900 INC %R14 |
0x49b903 CMP %R14,%R12 |
0x49b906 JE 49bb48 |
0x49b90c CMP %R15D,(%R13,%R14,4) [5] |
0x49b911 JNE 49b900 |
0x49b913 MOV -0x568(%RBP),%R11 [1] |
0x49b91a LEA (%R14,%R14,2),%RCX |
0x49b91e LEA (%R11,%RCX,8),%R9 |
0x49b922 VMOVSD 0x8(%R9),%XMM8 [9] |
0x49b928 VMOVUPD (%R9),%XMM15 [9] |
0x49b92d VMOVSD (%R9),%XMM5 [9] |
0x49b932 VMOVSD 0x10(%R9),%XMM10 [9] |
0x49b938 VRNDSCALESD $0x9,%XMM8,%XMM8,%XMM3 |
0x49b93f VRNDSCALEPD $0x9,%XMM15,%XMM1 |
0x49b946 VSUBSD %XMM3,%XMM8,%XMM6 |
0x49b94a VRNDSCALESD $0x9,%XMM5,%XMM5,%XMM0 |
0x49b951 VSUBSD %XMM0,%XMM5,%XMM11 |
0x49b955 VRNDSCALESD $0x9,%XMM10,%XMM10,%XMM4 |
0x49b95c VSUBSD %XMM4,%XMM10,%XMM14 |
0x49b960 VMOVSD -0x5d0(%RBP),%XMM10 [1] |
0x49b968 VMOVDDUP %XMM6,%XMM13 |
0x49b96c VMULPD -0x670(%RBP),%XMM13,%XMM7 [1] |
0x49b974 VMOVDDUP %XMM11,%XMM9 |
0x49b979 VSUBPD %XMM1,%XMM15,%XMM2 |
0x49b97d VMOVAPD -0x5f0(%RBP),%XMM1 [1] |
0x49b985 VMOVDDUP %XMM14,%XMM15 |
0x49b98a VFMADD132SD -0x640(%RBP),%XMM10,%XMM14 [1] |
0x49b993 VFMADD132PD -0x680(%RBP),%XMM1,%XMM15 [1] |
0x49b99c VFMADD132PD -0x650(%RBP),%XMM7,%XMM9 [1] |
0x49b9a5 VMOVSD %XMM2,%XMM2,%XMM8 |
0x49b9a9 VUNPCKHPD %XMM2,%XMM2,%XMM2 |
0x49b9ad VMULSD -0x638(%RBP),%XMM2,%XMM5 [1] |
0x49b9b5 VADDSD -0x588(%RBP),%XMM14,%XMM0 [1] |
0x49b9bd VADDPD -0x610(%RBP),%XMM9,%XMM12 [1] |
0x49b9c5 VFMADD132SD -0x590(%RBP),%XMM5,%XMM8 [1] |
0x49b9ce VADDPD %XMM15,%XMM12,%XMM3 |
0x49b9d3 VUNPCKHPD %XMM3,%XMM3,%XMM4 |
0x49b9d7 VADDSD %XMM8,%XMM0,%XMM11 |
0x49b9dc VMOVAPD %XMM3,-0x660(%RBP) [1] |
0x49b9e4 VMULSD 0xc8(%RBX),%XMM4,%XMM0 [4] |
0x49b9ec VMULSD 0xd0(%RBX),%XMM4,%XMM1 [4] |
0x49b9f4 VMULSD 0xd8(%RBX),%XMM4,%XMM2 [4] |
0x49b9fc VMOVSD %XMM11,-0x630(%RBP) [1] |
0x49ba04 VFMADD231SD 0xb0(%RBX),%XMM3,%XMM0 [4] |
0x49ba0d VFMADD231SD 0xb8(%RBX),%XMM3,%XMM1 [4] |
0x49ba16 VFMADD231SD 0xc0(%RBX),%XMM3,%XMM2 [4] |
0x49ba1f VFMADD231SD 0xe0(%RBX),%XMM11,%XMM0 [4] |
0x49ba28 VFMADD231SD 0xe8(%RBX),%XMM11,%XMM1 [4] |
0x49ba31 VFMADD231SD 0xf0(%RBX),%XMM11,%XMM2 [4] |
0x49ba3a VCOMISD 0x3549e(%RIP),%XMM0 [7] |
0x49ba42 SETAE %DIL |
0x49ba46 VCOMISD 0x3549a(%RIP),%XMM0 [7] |
0x49ba4e SETB %DL |
0x49ba51 AND %EDX,%EDI |
0x49ba53 VCOMISD 0x35485(%RIP),%XMM1 [7] |
0x49ba5b SETAE %SIL |
0x49ba5f AND %ESI,%EDI |
0x49ba61 VCOMISD 0x3547f(%RIP),%XMM1 [7] |
0x49ba69 SETB %R8B |
0x49ba6d AND %R8D,%EDI |
0x49ba70 VCOMISD 0x35468(%RIP),%XMM2 [7] |
0x49ba78 SETAE %R10B |
0x49ba7c TEST %R10B,%DIL |
0x49ba7f JE 49b900 |
0x49ba85 VCOMISD 0x3545b(%RIP),%XMM2 [7] |
0x49ba8d JAE 49b900 |
0x49ba93 MOV -0x6e0(%RBP),%RDI [1] |
0x49ba9a LEA 0x35047(%RIP),%RDX |
0x49baa1 MOV $0x1f4,%ESI |
0x49baa6 MOV %R15D,%ECX |
0x49baa9 VMOVSD %XMM11,%XMM11,%XMM5 |
0x49baad MOV $0x6,%EAX |
0x49bab2 CALL 404520 <snprintf@plt> |
0x49bab7 MOV -0x6e0(%RBP),%RDI [1] |
0x49babe CALL 404180 <strlen@plt> |
0x49bac3 MOV -0x6e0(%RBP),%RSI [1] |
0x49baca MOV 0x450cf(%RIP),%RDI [7] |
0x49bad1 MOV %RAX,%RDX |
0x49bad4 CALL 404310 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> |
0x49bad9 MOVSXD -0x6e4(%RBP),%RAX [1] |
0x49bae0 MOV 0x5e8(%RBX),%R9 [4] |
0x49bae7 MOV 0x5c0(%RBX),%RDX [4] |
0x49baee MOV 0x570(%RBX),%RSI [4] |
0x49baf5 VMOVAPD -0x660(%RBP),%XMM6 [1] |
0x49bafd VMOVSD -0x630(%RBP),%XMM9 [1] |
0x49bb05 LEA (%RAX,%RAX,2),%RCX |
0x49bb09 MOV %RAX,%R11 |
0x49bb0c MOV 0x598(%RBX),%R8 [4] |
0x49bb13 LEA (%R9,%RCX,8),%RDI |
0x49bb17 INC %R11D |
0x49bb1a VMOVUPD %XMM6,(%RDI) [6] |
0x49bb1e VMOVSD %XMM9,0x10(%RDI) [6] |
0x49bb23 MOV %R15D,(%RDX,%RAX,4) [3] |
0x49bb27 MOV %EAX,(%RSI,%RAX,4) [8] |
0x49bb2a MOV %R14D,(%R8,%RAX,4) [2] |
0x49bb2e INC %R14 |
0x49bb31 MOV %R11D,-0x6e4(%RBP) [1] |
0x49bb38 CMP %R14,%R12 |
0x49bb3b JNE 49b90c |
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVectorOps.h: 49 - 49 |
-------------------------------------------------------------------------------- |
49: for (unsigned d = 0; d < D; ++d) |
/usr/include/c++/13.1.1/ostream: 667 - 667 |
-------------------------------------------------------------------------------- |
667: __ostream_insert(__out, __s, |
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h: 43 - 183 |
-------------------------------------------------------------------------------- |
43: return (a + b); |
[...] |
183: return (const_cast<T1&>(a) = b); |
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 223 - 223 |
-------------------------------------------------------------------------------- |
223: return X[i]; |
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVectorTensorOps.h: 150 - 152 |
-------------------------------------------------------------------------------- |
150: return TinyVector<Type_t, 3>(lhs[0] * rhs[0] + lhs[1] * rhs[3] + lhs[2] * rhs[6], |
151: lhs[0] * rhs[1] + lhs[1] * rhs[4] + lhs[2] * rhs[7], |
152: lhs[0] * rhs[2] + lhs[1] * rhs[5] + lhs[2] * rhs[8]); |
/usr/include/c++/13.1.1/bits/char_traits.h: 409 - 409 |
-------------------------------------------------------------------------------- |
409: return __builtin_strlen(__s); |
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/Particle/ParticleIOUtility.h: 70 - 91 |
-------------------------------------------------------------------------------- |
70: for (int iat = 0; iat < primPos.size(); iat++) |
71: { |
72: if (primTypes[iat] != ns) |
73: continue; |
74: SingleParticlePos_t uPrim = primPos[iat]; |
75: for (int i = 0; i < 3; i++) |
76: uPrim[i] -= std::floor(uPrim[i]); |
77: SingleParticlePos_t r = PrimCell.toCart(uPrim) + (double)i0 * PrimCell.a(0) + (double)i1 * PrimCell.a(1) + |
78: (double)i2 * PrimCell.a(2); |
79: SingleParticlePos_t uSuper = ref_.Lattice.toUnit(r); |
80: if ((uSuper[0] >= -1.0e-6) && (uSuper[0] < 0.9999) && (uSuper[1] >= -1.0e-6) && (uSuper[1] < 0.9999) && |
81: (uSuper[2] >= -1.0e-6) && (uSuper[2] < 0.9999)) |
82: { |
83: char buff[500]; |
84: snprintf(buff, 500, " %10.4f %10.4f %10.4f %12.6f %12.6f %12.6f %d\n", uSuper[0], uSuper[1], |
85: uSuper[2], r[0], r[1], r[2], ns); |
86: app_log() << buff; |
87: ref_.R[index] = r; |
88: ref_.GroupID[index] = ns; // primTypes[iat]; |
89: ref_.ID[index] = index; |
90: ref_.PCID[index] = iat; |
91: index++; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | qmcplusplus::build_ions(qmcplu[...] | nio.hpp:76 | exec |
○ | main | ParticleSet.h:263 | exec |
○ | __libc_init_first | libc.so.6 |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.19 |
CQA speedup if FP arith vectorized | 1.40 |
CQA speedup if fully vectorized | 7.62 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.15 |
Bottlenecks | |
Function | void qmcplusplus::expandSuperCell |
Source | TinyVectorOps.h:49-49,ostream:667-667,OperatorTags.h:43-183,OhmmsVector.h:223-223,TinyVectorTensorOps.h:150-152,char_traits.h:409-409,ParticleIOUtility.h:70-91 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 17.19 |
CQA cycles if no scalar integer | 14.50 |
CQA cycles if FP arith vectorized | 12.31 |
CQA cycles if fully vectorized | 2.26 |
Front-end cycles | 16.50 |
DIV/SQRT cycles | 14.75 |
P0 cycles | 14.75 |
P1 cycles | 13.00 |
P2 cycles | 13.00 |
P3 cycles | 3.75 |
P4 cycles | 9.38 |
P5 cycles | 9.38 |
P6 cycles | 3.75 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | 3 |
FE+BE cycles (UFS) | 21.52 |
Stall cycles (UFS) | 4.85 |
Nb insns | 57.75 |
Nb uops | 65.00 |
Nb loads | 26.00 |
Nb stores | 3.00 |
Nb stack references | 10.25 |
FLOP/cycle | 1.79 |
Nb FLOP add-sub | 8.25 |
Nb FLOP mul | 4.50 |
Nb FLOP fma | 9.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 12.55 |
Bytes prefetched | 0.00 |
Bytes loaded | 241.00 |
Bytes stored | 28.00 |
Stride 0 | 2.25 |
Stride 1 | 1.00 |
Stride n | 0.75 |
Stride unknown | 0.50 |
Stride indirect | 0.50 |
Vectorization ratio all | 15.57 |
Vectorization ratio load | 20.85 |
Vectorization ratio store | 41.67 |
Vectorization ratio mul | 20.00 |
Vectorization ratio add_sub | 37.50 |
Vectorization ratio fma | 20.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 4.25 |
Vector-efficiency ratio all | 14.25 |
Vector-efficiency ratio load | 14.90 |
Vector-efficiency ratio store | 16.67 |
Vector-efficiency ratio mul | 15.00 |
Vector-efficiency ratio add_sub | 17.19 |
Vector-efficiency ratio fma | 15.00 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.77 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 2.40 |
Bottlenecks | |
Function | void qmcplusplus::expandSuperCell |
Source | TinyVectorOps.h:49-49,ostream:667-667,OperatorTags.h:43-183,OhmmsVector.h:223-223,TinyVectorTensorOps.h:150-152,char_traits.h:409-409,ParticleIOUtility.h:70-91 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 3.00 |
CQA cycles if no scalar integer | 3.00 |
CQA cycles if FP arith vectorized | 3.00 |
CQA cycles if fully vectorized | 0.38 |
Front-end cycles | 1.25 |
DIV/SQRT cycles | 1.00 |
P0 cycles | 1.00 |
P1 cycles | 0.50 |
P2 cycles | 0.50 |
P3 cycles | 0.00 |
P4 cycles | 1.00 |
P5 cycles | 1.00 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | 3 |
FE+BE cycles (UFS) | 1.35 |
Stall cycles (UFS) | 0.00 |
Nb insns | 5.00 |
Nb uops | 4.00 |
Nb loads | 1.00 |
Nb stores | 0.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 1.33 |
Bytes prefetched | 0.00 |
Bytes loaded | 4.00 |
Bytes stored | 0.00 |
Stride 0 | 0.00 |
Stride 1 | 1.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | NA |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | NA |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.06 |
CQA speedup if FP arith vectorized | 1.30 |
CQA speedup if fully vectorized | 6.76 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.04 |
Bottlenecks | P0, P1, |
Function | void qmcplusplus::expandSuperCell |
Source | TinyVectorOps.h:49-49,ostream:667-667,OperatorTags.h:43-183,OhmmsVector.h:223-223,TinyVectorTensorOps.h:150-152,char_traits.h:409-409,ParticleIOUtility.h:70-91 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 19.00 |
CQA cycles if no scalar integer | 18.00 |
CQA cycles if FP arith vectorized | 14.56 |
CQA cycles if fully vectorized | 2.81 |
Front-end cycles | 18.25 |
DIV/SQRT cycles | 19.00 |
P0 cycles | 19.00 |
P1 cycles | 15.00 |
P2 cycles | 15.00 |
P3 cycles | 2.00 |
P4 cycles | 10.00 |
P5 cycles | 10.00 |
P6 cycles | 2.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | 3 |
FE+BE cycles (UFS) | 24.96 |
Stall cycles (UFS) | 6.29 |
Nb insns | 64.00 |
Nb uops | 72.00 |
Nb loads | 30.00 |
Nb stores | 2.00 |
Nb stack references | 13.00 |
FLOP/cycle | 2.16 |
Nb FLOP add-sub | 11.00 |
Nb FLOP mul | 6.00 |
Nb FLOP fma | 12.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 16.21 |
Bytes prefetched | 0.00 |
Bytes loaded | 284.00 |
Bytes stored | 24.00 |
Stride 0 | 3.00 |
Stride 1 | 1.00 |
Stride n | 1.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 20.83 |
Vectorization ratio load | 20.69 |
Vectorization ratio store | 50.00 |
Vectorization ratio mul | 20.00 |
Vectorization ratio add_sub | 37.50 |
Vectorization ratio fma | 20.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 5.88 |
Vector-efficiency ratio all | 14.97 |
Vector-efficiency ratio load | 14.87 |
Vector-efficiency ratio store | 18.75 |
Vector-efficiency ratio mul | 15.00 |
Vector-efficiency ratio add_sub | 17.19 |
Vector-efficiency ratio fma | 15.00 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.87 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.47 |
CQA speedup if FP arith vectorized | 1.64 |
CQA speedup if fully vectorized | 9.20 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.30 |
Bottlenecks | micro-operation queue, |
Function | void qmcplusplus::expandSuperCell |
Source | TinyVectorOps.h:49-49,ostream:667-667,OperatorTags.h:43-183,OhmmsVector.h:223-223,TinyVectorTensorOps.h:150-152,char_traits.h:409-409,ParticleIOUtility.h:70-91 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 27.25 |
CQA cycles if no scalar integer | 18.50 |
CQA cycles if FP arith vectorized | 16.63 |
CQA cycles if fully vectorized | 2.96 |
Front-end cycles | 27.25 |
DIV/SQRT cycles | 19.50 |
P0 cycles | 19.50 |
P1 cycles | 21.00 |
P2 cycles | 21.00 |
P3 cycles | 11.00 |
P4 cycles | 15.50 |
P5 cycles | 15.50 |
P6 cycles | 11.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | 3 |
FE+BE cycles (UFS) | 33.57 |
Stall cycles (UFS) | 6.64 |
Nb insns | 96.00 |
Nb uops | 108.00 |
Nb loads | 42.00 |
Nb stores | 8.00 |
Nb stack references | 15.00 |
FLOP/cycle | 1.50 |
Nb FLOP add-sub | 11.00 |
Nb FLOP mul | 6.00 |
Nb FLOP fma | 12.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 16.44 |
Bytes prefetched | 0.00 |
Bytes loaded | 384.00 |
Bytes stored | 64.00 |
Stride 0 | 3.00 |
Stride 1 | 1.00 |
Stride n | 1.00 |
Stride unknown | 2.00 |
Stride indirect | 2.00 |
Vectorization ratio all | 21.05 |
Vectorization ratio load | 21.88 |
Vectorization ratio store | 25.00 |
Vectorization ratio mul | 20.00 |
Vectorization ratio add_sub | 37.50 |
Vectorization ratio fma | 20.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 5.56 |
Vector-efficiency ratio all | 14.58 |
Vector-efficiency ratio load | 15.04 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | 15.00 |
Vector-efficiency ratio add_sub | 17.19 |
Vector-efficiency ratio fma | 15.00 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.85 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.05 |
CQA speedup if FP arith vectorized | 1.29 |
CQA speedup if fully vectorized | 6.78 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.01 |
Bottlenecks | P0, P1, |
Function | void qmcplusplus::expandSuperCell |
Source | TinyVectorOps.h:49-49,ostream:667-667,OperatorTags.h:43-183,OhmmsVector.h:223-223,TinyVectorTensorOps.h:150-152,char_traits.h:409-409,ParticleIOUtility.h:70-91 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 19.50 |
CQA cycles if no scalar integer | 18.50 |
CQA cycles if FP arith vectorized | 15.06 |
CQA cycles if fully vectorized | 2.88 |
Front-end cycles | 19.25 |
DIV/SQRT cycles | 19.50 |
P0 cycles | 19.50 |
P1 cycles | 15.50 |
P2 cycles | 15.50 |
P3 cycles | 2.00 |
P4 cycles | 11.00 |
P5 cycles | 11.00 |
P6 cycles | 2.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | 3 |
FE+BE cycles (UFS) | 26.19 |
Stall cycles (UFS) | 6.48 |
Nb insns | 66.00 |
Nb uops | 76.00 |
Nb loads | 31.00 |
Nb stores | 2.00 |
Nb stack references | 13.00 |
FLOP/cycle | 2.10 |
Nb FLOP add-sub | 11.00 |
Nb FLOP mul | 6.00 |
Nb FLOP fma | 12.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 16.21 |
Bytes prefetched | 0.00 |
Bytes loaded | 292.00 |
Bytes stored | 24.00 |
Stride 0 | 3.00 |
Stride 1 | 1.00 |
Stride n | 1.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 20.41 |
Vectorization ratio load | 20.00 |
Vectorization ratio store | 50.00 |
Vectorization ratio mul | 20.00 |
Vectorization ratio add_sub | 37.50 |
Vectorization ratio fma | 20.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 5.56 |
Vector-efficiency ratio all | 14.92 |
Vector-efficiency ratio load | 14.79 |
Vector-efficiency ratio store | 18.75 |
Vector-efficiency ratio mul | 15.00 |
Vector-efficiency ratio add_sub | 17.19 |
Vector-efficiency ratio fma | 15.00 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.85 |
Path / |
Function | void qmcplusplus::expandSuperCell |
Source file and lines | ParticleIOUtility.h:70-91 |
Module | exec |
nb instructions | 57.75 |
nb uops | 65 |
loop length | 344 |
used x86 registers | 11.75 |
used mmx registers | 0 |
used xmm registers | 12 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 10.25 |
micro-operation queue | 16.50 cycles |
front end | 16.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 14.75 | 14.75 | 13.00 | 13.00 | 3.75 | 9.38 | 9.38 | 3.75 |
cycles | 14.75 | 14.75 | 13.00 | 13.00 | 3.75 | 9.38 | 9.38 | 3.75 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 3.00 |
FE+BE cycles | 21.52 |
Stall cycles | 4.85 |
RS full (events) | 0.21 |
LB full (events) | 7.49 |
Front-end | 16.50 |
Dispatch | 15.13 |
Data deps. | 3.00 |
Overall L1 | 17.19 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 22% |
load | 21% |
store | 50% |
mul | 20% |
add-sub | 37% |
fma | 20% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 6% |
all | 15% |
load | 20% |
store | 41% |
mul | 20% |
add-sub | 37% |
fma | 20% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 4% |
all | 9% |
load | 6% |
store | 6% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 9% |
all | 15% |
load | 15% |
store | 18% |
mul | 15% |
add-sub | 17% |
fma | 15% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 13% |
all | 14% |
load | 14% |
store | 16% |
mul | 15% |
add-sub | 17% |
fma | 15% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Function | void qmcplusplus::expandSuperCell |
Source file and lines | ParticleIOUtility.h:70-91 |
Module | exec |
nb instructions | 5 |
nb uops | 4 |
loop length | 19 |
used x86 registers | 4 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 1.25 cycles |
front end | 1.25 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 1.00 | 1.00 | 0.50 | 0.50 | 0.00 | 1.00 | 1.00 | 0.00 |
cycles | 1.00 | 1.00 | 0.50 | 0.50 | 0.00 | 1.00 | 1.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 3.00 |
FE+BE cycles | 1.35 |
Stall cycles | 0.00 |
Front-end | 1.25 |
Dispatch | 1.00 |
Data deps. | 3.00 |
Overall L1 | 3.00 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
INC %R14 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %R14,%R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 49bb48 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP %R15D,(%R13,%R14,4) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JNE 49b900 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
Function | void qmcplusplus::expandSuperCell |
Source file and lines | ParticleIOUtility.h:70-91 |
Module | exec |
nb instructions | 64 |
nb uops | 72 |
loop length | 389 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 16 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 13 |
ADD-SUB / MUL ratio | 1.60 |
micro-operation queue | 18.25 cycles |
front end | 18.25 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 19.00 | 19.00 | 15.00 | 15.00 | 2.00 | 10.00 | 10.00 | 2.00 |
cycles | 19.00 | 19.00 | 15.00 | 15.00 | 2.00 | 10.00 | 10.00 | 2.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 3.00 |
FE+BE cycles | 24.96 |
Stall cycles | 6.29 |
RS full (events) | 0.43 |
LB full (events) | 9.14 |
Front-end | 18.25 |
Dispatch | 19.00 |
Data deps. | 3.00 |
Overall L1 | 19.00 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 21% |
load | 21% |
store | 50% |
mul | 20% |
add-sub | 37% |
fma | 20% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 6% |
all | 20% |
load | 20% |
store | 50% |
mul | 20% |
add-sub | 37% |
fma | 20% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 5% |
all | 9% |
load | 6% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 9% |
all | 15% |
load | 15% |
store | 18% |
mul | 15% |
add-sub | 17% |
fma | 15% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 13% |
all | 14% |
load | 14% |
store | 18% |
mul | 15% |
add-sub | 17% |
fma | 15% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
INC %R14 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %R14,%R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 49bb48 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP %R15D,(%R13,%R14,4) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JNE 49b900 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0x568(%RBP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%R14,%R14,2),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R11,%RCX,8),%R9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x8(%R9),%XMM8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVUPD (%R9),%XMM15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%R9),%XMM5 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x10(%R9),%XMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VRNDSCALESD $0x9,%XMM8,%XMM8,%XMM3 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VRNDSCALEPD $0x9,%XMM15,%XMM1 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VSUBSD %XMM3,%XMM8,%XMM6 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VRNDSCALESD $0x9,%XMM5,%XMM5,%XMM0 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VSUBSD %XMM0,%XMM5,%XMM11 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VRNDSCALESD $0x9,%XMM10,%XMM10,%XMM4 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VSUBSD %XMM4,%XMM10,%XMM14 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD -0x5d0(%RBP),%XMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVDDUP %XMM6,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMULPD -0x670(%RBP),%XMM13,%XMM7 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVDDUP %XMM11,%XMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VSUBPD %XMM1,%XMM15,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD -0x5f0(%RBP),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVDDUP %XMM14,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VFMADD132SD -0x640(%RBP),%XMM10,%XMM14 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD132PD -0x680(%RBP),%XMM1,%XMM15 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD132PD -0x650(%RBP),%XMM7,%XMM9 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM2,%XMM2,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VUNPCKHPD %XMM2,%XMM2,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMULSD -0x638(%RBP),%XMM2,%XMM5 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDSD -0x588(%RBP),%XMM14,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDPD -0x610(%RBP),%XMM9,%XMM12 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD132SD -0x590(%RBP),%XMM5,%XMM8 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDPD %XMM15,%XMM12,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VUNPCKHPD %XMM3,%XMM3,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VADDSD %XMM8,%XMM0,%XMM11 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %XMM3,-0x660(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMULSD 0xc8(%RBX),%XMM4,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD 0xd0(%RBX),%XMM4,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD 0xd8(%RBX),%XMM4,%XMM2 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM11,-0x630(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VFMADD231SD 0xb0(%RBX),%XMM3,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0xb8(%RBX),%XMM3,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0xc0(%RBX),%XMM3,%XMM2 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0xe0(%RBX),%XMM11,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0xe8(%RBX),%XMM11,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0xf0(%RBX),%XMM11,%XMM2 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCOMISD 0x3549e(%RIP),%XMM0 | 2 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
SETAE %DIL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
VCOMISD 0x3549a(%RIP),%XMM0 | 2 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
SETB %DL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
AND %EDX,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VCOMISD 0x35485(%RIP),%XMM1 | 2 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
SETAE %SIL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
AND %ESI,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VCOMISD 0x3547f(%RIP),%XMM1 | 2 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
SETB %R8B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
AND %R8D,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VCOMISD 0x35468(%RIP),%XMM2 | 2 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
SETAE %R10B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
TEST %R10B,%DIL | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 49b900 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
Function | void qmcplusplus::expandSuperCell |
Source file and lines | ParticleIOUtility.h:70-91 |
Module | exec |
nb instructions | 96 |
nb uops | 108 |
loop length | 565 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 16 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 15 |
ADD-SUB / MUL ratio | 1.60 |
micro-operation queue | 27.25 cycles |
front end | 27.25 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 19.50 | 19.50 | 21.00 | 21.00 | 11.00 | 15.50 | 15.50 | 11.00 |
cycles | 19.50 | 19.50 | 21.00 | 21.00 | 11.00 | 15.50 | 15.50 | 11.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 3.00 |
FE+BE cycles | 33.57 |
Stall cycles | 6.64 |
LB full (events) | 11.11 |
Front-end | 27.25 |
Dispatch | 21.00 |
Data deps. | 3.00 |
Overall L1 | 27.25 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 23% |
load | 22% |
store | 50% |
mul | 20% |
add-sub | 37% |
fma | 20% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 5% |
all | 21% |
load | 21% |
store | 25% |
mul | 20% |
add-sub | 37% |
fma | 20% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 5% |
all | 6% |
load | 6% |
store | 6% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 6% |
all | 15% |
load | 15% |
store | 18% |
mul | 15% |
add-sub | 17% |
fma | 15% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 13% |
all | 14% |
load | 15% |
store | 12% |
mul | 15% |
add-sub | 17% |
fma | 15% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
CMP %R15D,(%R13,%R14,4) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JNE 49b900 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0x568(%RBP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%R14,%R14,2),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R11,%RCX,8),%R9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x8(%R9),%XMM8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVUPD (%R9),%XMM15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%R9),%XMM5 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x10(%R9),%XMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VRNDSCALESD $0x9,%XMM8,%XMM8,%XMM3 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VRNDSCALEPD $0x9,%XMM15,%XMM1 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VSUBSD %XMM3,%XMM8,%XMM6 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VRNDSCALESD $0x9,%XMM5,%XMM5,%XMM0 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VSUBSD %XMM0,%XMM5,%XMM11 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VRNDSCALESD $0x9,%XMM10,%XMM10,%XMM4 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VSUBSD %XMM4,%XMM10,%XMM14 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD -0x5d0(%RBP),%XMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVDDUP %XMM6,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMULPD -0x670(%RBP),%XMM13,%XMM7 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVDDUP %XMM11,%XMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VSUBPD %XMM1,%XMM15,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD -0x5f0(%RBP),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVDDUP %XMM14,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VFMADD132SD -0x640(%RBP),%XMM10,%XMM14 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD132PD -0x680(%RBP),%XMM1,%XMM15 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD132PD -0x650(%RBP),%XMM7,%XMM9 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM2,%XMM2,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VUNPCKHPD %XMM2,%XMM2,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMULSD -0x638(%RBP),%XMM2,%XMM5 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDSD -0x588(%RBP),%XMM14,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDPD -0x610(%RBP),%XMM9,%XMM12 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD132SD -0x590(%RBP),%XMM5,%XMM8 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDPD %XMM15,%XMM12,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VUNPCKHPD %XMM3,%XMM3,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VADDSD %XMM8,%XMM0,%XMM11 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %XMM3,-0x660(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMULSD 0xc8(%RBX),%XMM4,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD 0xd0(%RBX),%XMM4,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD 0xd8(%RBX),%XMM4,%XMM2 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM11,-0x630(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VFMADD231SD 0xb0(%RBX),%XMM3,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0xb8(%RBX),%XMM3,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0xc0(%RBX),%XMM3,%XMM2 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0xe0(%RBX),%XMM11,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0xe8(%RBX),%XMM11,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0xf0(%RBX),%XMM11,%XMM2 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCOMISD 0x3549e(%RIP),%XMM0 | 2 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
SETAE %DIL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
VCOMISD 0x3549a(%RIP),%XMM0 | 2 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
SETB %DL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
AND %EDX,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VCOMISD 0x35485(%RIP),%XMM1 | 2 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
SETAE %SIL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
AND %ESI,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VCOMISD 0x3547f(%RIP),%XMM1 | 2 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
SETB %R8B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
AND %R8D,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VCOMISD 0x35468(%RIP),%XMM2 | 2 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
SETAE %R10B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
TEST %R10B,%DIL | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 49b900 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VCOMISD 0x3545b(%RIP),%XMM2 | 2 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
JAE 49b900 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0x6e0(%RBP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA 0x35047(%RIP),%RDX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x1f4,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %R15D,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVSD %XMM11,%XMM11,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
MOV $0x6,%EAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CALL 404520 | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV -0x6e0(%RBP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CALL 404180 | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV -0x6e0(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x450cf(%RIP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 404310 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOVSXD -0x6e4(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x5e8(%RBX),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x5c0(%RBX),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x570(%RBX),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVAPD -0x660(%RBP),%XMM6 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD -0x630(%RBP),%XMM9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RAX,%RAX,2),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV 0x598(%RBX),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%R9,%RCX,8),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R11D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVUPD %XMM6,(%RDI) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD %XMM9,0x10(%RDI) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R15D,(%RDX,%RAX,4) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %EAX,(%RSI,%RAX,4) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R14D,(%R8,%RAX,4) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
INC %R14 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %R11D,-0x6e4(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
CMP %R14,%R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JNE 49b90c | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
Function | void qmcplusplus::expandSuperCell |
Source file and lines | ParticleIOUtility.h:70-91 |
Module | exec |
nb instructions | 66 |
nb uops | 76 |
loop length | 403 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 16 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 13 |
ADD-SUB / MUL ratio | 1.60 |
micro-operation queue | 19.25 cycles |
front end | 19.25 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 19.50 | 19.50 | 15.50 | 15.50 | 2.00 | 11.00 | 11.00 | 2.00 |
cycles | 19.50 | 19.50 | 15.50 | 15.50 | 2.00 | 11.00 | 11.00 | 2.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 3.00 |
FE+BE cycles | 26.19 |
Stall cycles | 6.48 |
RS full (events) | 0.39 |
LB full (events) | 9.70 |
Front-end | 19.25 |
Dispatch | 19.50 |
Data deps. | 3.00 |
Overall L1 | 19.50 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 21% |
load | 20% |
store | 50% |
mul | 20% |
add-sub | 37% |
fma | 20% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 6% |
all | 20% |
load | 20% |
store | 50% |
mul | 20% |
add-sub | 37% |
fma | 20% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 5% |
all | 9% |
load | 6% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 9% |
all | 15% |
load | 15% |
store | 18% |
mul | 15% |
add-sub | 17% |
fma | 15% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 13% |
all | 14% |
load | 14% |
store | 18% |
mul | 15% |
add-sub | 17% |
fma | 15% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
INC %R14 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %R14,%R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 49bb48 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP %R15D,(%R13,%R14,4) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JNE 49b900 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0x568(%RBP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%R14,%R14,2),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R11,%RCX,8),%R9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x8(%R9),%XMM8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVUPD (%R9),%XMM15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%R9),%XMM5 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x10(%R9),%XMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VRNDSCALESD $0x9,%XMM8,%XMM8,%XMM3 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VRNDSCALEPD $0x9,%XMM15,%XMM1 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VSUBSD %XMM3,%XMM8,%XMM6 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VRNDSCALESD $0x9,%XMM5,%XMM5,%XMM0 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VSUBSD %XMM0,%XMM5,%XMM11 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VRNDSCALESD $0x9,%XMM10,%XMM10,%XMM4 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VSUBSD %XMM4,%XMM10,%XMM14 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD -0x5d0(%RBP),%XMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVDDUP %XMM6,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMULPD -0x670(%RBP),%XMM13,%XMM7 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVDDUP %XMM11,%XMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VSUBPD %XMM1,%XMM15,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD -0x5f0(%RBP),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVDDUP %XMM14,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VFMADD132SD -0x640(%RBP),%XMM10,%XMM14 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD132PD -0x680(%RBP),%XMM1,%XMM15 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD132PD -0x650(%RBP),%XMM7,%XMM9 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM2,%XMM2,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VUNPCKHPD %XMM2,%XMM2,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMULSD -0x638(%RBP),%XMM2,%XMM5 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDSD -0x588(%RBP),%XMM14,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDPD -0x610(%RBP),%XMM9,%XMM12 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD132SD -0x590(%RBP),%XMM5,%XMM8 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDPD %XMM15,%XMM12,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VUNPCKHPD %XMM3,%XMM3,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VADDSD %XMM8,%XMM0,%XMM11 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %XMM3,-0x660(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMULSD 0xc8(%RBX),%XMM4,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD 0xd0(%RBX),%XMM4,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD 0xd8(%RBX),%XMM4,%XMM2 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM11,-0x630(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VFMADD231SD 0xb0(%RBX),%XMM3,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0xb8(%RBX),%XMM3,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0xc0(%RBX),%XMM3,%XMM2 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0xe0(%RBX),%XMM11,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0xe8(%RBX),%XMM11,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0xf0(%RBX),%XMM11,%XMM2 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCOMISD 0x3549e(%RIP),%XMM0 | 2 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
SETAE %DIL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
VCOMISD 0x3549a(%RIP),%XMM0 | 2 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
SETB %DL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
AND %EDX,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VCOMISD 0x35485(%RIP),%XMM1 | 2 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
SETAE %SIL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
AND %ESI,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VCOMISD 0x3547f(%RIP),%XMM1 | 2 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
SETB %R8B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
AND %R8D,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VCOMISD 0x35468(%RIP),%XMM2 | 2 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
SETAE %R10B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
TEST %R10B,%DIL | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 49b900 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VCOMISD 0x3545b(%RIP),%XMM2 | 2 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
JAE 49b900 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |