Function: miniqmcreference::einspline_spo_ref<double>::evaluate(qmcplusplus::ParticleSet const&, int ... | Module: exec | Source: einspline_spo_ref.hpp:172-189 [...] | Coverage: 15.91% |
---|
Function: miniqmcreference::einspline_spo_ref<double>::evaluate(qmcplusplus::ParticleSet const&, int ... | Module: exec | Source: einspline_spo_ref.hpp:172-189 [...] | Coverage: 15.91% |
---|
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h: 217 - 217 |
-------------------------------------------------------------------------------- |
217: inline const PosType& activeR(int iat) const { return (activePtcl == iat) ? activePos : R[iat]; } |
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/Particle/Lattice/CrystalLattice.h: 191 - 194 |
-------------------------------------------------------------------------------- |
191: if (-std::numeric_limits<T1>::epsilon() < val_dot[i] && val_dot[i] < 0) |
192: val_dot[i] = T1(0.0); |
193: else |
194: val_dot[i] -= std::floor(val_dot[i]); |
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 229 - 229 |
-------------------------------------------------------------------------------- |
229: return X[i]; |
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp: 55 - 65 |
-------------------------------------------------------------------------------- |
55: if (x < 0) |
[...] |
62: ind = static_cast<int>(x); |
63: dx = x - ind; |
64: // upper bound |
65: if (ind > nmax) |
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineRef.hpp: 42 - 74 |
-------------------------------------------------------------------------------- |
42: x -= spline_m->x_grid.start; |
43: y -= spline_m->y_grid.start; |
44: z -= spline_m->z_grid.start; |
45: T tx, ty, tz; |
46: int ix, iy, iz; |
47: spline2::getSplineBound(x * spline_m->x_grid.delta_inv, tx, ix, spline_m->x_grid.num - 1); |
48: spline2::getSplineBound(y * spline_m->y_grid.delta_inv, ty, iy, spline_m->y_grid.num - 1); |
49: spline2::getSplineBound(z * spline_m->z_grid.delta_inv, tz, iz, spline_m->z_grid.num - 1); |
[...] |
56: const intptr_t xs = spline_m->x_stride; |
57: const intptr_t ys = spline_m->y_stride; |
58: const intptr_t zs = spline_m->z_stride; |
59: |
60: constexpr int simdlen_ = QMC_SIMD_ALIGNMENT/sizeof(T); |
61: constexpr T zero(0); |
62: |
63: std::fill(vals, vals + num_splines, zero); |
64: |
65: for (size_t i = 0; i < 4; i++) |
66: for (size_t j = 0; j < 4; j++) |
67: { |
68: const T pre00 = a[i] * b[j]; |
69: const T* restrict coefs = spline_m->coefs + (ix + i) * xs + (iy + j) * ys + iz * zs; |
70: #pragma omp simd aligned(coefs: QMC_SIMD_ALIGNMENT) simdlen(simdlen_) |
71: for (size_t n = 0; n < num_splines; n++) |
72: vals[n] += pre00 * |
73: (c[0] * coefs[n] + c[1] * coefs[n + zs] + c[2] * coefs[n + 2 * zs] + |
74: c[3] * coefs[n + 3 * zs]); |
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/einspline_spo_ref.hpp: 172 - 189 |
-------------------------------------------------------------------------------- |
172: ScopedTimer local_timer(timer); |
173: |
174: auto u = Lattice.toUnit_floor(P.activeR(iat)); |
175: for (int i = 0; i < nBlocks; ++i) |
176: MultiBsplineEvalRef::evaluate_v(einsplines[i], u[0], u[1], u[2], psi[i].data(), nSplinesPerBlock); |
177: } |
178: |
179: inline void evaluate(const ParticleSet& P, int iat, ValueVector_t& psi_v) |
180: { |
181: evaluate_v(P, iat); |
182: |
183: for (int i = 0; i < nBlocks; ++i) |
184: { |
185: // in real simulation, phase needs to be applied. Here just fake computation |
186: const int first = i * nBlocks; |
187: std::copy_n(psi[i].data(), std::min((i + 1) * nSplinesPerBlock, OrbitalSetSize) - first, psi_v.data() + first); |
188: } |
189: } |
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h: 242 - 249 |
-------------------------------------------------------------------------------- |
242: ScopeGuard(TIMER& t) : timer(t) { timer.start(); } |
[...] |
249: ~ScopeGuard() { timer.stop(); } |
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVectorTensorOps.h: 150 - 152 |
-------------------------------------------------------------------------------- |
150: return TinyVector<Type_t, 3>(lhs[0] * rhs[0] + lhs[1] * rhs[3] + lhs[2] * rhs[6], |
151: lhs[0] * rhs[1] + lhs[1] * rhs[4] + lhs[2] * rhs[7], |
152: lhs[0] * rhs[2] + lhs[1] * rhs[5] + lhs[2] * rhs[8]); |
/usr/include/c++/13.1.1/bits/stl_vector.h: 1258 - 1258 |
-------------------------------------------------------------------------------- |
1258: { return _M_data_ptr(this->_M_impl._M_start); } |
/usr/include/c++/13.1.1/bits/stl_algo.h: 731 - 757 |
-------------------------------------------------------------------------------- |
731: { return std::copy(__first, __first + __n, __result); } |
[...] |
757: if (__n2 <= 0) |
/usr/include/c++/13.1.1/bits/stl_algobase.h: 238 - 931 |
-------------------------------------------------------------------------------- |
238: if (__b < __a) |
[...] |
398: { *__to = *__from; } |
[...] |
436: if (__builtin_expect(_Num > 1, true)) |
437: __builtin_memmove(__result, __first, sizeof(_Tp) * _Num); |
[...] |
930: for (; __first != __last; ++__first) |
931: *__first = __tmp; |
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineData.hpp: 54 - 57 |
-------------------------------------------------------------------------------- |
54: a[0] = ((A00 * tx + A01) * tx + A02) * tx + A03; |
55: a[1] = ((A10 * tx + A11) * tx + A12) * tx + A13; |
56: a[2] = ((A20 * tx + A21) * tx + A22) * tx + A23; |
57: a[3] = ((A30 * tx + A31) * tx + A32) * tx + A33; |
0x450640 PUSH %RBP |
0x450641 MOV %RSP,%RBP |
0x450644 PUSH %R15 |
0x450646 MOVSXD %EDX,%R15 |
0x450649 PUSH %R14 |
0x45064b PUSH %R13 |
0x45064d PUSH %R12 |
0x45064f MOV %RSI,%R12 |
0x450652 PUSH %RBX |
0x450653 MOV %RDI,%RBX |
0x450656 AND $-0x40,%RSP |
0x45065a SUB $0x140,%RSP |
0x450661 MOV %RCX,0x30(%RSP) |
0x450666 MOV %FS:0x28,%RAX |
0x45066f MOV %RAX,0x138(%RSP) |
0x450677 MOV 0x348(%RDI),%RAX |
0x45067e MOV %RAX,%RDI |
0x450681 MOV %RAX,0x38(%RSP) |
0x450686 CALL 4a40e0 <_ZN11qmcplusplus9TimerTypeINS_8CPUClockEE5startEv> |
0x45068b LEA 0x988(%R12),%RSI |
0x450693 CMP 0x984(%R12),%R15D |
0x45069b JE 4506ad |
0x45069d MOV 0x5e8(%R12),%RCX |
0x4506a5 LEA (%R15,%R15,2),%RDX |
0x4506a9 LEA (%RCX,%RDX,8),%RSI |
0x4506ad VMOVSD 0x8(%RSI),%XMM4 |
0x4506b2 VMOVSD (%RSI),%XMM2 |
0x4506b6 VMOVSD 0x10(%RSI),%XMM1 |
0x4506bb VMULSD 0xf8(%RBX),%XMM4,%XMM0 |
0x4506c3 VMULSD 0xf0(%RBX),%XMM4,%XMM3 |
0x4506cb VMULSD 0xe8(%RBX),%XMM4,%XMM5 |
0x4506d3 VFMADD231SD 0xe0(%RBX),%XMM2,%XMM0 |
0x4506dc VFMADD231SD 0xd8(%RBX),%XMM2,%XMM3 |
0x4506e5 VFMADD132SD 0xd0(%RBX),%XMM5,%XMM2 |
0x4506ee VFMADD231SD 0x110(%RBX),%XMM1,%XMM0 |
0x4506f7 VFMADD231SD 0x108(%RBX),%XMM1,%XMM3 |
0x450700 VFMADD132SD 0x100(%RBX),%XMM2,%XMM1 |
0x450709 VCOMISD 0x7f80f(%RIP),%XMM1 |
0x450711 JBE 45071e |
0x450713 VXORPD %XMM8,%XMM8,%XMM8 |
0x450718 VCOMISD %XMM1,%XMM8 |
0x45071c JA 450729 |
0x45071e VRNDSCALESD $0x9,%XMM1,%XMM1,%XMM7 |
0x450725 VSUBSD %XMM7,%XMM1,%XMM8 |
0x450729 VXORPD %XMM10,%XMM10,%XMM10 |
0x45072e VCOMISD %XMM3,%XMM10 |
0x450732 JBE 45073e |
0x450734 VCOMISD 0x7f7e4(%RIP),%XMM3 |
0x45073c JA 45074a |
0x45073e VRNDSCALESD $0x9,%XMM3,%XMM3,%XMM9 |
0x450745 VSUBSD %XMM9,%XMM3,%XMM10 |
0x45074a VCOMISD 0x7f7ce(%RIP),%XMM0 |
0x450752 JBE 45075f |
0x450754 VXORPD %XMM13,%XMM13,%XMM13 |
0x450759 VCOMISD %XMM0,%XMM13 |
0x45075d JA 45076b |
0x45075f VRNDSCALESD $0x9,%XMM0,%XMM0,%XMM12 |
0x450766 VSUBSD %XMM12,%XMM0,%XMM13 |
0x45076b MOVSXD 0x30(%RBX),%R8 |
0x45076f TEST %R8D,%R8D |
0x450772 JLE 450f1f |
0x450778 MOVSXD 0x40(%RBX),%R14 |
0x45077c MOV 0x2e8(%RBX),%R11 |
0x450783 LEA 0xe0(%RSP),%R15 |
0x45078b LEA 0x120(%RSP),%RAX |
0x450793 MOV 0x300(%RBX),%R10 |
0x45079a MOV %R15,0x58(%RSP) |
0x45079f MOV %R14,%R12 |
0x4507a2 LEA (%R11,%R8,8),%R13 |
0x4507a6 LEA (,%R14,8),%R9 |
0x4507ae MOV %R14D,0x94(%RSP) |
0x4507b6 AND $-0x8,%R12 |
0x4507ba MOV %R13,0x60(%RSP) |
0x4507bf MOV %R14,%R13 |
0x4507c2 MOV %R9,0x80(%RSP) |
0x4507ca SHR $0x3,%R13 |
0x4507ce MOV %R10,0x78(%RSP) |
0x4507d3 SAL $0x6,%R13 |
0x4507d7 MOV %R12,0xb8(%RSP) |
0x4507df MOV %RAX,0xc8(%RSP) |
0x4507e7 MOV %RBX,0x28(%RSP) |
0x4507ec MOV %R11,0x88(%RSP) |
0x4507f4 LEA 0x100(%RSP),%R11 |
0x4507fc VMOVSD %XMM10,0x50(%RSP) |
0x450802 VMOVSD %XMM8,0x48(%RSP) |
0x450808 VMOVSD %XMM13,0x40(%RSP) |
(660) 0x45080e MOV 0x88(%RSP),%RDX |
(660) 0x450816 VMOVSD 0x48(%RSP),%XMM4 |
(660) 0x45081c VXORPD %XMM3,%XMM3,%XMM3 |
(660) 0x450820 MOV 0x78(%RSP),%RBX |
(660) 0x450825 VMOVSD 0x50(%RSP),%XMM14 |
(660) 0x45082b MOV (%RDX),%R15 |
(660) 0x45082e VMOVSD 0x40(%RSP),%XMM2 |
(660) 0x450834 MOV (%RBX),%RCX |
(660) 0x450837 VSUBSD 0x28(%R15),%XMM4,%XMM0 |
(660) 0x45083d VSUBSD 0x50(%R15),%XMM14,%XMM15 |
(660) 0x450843 VSUBSD 0x78(%R15),%XMM2,%XMM1 |
(660) 0x450849 MOV 0x38(%R15),%ESI |
(660) 0x45084d VMULSD 0x48(%R15),%XMM0,%XMM5 |
(660) 0x450853 VCOMISD %XMM5,%XMM3 |
(660) 0x450857 JA 45100e |
(660) 0x45085d VCVTTSD2SI %XMM5,%R8D |
(660) 0x450861 DEC %ESI |
(660) 0x450863 CMP %R8D,%ESI |
(660) 0x450866 JL 45101e |
(660) 0x45086c VRNDSCALESD $0xb,%XMM5,%XMM5,%XMM6 |
(660) 0x450873 VSUBSD %XMM6,%XMM5,%XMM9 |
(660) 0x450877 VMOVSD 0x7f471(%RIP),%XMM8 |
(660) 0x45087f VMOVSD 0x7f3f9(%RIP),%XMM12 |
(660) 0x450887 MOVSXD %R8D,%R12 |
(660) 0x45088a VMULSD 0x7f696(%RIP),%XMM9,%XMM10 |
(660) 0x450892 VMOVSD %XMM9,%XMM9,%XMM14 |
(660) 0x450897 VMOVSD %XMM9,%XMM9,%XMM13 |
(660) 0x45089c VFNMADD132SD %XMM8,%XMM8,%XMM14 |
(660) 0x4508a1 VFMADD213SD 0x7f686(%RIP),%XMM8,%XMM13 |
(660) 0x4508aa VMULSD %XMM9,%XMM9,%XMM7 |
(660) 0x4508af VADDSD %XMM8,%XMM10,%XMM11 |
(660) 0x4508b4 VXORPD 0x7e3f4(%RIP),%XMM10,%XMM2 |
(660) 0x4508bc VFMADD132SD %XMM9,%XMM8,%XMM14 |
(660) 0x4508c1 VMULSD %XMM7,%XMM2,%XMM4 |
(660) 0x4508c5 VFMADD213SD 0x7f3e2(%RIP),%XMM7,%XMM13 |
(660) 0x4508ce VFMADD213SD 0x7f409(%RIP),%XMM9,%XMM11 |
(660) 0x4508d7 VFMADD132SD %XMM9,%XMM12,%XMM11 |
(660) 0x4508dc VFMADD231SD %XMM14,%XMM9,%XMM12 |
(660) 0x4508e1 VUNPCKLPD %XMM13,%XMM11,%XMM5 |
(660) 0x4508e6 VUNPCKLPD %XMM4,%XMM12,%XMM0 |
(660) 0x4508ea VINSERTF128 $0x1,%XMM0,%YMM5,%YMM11 |
(660) 0x4508f0 VMULSD 0x70(%R15),%XMM15,%XMM15 |
(660) 0x4508f6 VXORPD %XMM3,%XMM3,%XMM3 |
(660) 0x4508fa MOV 0x60(%R15),%EAX |
(660) 0x4508fe VCOMISD %XMM15,%XMM3 |
(660) 0x450903 JA 450ff5 |
(660) 0x450909 VCVTTSD2SI %XMM15,%EDI |
(660) 0x45090e DEC %EAX |
(660) 0x450910 CMP %EDI,%EAX |
(660) 0x450912 JL 45105e |
(660) 0x450918 VRNDSCALESD $0xb,%XMM15,%XMM15,%XMM6 |
(660) 0x45091f VSUBSD %XMM6,%XMM15,%XMM9 |
(660) 0x450923 VMOVSD 0x7f3c5(%RIP),%XMM8 |
(660) 0x45092b VMOVSD 0x7f34d(%RIP),%XMM12 |
(660) 0x450933 MOVSXD %EDI,%R9 |
(660) 0x450936 MOV %R9,0xd0(%RSP) |
(660) 0x45093e VMULSD 0x7f5e2(%RIP),%XMM9,%XMM10 |
(660) 0x450946 VMOVSD %XMM9,%XMM9,%XMM2 |
(660) 0x45094a VMOVSD %XMM9,%XMM9,%XMM14 |
(660) 0x45094f VFNMADD132SD %XMM8,%XMM8,%XMM2 |
(660) 0x450954 VFMADD213SD 0x7f5d3(%RIP),%XMM8,%XMM14 |
(660) 0x45095d VMULSD %XMM9,%XMM9,%XMM7 |
(660) 0x450962 VADDSD %XMM8,%XMM10,%XMM13 |
(660) 0x450967 VXORPD 0x7e341(%RIP),%XMM10,%XMM4 |
(660) 0x45096f VFMADD132SD %XMM9,%XMM8,%XMM2 |
(660) 0x450974 VMULSD %XMM7,%XMM4,%XMM0 |
(660) 0x450978 VFMADD213SD 0x7f32f(%RIP),%XMM7,%XMM14 |
(660) 0x450981 VFMADD213SD 0x7f356(%RIP),%XMM9,%XMM13 |
(660) 0x45098a VFMADD132SD %XMM9,%XMM12,%XMM13 |
(660) 0x45098f VFMADD231SD %XMM2,%XMM9,%XMM12 |
(660) 0x450994 VUNPCKLPD %XMM14,%XMM13,%XMM15 |
(660) 0x450999 VUNPCKLPD %XMM0,%XMM12,%XMM5 |
(660) 0x45099d VINSERTF128 $0x1,%XMM5,%YMM15,%YMM3 |
(660) 0x4509a3 VMULSD 0x98(%R15),%XMM1,%XMM1 |
(660) 0x4509ac VXORPD %XMM6,%XMM6,%XMM6 |
(660) 0x4509b0 MOV 0x88(%R15),%EAX |
(660) 0x4509b7 VCOMISD %XMM1,%XMM6 |
(660) 0x4509bb JA 450fc7 |
(660) 0x4509c1 VCVTTSD2SI %XMM1,%R10D |
(660) 0x4509c5 DEC %EAX |
(660) 0x4509c7 CMP %R10D,%EAX |
(660) 0x4509ca JL 45102e |
(660) 0x4509d0 VRNDSCALESD $0xb,%XMM1,%XMM1,%XMM9 |
(660) 0x4509d7 VSUBSD %XMM9,%XMM1,%XMM7 |
(660) 0x4509dc VMOVSD 0x7f30c(%RIP),%XMM14 |
(660) 0x4509e4 VMOVSD 0x7f294(%RIP),%XMM12 |
(660) 0x4509ec MOVSXD %R10D,%RBX |
(660) 0x4509ef MOV %RBX,0xc0(%RSP) |
(660) 0x4509f7 VMULSD 0x7f529(%RIP),%XMM7,%XMM13 |
(660) 0x4509ff VMOVSD %XMM7,%XMM7,%XMM2 |
(660) 0x450a03 VMOVSD %XMM7,%XMM7,%XMM10 |
(660) 0x450a07 VFNMADD132SD %XMM14,%XMM14,%XMM2 |
(660) 0x450a0c VFMADD213SD 0x7f51b(%RIP),%XMM14,%XMM10 |
(660) 0x450a15 VMULSD %XMM7,%XMM7,%XMM8 |
(660) 0x450a19 VADDSD %XMM14,%XMM13,%XMM9 |
(660) 0x450a1e VXORPD 0x7e28a(%RIP),%XMM13,%XMM4 |
(660) 0x450a26 VFMADD132SD %XMM7,%XMM14,%XMM2 |
(660) 0x450a2b VFMADD213SD 0x7f27c(%RIP),%XMM8,%XMM10 |
(660) 0x450a34 VMULSD %XMM8,%XMM4,%XMM8 |
(660) 0x450a39 VFMADD213SD 0x7f29e(%RIP),%XMM7,%XMM9 |
(660) 0x450a42 VFMADD132SD %XMM7,%XMM12,%XMM9 |
(660) 0x450a47 VFMADD132SD %XMM2,%XMM12,%XMM7 |
(660) 0x450a4c MOV 0x10(%R15),%R8 |
(660) 0x450a50 MOV 0x18(%R15),%RDI |
(660) 0x450a54 VMOVAPD %YMM11,0xe0(%RSP) |
(660) 0x450a5d CMPQ $0,0x80(%RSP) |
(660) 0x450a66 MOV 0x20(%R15),%RBX |
(660) 0x450a6a VMOVAPD %YMM3,0x100(%RSP) |
(660) 0x450a73 MOV %R8,0xa0(%RSP) |
(660) 0x450a7b MOV %RDI,0xd8(%RSP) |
(660) 0x450a83 JE 450ae9 |
(660) 0x450a85 MOV %R11,0x68(%RSP) |
(660) 0x450a8a MOV 0x80(%RSP),%RDX |
(660) 0x450a92 XOR %ESI,%ESI |
(660) 0x450a94 MOV %RCX,%RDI |
(660) 0x450a97 VMOVSD %XMM8,0x70(%RSP) |
(660) 0x450a9d VMOVSD %XMM7,0x98(%RSP) |
(660) 0x450aa6 VMOVSD %XMM10,0xa8(%RSP) |
(660) 0x450aaf VMOVSD %XMM9,0xb0(%RSP) |
(660) 0x450ab8 VZEROUPPER |
(660) 0x450abb CALL 404150 <memset@plt> |
(660) 0x450ac0 VMOVSD 0xb0(%RSP),%XMM9 |
(660) 0x450ac9 VMOVSD 0xa8(%RSP),%XMM10 |
(660) 0x450ad2 VMOVSD 0x98(%RSP),%XMM7 |
(660) 0x450adb VMOVSD 0x70(%RSP),%XMM8 |
(660) 0x450ae1 MOV %RAX,%RCX |
(660) 0x450ae4 MOV 0x68(%RSP),%R11 |
(660) 0x450ae9 MOV 0xa0(%RSP),%RAX |
(660) 0x450af1 MOV 0xd0(%RSP),%RDX |
(660) 0x450af9 VBROADCASTSD %XMM9,%YMM14 |
(660) 0x450afe VBROADCASTSD %XMM8,%YMM13 |
(660) 0x450b03 MOV 0xc0(%RSP),%R9 |
(660) 0x450b0b MOV 0x58(%RSP),%R10 |
(660) 0x450b10 VBROADCASTSD %XMM10,%YMM12 |
(660) 0x450b15 VBROADCASTSD %XMM7,%YMM11 |
(660) 0x450b1a IMUL %R12,%RAX |
(660) 0x450b1e MOV 0xd8(%RSP),%R12 |
(660) 0x450b26 IMUL %RBX,%R9 |
(660) 0x450b2a SAL $0x3,%R12 |
(660) 0x450b2e IMUL %R12,%RDX |
(660) 0x450b32 MOV %R12,0xd8(%RSP) |
(660) 0x450b3a LEA (,%RBX,8),%R12 |
(660) 0x450b42 LEA (%R9,%RAX,1),%R9 |
(660) 0x450b46 ADD 0x8(%R15),%RDX |
(660) 0x450b4a LEA -0x1(%R14),%R15 |
(660) 0x450b4e MOV %R15,0xc0(%RSP) |
(660) 0x450b56 MOV %RDX,0x98(%RSP) |
(659) 0x450b5e MOV 0x94(%RSP),%R8D |
(659) 0x450b66 MOV 0x98(%RSP),%RSI |
(659) 0x450b6e MOV %R9,0xb0(%RSP) |
(659) 0x450b76 MOV %R11,%RDI |
(659) 0x450b79 MOV %R10,0xa8(%RSP) |
(659) 0x450b81 VMOVSD (%R10),%XMM15 |
(659) 0x450b86 VBROADCASTSD %XMM9,%ZMM5 |
(659) 0x450b8c VBROADCASTSD %XMM10,%ZMM4 |
(659) 0x450b92 LEA (%RSI,%R9,8),%RAX |
(659) 0x450b96 VBROADCASTSD %XMM7,%ZMM3 |
(659) 0x450b9c VBROADCASTSD %XMM8,%ZMM2 |
(659) 0x450ba2 AND $0x7,%R8D |
(659) 0x450ba6 MOV %R8D,0xd0(%RSP) |
(658) 0x450bae VMULSD (%RDI),%XMM15,%XMM6 |
(658) 0x450bb2 TEST %R14,%R14 |
(658) 0x450bb5 JE 450eb0 |
(658) 0x450bbb CMPQ $0x6,0xc0(%RSP) |
(658) 0x450bc4 JBE 450fc0 |
(658) 0x450bca LEA -0x40(%R13),%RSI |
(658) 0x450bce LEA (%RAX,%R12,1),%R9 |
(658) 0x450bd2 VBROADCASTSD %XMM6,%ZMM16 |
(658) 0x450bd8 XOR %R8D,%R8D |
(658) 0x450bdb SHR $0x6,%RSI |
(658) 0x450bdf LEA (%R9,%R12,1),%R15 |
(658) 0x450be3 INC %RSI |
(658) 0x450be6 LEA (%R15,%R12,1),%R10 |
(658) 0x450bea AND $0x3,%ESI |
(658) 0x450bed JE 450ca0 |
(658) 0x450bf3 CMP $0x1,%RSI |
(658) 0x450bf7 JE 450c63 |
(658) 0x450bf9 CMP $0x2,%RSI |
(658) 0x450bfd JE 450c2f |
(658) 0x450bff VMULPD (%R9),%ZMM4,%ZMM0 |
(658) 0x450c05 MOV $0x40,%R8D |
(658) 0x450c0b VMULPD (%R10),%ZMM2,%ZMM17 |
(658) 0x450c11 VFMADD231PD (%RAX),%ZMM5,%ZMM0 |
(658) 0x450c17 VFMADD231PD (%R15),%ZMM3,%ZMM17 |
(658) 0x450c1d VADDPD %ZMM17,%ZMM0,%ZMM1 |
(658) 0x450c23 VFMADD213PD (%RCX),%ZMM16,%ZMM1 |
(658) 0x450c29 VMOVUPD %ZMM1,(%RCX) |
(658) 0x450c2f VMULPD (%R9,%R8,1),%ZMM4,%ZMM0 |
(658) 0x450c36 VMULPD (%R10,%R8,1),%ZMM2,%ZMM18 |
(658) 0x450c3d VFMADD231PD (%RAX,%R8,1),%ZMM5,%ZMM0 |
(658) 0x450c44 VFMADD231PD (%R15,%R8,1),%ZMM3,%ZMM18 |
(658) 0x450c4b VADDPD %ZMM18,%ZMM0,%ZMM1 |
(658) 0x450c51 VFMADD213PD (%RCX,%R8,1),%ZMM16,%ZMM1 |
(658) 0x450c58 VMOVUPD %ZMM1,(%RCX,%R8,1) |
(658) 0x450c5f ADD $0x40,%R8 |
(658) 0x450c63 VMULPD (%R9,%R8,1),%ZMM4,%ZMM0 |
(658) 0x450c6a VMULPD (%R10,%R8,1),%ZMM2,%ZMM19 |
(658) 0x450c71 VFMADD231PD (%RAX,%R8,1),%ZMM5,%ZMM0 |
(658) 0x450c78 VFMADD231PD (%R15,%R8,1),%ZMM3,%ZMM19 |
(658) 0x450c7f VADDPD %ZMM19,%ZMM0,%ZMM1 |
(658) 0x450c85 VFMADD213PD (%RCX,%R8,1),%ZMM16,%ZMM1 |
(658) 0x450c8c VMOVUPD %ZMM1,(%RCX,%R8,1) |
(658) 0x450c93 ADD $0x40,%R8 |
(658) 0x450c97 CMP %R13,%R8 |
(658) 0x450c9a JE 450d82 |
(661) 0x450ca0 VMULPD (%R9,%R8,1),%ZMM4,%ZMM0 |
(661) 0x450ca7 VMULPD (%R10,%R8,1),%ZMM2,%ZMM20 |
(661) 0x450cae VMULPD 0x40(%R10,%R8,1),%ZMM2,%ZMM21 |
(661) 0x450cb6 VMULPD 0x80(%R10,%R8,1),%ZMM2,%ZMM22 |
(661) 0x450cbe VMULPD 0xc0(%R10,%R8,1),%ZMM2,%ZMM23 |
(661) 0x450cc6 VFMADD231PD (%RAX,%R8,1),%ZMM5,%ZMM0 |
(661) 0x450ccd VFMADD231PD (%R15,%R8,1),%ZMM3,%ZMM20 |
(661) 0x450cd4 VFMADD231PD 0x40(%R15,%R8,1),%ZMM3,%ZMM21 |
(661) 0x450cdc VFMADD231PD 0x80(%R15,%R8,1),%ZMM3,%ZMM22 |
(661) 0x450ce4 VFMADD231PD 0xc0(%R15,%R8,1),%ZMM3,%ZMM23 |
(661) 0x450cec VADDPD %ZMM20,%ZMM0,%ZMM1 |
(661) 0x450cf2 VMULPD 0x40(%R9,%R8,1),%ZMM4,%ZMM0 |
(661) 0x450cfa VFMADD213PD (%RCX,%R8,1),%ZMM16,%ZMM1 |
(661) 0x450d01 VFMADD231PD 0x40(%R8,%RAX,1),%ZMM5,%ZMM0 |
(661) 0x450d09 VMOVUPD %ZMM1,(%RCX,%R8,1) |
(661) 0x450d10 VADDPD %ZMM21,%ZMM0,%ZMM1 |
(661) 0x450d16 VMULPD 0x80(%R9,%R8,1),%ZMM4,%ZMM0 |
(661) 0x450d1e VFMADD213PD 0x40(%RCX,%R8,1),%ZMM16,%ZMM1 |
(661) 0x450d26 VFMADD231PD 0x80(%R8,%RAX,1),%ZMM5,%ZMM0 |
(661) 0x450d2e VMOVUPD %ZMM1,0x40(%RCX,%R8,1) |
(661) 0x450d36 VADDPD %ZMM22,%ZMM0,%ZMM1 |
(661) 0x450d3c VMULPD 0xc0(%R9,%R8,1),%ZMM4,%ZMM0 |
(661) 0x450d44 VFMADD213PD 0x80(%RCX,%R8,1),%ZMM16,%ZMM1 |
(661) 0x450d4c VFMADD231PD 0xc0(%R8,%RAX,1),%ZMM5,%ZMM0 |
(661) 0x450d54 VMOVUPD %ZMM1,0x80(%RCX,%R8,1) |
(661) 0x450d5c VADDPD %ZMM23,%ZMM0,%ZMM1 |
(661) 0x450d62 VFMADD213PD 0xc0(%RCX,%R8,1),%ZMM16,%ZMM1 |
(661) 0x450d6a VMOVUPD %ZMM1,0xc0(%RCX,%R8,1) |
(661) 0x450d72 ADD $0x100,%R8 |
(661) 0x450d79 CMP %R13,%R8 |
(661) 0x450d7c JNE 450ca0 |
(658) 0x450d82 MOV 0xd0(%RSP),%EDX |
(658) 0x450d89 TEST %EDX,%EDX |
(658) 0x450d8b JE 450eb0 |
(658) 0x450d91 MOV 0xb8(%RSP),%RDX |
(658) 0x450d99 MOV %R14,%RSI |
(658) 0x450d9c SUB %RDX,%RSI |
(658) 0x450d9f LEA -0x1(%RSI),%R9 |
(658) 0x450da3 CMP $0x2,%R9 |
(658) 0x450da7 JBE 450df9 |
(658) 0x450da9 LEA (%RBX,%RDX,1),%R9 |
(658) 0x450dad LEA (%RCX,%RDX,8),%R8 |
(658) 0x450db1 VBROADCASTSD %XMM6,%YMM0 |
(658) 0x450db6 LEA (%RBX,%R9,1),%R10 |
(658) 0x450dba LEA (%RBX,%R10,1),%R15 |
(658) 0x450dbe VMULPD (%RAX,%R10,8),%YMM11,%YMM1 |
(658) 0x450dc4 VMULPD (%RAX,%R15,8),%YMM13,%YMM24 |
(658) 0x450dcb VFMADD231PD (%RAX,%R9,8),%YMM12,%YMM1 |
(658) 0x450dd1 VFMADD231PD (%RAX,%RDX,8),%YMM14,%YMM24 |
(658) 0x450dd8 VADDPD %YMM24,%YMM1,%YMM1 |
(658) 0x450dde VFMADD213PD (%R8),%YMM1,%YMM0 |
(658) 0x450de3 VMOVUPD %YMM0,(%R8) |
(658) 0x450de8 TEST $0x3,%SIL |
(658) 0x450dec JE 450eb0 |
(658) 0x450df2 AND $-0x4,%RSI |
(658) 0x450df6 ADD %RSI,%RDX |
(658) 0x450df9 LEA (%RBX,%RDX,1),%R10 |
(658) 0x450dfd LEA (,%RDX,8),%R8 |
(658) 0x450e05 LEA (%R10,%RBX,1),%RSI |
(658) 0x450e09 LEA (%RCX,%R8,1),%R9 |
(658) 0x450e0d VMULSD (%RAX,%RSI,8),%XMM7,%XMM0 |
(658) 0x450e12 ADD %RBX,%RSI |
(658) 0x450e15 LEA 0x1(%RDX),%R15 |
(658) 0x450e19 VMULSD (%RAX,%RSI,8),%XMM8,%XMM1 |
(658) 0x450e1e VFMADD231SD (%RAX,%R10,8),%XMM10,%XMM0 |
(658) 0x450e24 VFMADD231SD (%RAX,%RDX,8),%XMM9,%XMM1 |
(658) 0x450e2a VADDSD %XMM1,%XMM0,%XMM0 |
(658) 0x450e2e VFMADD213SD (%R9),%XMM6,%XMM0 |
(658) 0x450e33 VMOVSD %XMM0,(%R9) |
(658) 0x450e38 CMP %R14,%R15 |
(658) 0x450e3b JAE 450eb0 |
(658) 0x450e3d ADD %RBX,%R15 |
(658) 0x450e40 LEA 0x8(%RCX,%R8,1),%R10 |
(658) 0x450e45 ADD $0x2,%RDX |
(658) 0x450e49 LEA (%RBX,%R15,1),%R9 |
(658) 0x450e4d VMULSD (%RAX,%R9,8),%XMM7,%XMM0 |
(658) 0x450e53 ADD %RBX,%R9 |
(658) 0x450e56 VMULSD (%RAX,%R9,8),%XMM8,%XMM1 |
(658) 0x450e5c VFMADD231SD (%RAX,%R15,8),%XMM10,%XMM0 |
(658) 0x450e62 VFMADD231SD 0x8(%R8,%RAX,1),%XMM9,%XMM1 |
(658) 0x450e69 VADDSD %XMM1,%XMM0,%XMM0 |
(658) 0x450e6d VFMADD213SD (%R10),%XMM6,%XMM0 |
(658) 0x450e72 VMOVSD %XMM0,(%R10) |
(658) 0x450e77 CMP %R14,%RDX |
(658) 0x450e7a JAE 450eb0 |
(658) 0x450e7c ADD %RBX,%RDX |
(658) 0x450e7f LEA 0x10(%RCX,%R8,1),%R15 |
(658) 0x450e84 LEA (%RBX,%RDX,1),%RSI |
(658) 0x450e88 VMULSD (%RAX,%RSI,8),%XMM7,%XMM0 |
(658) 0x450e8d ADD %RBX,%RSI |
(658) 0x450e90 VMULSD (%RAX,%RSI,8),%XMM8,%XMM1 |
(658) 0x450e95 VFMADD231SD (%RAX,%RDX,8),%XMM10,%XMM0 |
(658) 0x450e9b VFMADD231SD 0x10(%R8,%RAX,1),%XMM9,%XMM1 |
(658) 0x450ea2 VADDSD %XMM1,%XMM0,%XMM0 |
(658) 0x450ea6 VFMADD213SD (%R15),%XMM6,%XMM0 |
(658) 0x450eab VMOVSD %XMM0,(%R15) |
(658) 0x450eb0 MOV 0xd8(%RSP),%RDX |
(658) 0x450eb8 ADD $0x8,%RDI |
(658) 0x450ebc ADD %RDX,%RAX |
(658) 0x450ebf CMP %RDI,0xc8(%RSP) |
(658) 0x450ec7 JNE 450bae |
(659) 0x450ecd MOV 0xa8(%RSP),%R10 |
(659) 0x450ed5 MOV 0xb0(%RSP),%R9 |
(659) 0x450edd MOV 0xa0(%RSP),%RDI |
(659) 0x450ee5 ADD $0x8,%R10 |
(659) 0x450ee9 ADD %RDI,%R9 |
(659) 0x450eec CMP %R10,%R11 |
(659) 0x450eef JNE 450b5e |
(660) 0x450ef5 ADDQ $0x8,0x88(%RSP) |
(660) 0x450efe ADDQ $0x18,0x78(%RSP) |
(660) 0x450f04 MOV 0x88(%RSP),%RAX |
(660) 0x450f0c CMP %RAX,0x60(%RSP) |
(660) 0x450f11 JNE 45080e |
0x450f17 MOV 0x28(%RSP),%RBX |
0x450f1c VZEROUPPER |
0x450f1f MOV 0x38(%RSP),%RDI |
0x450f24 XOR %R14D,%R14D |
0x450f27 XOR %R12D,%R12D |
0x450f2a CALL 4a4310 <_ZN11qmcplusplus9TimerTypeINS_8CPUClockEE4stopEv> |
0x450f2f MOV 0x30(%RBX),%ESI |
0x450f32 MOV 0x30(%RSP),%R13 |
0x450f37 TEST %ESI,%ESI |
0x450f39 JLE 450f99 |
(657) 0x450f3b MOV 0x40(%RBX),%EAX |
(657) 0x450f3e MOV %ESI,%R11D |
(657) 0x450f41 MOV 0x8(%RBX),%ECX |
(657) 0x450f44 IMUL %R12D,%R11D |
(657) 0x450f48 INC %R12D |
(657) 0x450f4b IMUL %R12D,%EAX |
(657) 0x450f4f CMP %ECX,%EAX |
(657) 0x450f51 CMOVG %ECX,%EAX |
(657) 0x450f54 SUB %R11D,%EAX |
(657) 0x450f57 TEST %EAX,%EAX |
(657) 0x450f59 JLE 450f90 |
(657) 0x450f5b MOV 0x300(%RBX),%RDX |
(657) 0x450f62 MOV 0x18(%R13),%R15 |
(657) 0x450f66 CLTQ |
(657) 0x450f68 MOVSXD %R11D,%R8 |
(657) 0x450f6b MOV (%RDX,%R14,1),%R9 |
(657) 0x450f6f LEA (,%RAX,8),%RDX |
(657) 0x450f77 LEA (%R15,%R8,8),%RDI |
(657) 0x450f7b CMP $0x8,%RDX |
(657) 0x450f7f JE 451075 |
(657) 0x450f85 MOV %R9,%RSI |
(657) 0x450f88 CALL 4040c0 <memmove@plt> |
(657) 0x450f8d MOV 0x30(%RBX),%ESI |
(657) 0x450f90 ADD $0x18,%R14 |
(657) 0x450f94 CMP %ESI,%R12D |
(657) 0x450f97 JL 450f3b |
0x450f99 MOV 0x138(%RSP),%RAX |
0x450fa1 SUB %FS:0x28,%RAX |
0x450faa JNE 451083 |
0x450fb0 LEA -0x28(%RBP),%RSP |
0x450fb4 POP %RBX |
0x450fb5 POP %R12 |
0x450fb7 POP %R13 |
0x450fb9 POP %R14 |
0x450fbb POP %R15 |
0x450fbd POP %RBP |
0x450fbe RET |
0x450fbf NOP |
(658) 0x450fc0 XOR %EDX,%EDX |
(658) 0x450fc2 JMP 450d99 |
(660) 0x450fc7 VMOVSD 0x7ecb1(%RIP),%XMM7 |
(660) 0x450fcf MOV 0x7ecda(%RIP),%RSI |
(660) 0x450fd6 MOVQ $0,0xc0(%RSP) |
(660) 0x450fe2 VXORPD %XMM8,%XMM8,%XMM8 |
(660) 0x450fe7 VMOVQ %RSI,%XMM10 |
(660) 0x450fec VMOVSD %XMM7,%XMM7,%XMM9 |
(660) 0x450ff0 JMP 450a4c |
(660) 0x450ff5 MOVQ $0,0xd0(%RSP) |
(660) 0x451001 VMOVAPD 0x7ec77(%RIP),%YMM3 |
(660) 0x451009 JMP 4509a3 |
(660) 0x45100e VMOVAPD 0x7ec6a(%RIP),%YMM11 |
(660) 0x451016 XOR %R12D,%R12D |
(660) 0x451019 JMP 4508f0 |
(660) 0x45101e VMOVAPD 0x7ec7a(%RIP),%YMM11 |
(660) 0x451026 MOVSXD %ESI,%R12 |
(660) 0x451029 JMP 4508f0 |
(660) 0x45102e MOV 0x7ec7b(%RIP),%RDX |
(660) 0x451035 CLTQ |
(660) 0x451037 VMOVSD 0x7ec79(%RIP),%XMM8 |
(660) 0x45103f VXORPD %XMM9,%XMM9,%XMM9 |
(660) 0x451044 MOV %RAX,0xc0(%RSP) |
(660) 0x45104c VMOVSD 0x7ec54(%RIP),%XMM10 |
(660) 0x451054 VMOVQ %RDX,%XMM7 |
(660) 0x451059 JMP 450a4c |
(660) 0x45105e CLTQ |
(660) 0x451060 VMOVAPD 0x7ec38(%RIP),%YMM3 |
(660) 0x451068 MOV %RAX,0xd0(%RSP) |
(660) 0x451070 JMP 4509a3 |
(657) 0x451075 VMOVSD (%R9),%XMM15 |
(657) 0x45107a VMOVSD %XMM15,(%RDI) |
(657) 0x45107e JMP 450f90 |
0x451083 CALL 404140 <__stack_chk_fail@plt> |
0x451088 NOPL (%RAX,%RAX,1) |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►49.73+ | miniqmcreference::DiracDetermi[...] | DiracDeterminantRef.cpp:194 | exec |
○ | qmcplusplus::WaveFunction::rat[...] | WaveFunction.cpp:216 | exec |
○ | main._omp_fn.1 | stl_vector.h:1126 | exec |
○ | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
►40.64+ | miniqmcreference::DiracDetermi[...] | DiracDeterminantRef.cpp:194 | exec |
○ | qmcplusplus::WaveFunction::rat[...] | WaveFunction.cpp:216 | exec |
○ | main._omp_fn.1 | miniqmc.cpp:486 | exec |
○ | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
►9.60+ | miniqmcreference::DiracDetermi[...] | DiracDeterminantRef.cpp:194 | exec |
○ | qmcplusplus::WaveFunction::rat[...] | WaveFunction.cpp:216 | exec |
○ | main._omp_fn.1 | stl_vector.h:1123 | exec |
○ | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
Path / |
Source file and lines | einspline_spo_ref.hpp:172-189 |
Module | exec |
nb instructions | 110 |
nb uops | 122 |
loop length | 550 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 12 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 19 |
ADD-SUB / MUL ratio | 1.00 |
micro-operation queue | 30.50 cycles |
front end | 30.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 14.50 | 14.00 | 20.17 | 19.83 | 24.00 | 14.00 | 14.50 | 20.00 |
cycles | 14.50 | 14.00 | 20.17 | 19.83 | 24.00 | 14.00 | 14.50 | 20.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 29.44 |
Stall cycles | 0.00 |
Front-end | 30.50 |
Dispatch | 24.00 |
Overall L1 | 30.50 |
all | 4% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 14% |
all | 10% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 7% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 21% |
all | 11% |
load | 10% |
store | 11% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 13% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 15% |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 14% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
PUSH %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOVSXD %EDX,%R15 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
PUSH %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
PUSH %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
PUSH %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RSI,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
PUSH %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RDI,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
AND $-0x40,%RSP | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
SUB $0x140,%RSP | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %RCX,0x30(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %FS:0x28,%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,0x138(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x348(%RDI),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %RAX,0x38(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
CALL 4a40e0 <_ZN11qmcplusplus9TimerTypeINS_8CPUClockEE5startEv> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
LEA 0x988(%R12),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP 0x984(%R12),%R15D | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JE 4506ad | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV 0x5e8(%R12),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%R15,%R15,2),%RDX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RCX,%RDX,8),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x8(%RSI),%XMM4 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%RSI),%XMM2 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x10(%RSI),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMULSD 0xf8(%RBX),%XMM4,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD 0xf0(%RBX),%XMM4,%XMM3 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD 0xe8(%RBX),%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0xe0(%RBX),%XMM2,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0xd8(%RBX),%XMM2,%XMM3 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD132SD 0xd0(%RBX),%XMM5,%XMM2 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0x110(%RBX),%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0x108(%RBX),%XMM1,%XMM3 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD132SD 0x100(%RBX),%XMM2,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCOMISD 0x7f80f(%RIP),%XMM1 | 2 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
JBE 45071e | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VXORPD %XMM8,%XMM8,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VCOMISD %XMM1,%XMM8 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JA 450729 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VRNDSCALESD $0x9,%XMM1,%XMM1,%XMM7 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VSUBSD %XMM7,%XMM1,%XMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VXORPD %XMM10,%XMM10,%XMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VCOMISD %XMM3,%XMM10 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JBE 45073e | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VCOMISD 0x7f7e4(%RIP),%XMM3 | 2 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
JA 45074a | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VRNDSCALESD $0x9,%XMM3,%XMM3,%XMM9 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VSUBSD %XMM9,%XMM3,%XMM10 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCOMISD 0x7f7ce(%RIP),%XMM0 | 2 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
JBE 45075f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VXORPD %XMM13,%XMM13,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VCOMISD %XMM0,%XMM13 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JA 45076b | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VRNDSCALESD $0x9,%XMM0,%XMM0,%XMM12 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VSUBSD %XMM12,%XMM0,%XMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVSXD 0x30(%RBX),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
TEST %R8D,%R8D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 450f1f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOVSXD 0x40(%RBX),%R14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x2e8(%RBX),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA 0xe0(%RSP),%R15 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x120(%RSP),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x300(%RBX),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R15,0x58(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R14,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
LEA (%R11,%R8,8),%R13 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%R14,8),%R9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14D,0x94(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
AND $-0x8,%R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %R13,0x60(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R14,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R9,0x80(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
SHR $0x3,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
MOV %R10,0x78(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
SAL $0x6,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
MOV %R12,0xb8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RAX,0xc8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RBX,0x28(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R11,0x88(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA 0x100(%RSP),%R11 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM10,0x50(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD %XMM8,0x48(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD %XMM13,0x40(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x28(%RSP),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV 0x38(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
XOR %R14D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 4a4310 <_ZN11qmcplusplus9TimerTypeINS_8CPUClockEE4stopEv> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV 0x30(%RBX),%ESI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x30(%RSP),%R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
TEST %ESI,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 450f99 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV 0x138(%RSP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
SUB %FS:0x28,%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JNE 451083 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
POP %RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %RBP | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
RET | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 | 0 | 1 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 404140 <__stack_chk_fail@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
Source file and lines | einspline_spo_ref.hpp:172-189 |
Module | exec |
nb instructions | 110 |
nb uops | 122 |
loop length | 550 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 12 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 19 |
ADD-SUB / MUL ratio | 1.00 |
micro-operation queue | 30.50 cycles |
front end | 30.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 14.50 | 14.00 | 20.17 | 19.83 | 24.00 | 14.00 | 14.50 | 20.00 |
cycles | 14.50 | 14.00 | 20.17 | 19.83 | 24.00 | 14.00 | 14.50 | 20.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 29.44 |
Stall cycles | 0.00 |
Front-end | 30.50 |
Dispatch | 24.00 |
Overall L1 | 30.50 |
all | 4% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 14% |
all | 10% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 7% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 21% |
all | 11% |
load | 10% |
store | 11% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 13% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 15% |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 14% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
PUSH %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOVSXD %EDX,%R15 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
PUSH %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
PUSH %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
PUSH %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RSI,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
PUSH %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RDI,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
AND $-0x40,%RSP | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
SUB $0x140,%RSP | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %RCX,0x30(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %FS:0x28,%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,0x138(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x348(%RDI),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %RAX,0x38(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
CALL 4a40e0 <_ZN11qmcplusplus9TimerTypeINS_8CPUClockEE5startEv> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
LEA 0x988(%R12),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP 0x984(%R12),%R15D | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JE 4506ad | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV 0x5e8(%R12),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%R15,%R15,2),%RDX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RCX,%RDX,8),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x8(%RSI),%XMM4 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%RSI),%XMM2 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x10(%RSI),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMULSD 0xf8(%RBX),%XMM4,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD 0xf0(%RBX),%XMM4,%XMM3 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD 0xe8(%RBX),%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0xe0(%RBX),%XMM2,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0xd8(%RBX),%XMM2,%XMM3 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD132SD 0xd0(%RBX),%XMM5,%XMM2 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0x110(%RBX),%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD 0x108(%RBX),%XMM1,%XMM3 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD132SD 0x100(%RBX),%XMM2,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCOMISD 0x7f80f(%RIP),%XMM1 | 2 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
JBE 45071e | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VXORPD %XMM8,%XMM8,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VCOMISD %XMM1,%XMM8 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JA 450729 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VRNDSCALESD $0x9,%XMM1,%XMM1,%XMM7 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VSUBSD %XMM7,%XMM1,%XMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VXORPD %XMM10,%XMM10,%XMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VCOMISD %XMM3,%XMM10 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JBE 45073e | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VCOMISD 0x7f7e4(%RIP),%XMM3 | 2 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
JA 45074a | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VRNDSCALESD $0x9,%XMM3,%XMM3,%XMM9 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VSUBSD %XMM9,%XMM3,%XMM10 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCOMISD 0x7f7ce(%RIP),%XMM0 | 2 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
JBE 45075f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VXORPD %XMM13,%XMM13,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VCOMISD %XMM0,%XMM13 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JA 45076b | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VRNDSCALESD $0x9,%XMM0,%XMM0,%XMM12 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VSUBSD %XMM12,%XMM0,%XMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVSXD 0x30(%RBX),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
TEST %R8D,%R8D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 450f1f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOVSXD 0x40(%RBX),%R14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x2e8(%RBX),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA 0xe0(%RSP),%R15 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x120(%RSP),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x300(%RBX),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R15,0x58(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R14,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
LEA (%R11,%R8,8),%R13 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%R14,8),%R9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14D,0x94(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
AND $-0x8,%R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %R13,0x60(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R14,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R9,0x80(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
SHR $0x3,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
MOV %R10,0x78(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
SAL $0x6,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
MOV %R12,0xb8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RAX,0xc8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RBX,0x28(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R11,0x88(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA 0x100(%RSP),%R11 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM10,0x50(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD %XMM8,0x48(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD %XMM13,0x40(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x28(%RSP),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV 0x38(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
XOR %R14D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 4a4310 <_ZN11qmcplusplus9TimerTypeINS_8CPUClockEE4stopEv> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV 0x30(%RBX),%ESI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x30(%RSP),%R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
TEST %ESI,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 450f99 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV 0x138(%RSP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
SUB %FS:0x28,%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JNE 451083 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
POP %RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %RBP | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
RET | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 | 0 | 1 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 404140 <__stack_chk_fail@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼miniqmcreference::einspline_spo_ref | 15.91 | 15.51 |
▼Loop 660 - einspline_spo_ref.hpp:175-176 - exec– | 0.02 | 0.01 |
▼Loop 659 - MultiBsplineRef.hpp:65-74 - exec– | 0 | 0 |
▼Loop 658 - MultiBsplineRef.hpp:66-74 - exec– | 0.01 | 0 |
○Loop 661 - MultiBsplineRef.hpp:72-74 - exec | 15.87 | 15.48 |
○Loop 657 - einspline_spo_ref.hpp:183-187 - exec | 0.01 | 0.01 |