Function: miniqmcreference::DiracDeterminantRef<qmcplusplus::DelayedUpdate<double, double> >::evalua ... | Module: exec | Source: DiracDeterminantRef.cpp:152-181 [...] | Coverage: 0.56% |
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Function: miniqmcreference::DiracDeterminantRef<qmcplusplus::DelayedUpdate<double, double> >::evalua ... | Module: exec | Source: DiracDeterminantRef.cpp:152-181 [...] | Coverage: 0.56% |
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/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVectorOps.h: 130 - 131 |
-------------------------------------------------------------------------------- |
130: for (unsigned d = 1; d < D; ++d) |
131: res += lhs[d] * rhs[d]; |
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h: 217 - 217 |
-------------------------------------------------------------------------------- |
217: inline Type_t* operator[](size_type i) { return X.data() + i * D2; } |
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h: 63 - 183 |
-------------------------------------------------------------------------------- |
63: return (a * b); |
[...] |
94: (const_cast<T1&>(a) += b); |
[...] |
181: inline typename BinaryReturn<T1, T2, OpAssign>::Type_t operator()(const T1& a, const T2& b) const |
182: { |
183: return (const_cast<T1&>(a) = b); |
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 56 - 223 |
-------------------------------------------------------------------------------- |
56: explicit inline Vector(T* ref, size_t n) : nLocal(n), X(ref) {} |
[...] |
144: virtual ~Vector() { free(); } |
[...] |
210: if (nAllocated) |
[...] |
223: return X[i]; |
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/SPOSet.h: 106 - 112 |
-------------------------------------------------------------------------------- |
106: for (int iat = first, i = 0; iat < last; ++iat, ++i) |
107: { |
108: ValueVector_t v(logdet[i], OrbitalSetSize); |
109: GradVector_t g(dlogdet[i], OrbitalSetSize); |
110: ValueVector_t l(d2logdet[i], OrbitalSetSize); |
111: evaluate(P, iat, v, g, l); |
112: } |
/usr/include/c++/13.1.1/bits/new_allocator.h: 168 - 168 |
-------------------------------------------------------------------------------- |
168: _GLIBCXX_OPERATOR_DELETE(_GLIBCXX_SIZED_DEALLOC(__p, __n)); |
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp: 81 - 154 |
-------------------------------------------------------------------------------- |
81: for (int i = 0; i < n; i++) |
82: res += a[i] * b[i]; |
[...] |
154: for (int i = 0; i < n; i++) |
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp: 152 - 181 |
-------------------------------------------------------------------------------- |
152: void DiracDeterminantRef<DU_TYPE>::evaluateGL(ParticleSet& P, |
153: ParticleSet::ParticleGradient_t& G, |
154: ParticleSet::ParticleLaplacian_t& L, |
155: bool fromscratch) |
156: { |
157: if (UpdateMode == ORB_PBYP_RATIO) |
158: { //need to compute dpsiM and d2psiM. Do not touch psiM! |
159: SPOVGLTimer->start(); |
160: Phi->evaluate_notranspose(P, FirstIndex, LastIndex, psiM_temp, dpsiM, d2psiM); |
161: SPOVGLTimer->stop(); |
162: } |
163: |
164: if (NumPtcls == 1) |
165: { |
166: ValueType y = psiM(0, 0); |
167: GradType rv = y * dpsiM(0, 0); |
168: G[FirstIndex] += rv; |
169: L[FirstIndex] += y * d2psiM(0, 0) - dot(rv, rv); |
170: } |
171: else |
172: { |
173: for (size_t i = 0, iat = FirstIndex; i < NumPtcls; ++i, ++iat) |
174: { |
175: mValueType dot_temp = simd::dot(psiM[i], d2psiM[i], NumOrbitals); |
176: mGradType rv = simd::dot(psiM[i], dpsiM[i], NumOrbitals); |
177: G[iat] += rv; |
178: L[iat] += dot_temp - dot(rv, rv); |
179: } |
180: } |
181: } |
/usr/include/c++/13.1.1/bits/unique_ptr.h: 199 - 199 |
-------------------------------------------------------------------------------- |
199: pointer _M_ptr() const noexcept { return std::get<0>(_M_t); } |
0x46ba20 PUSH %RBP |
0x46ba21 MOV %RSP,%RBP |
0x46ba24 PUSH %R15 |
0x46ba26 PUSH %R14 |
0x46ba28 PUSH %R13 |
0x46ba2a PUSH %R12 |
0x46ba2c PUSH %RBX |
0x46ba2d MOV %RDI,%RBX |
0x46ba30 SUB $0xf8,%RSP |
0x46ba37 MOV %RSI,-0xe8(%RBP) |
0x46ba3e MOV %RDX,-0x118(%RBP) |
0x46ba45 MOV 0xc(%RDI),%EDI |
0x46ba48 MOV %RCX,-0x120(%RBP) |
0x46ba4f MOV %FS:0x28,%RAX |
0x46ba58 MOV %RAX,-0x38(%RBP) |
0x46ba5c XOR %EAX,%EAX |
0x46ba5e TEST %EDI,%EDI |
0x46ba60 JE 46bed5 |
0x46ba66 MOV 0x484(%RBX),%R14D |
0x46ba6d MOVSXD 0x478(%RBX),%R13 |
0x46ba74 CMP $0x1,%R14D |
0x46ba78 JE 46be47 |
0x46ba7e MOVSXD %R14D,%R15 |
0x46ba81 TEST %R14D,%R14D |
0x46ba84 JE 46bdf8 |
0x46ba8a MOV -0x118(%RBP),%RAX |
0x46ba91 MOV -0x120(%RBP),%R14 |
0x46ba98 LEA (%R13,%R13,2),%R12 |
0x46ba9d VXORPD %XMM5,%XMM5,%XMM5 |
0x46baa1 MOVSXD 0x480(%RBX),%R10 |
0x46baa8 MOV 0x158(%RBX),%R8 |
0x46baaf MOV 0x18(%RAX),%RSI |
0x46bab3 MOV 0xd8(%RBX),%RDX |
0x46baba MOV 0x100(%RBX),%RCX |
0x46bac1 MOV 0x18(%R14),%RAX |
0x46bac5 SAL $0x3,%R8 |
0x46bac9 MOV %R10,%R11 |
0x46bacc LEA (%RSI,%R12,8),%RDI |
0x46bad0 SAL $0x3,%R10 |
0x46bad4 MOV 0x180(%RBX),%RSI |
0x46badb MOV %R8,-0xf0(%RBP) |
0x46bae2 LEA (,%RDX,8),%R12 |
0x46baea LEA (%R10,%RCX,1),%R9 |
0x46baee XOR %R8D,%R8D |
0x46baf1 LEA (%RAX,%R13,8),%R13 |
0x46baf5 NOPL (%RAX) |
(829) 0x46baf8 TEST %R11D,%R11D |
(829) 0x46bafb JLE 46be2c |
(829) 0x46bb01 LEA -0x8(%R10),%RDX |
(829) 0x46bb05 XOR %R14D,%R14D |
(829) 0x46bb08 VXORPD %XMM1,%XMM1,%XMM1 |
(829) 0x46bb0c SHR $0x3,%RDX |
(829) 0x46bb10 INC %RDX |
(829) 0x46bb13 AND $0x7,%EDX |
(829) 0x46bb16 JE 46bbb4 |
(829) 0x46bb1c CMP $0x1,%RDX |
(829) 0x46bb20 JE 46bb9f |
(829) 0x46bb22 CMP $0x2,%RDX |
(829) 0x46bb26 JE 46bb8f |
(829) 0x46bb28 CMP $0x3,%RDX |
(829) 0x46bb2c JE 46bb7f |
(829) 0x46bb2e CMP $0x4,%RDX |
(829) 0x46bb32 JE 46bb6f |
(829) 0x46bb34 CMP $0x5,%RDX |
(829) 0x46bb38 JE 46bb5f |
(829) 0x46bb3a CMP $0x6,%RDX |
(829) 0x46bb3e JE 46bb4f |
(829) 0x46bb40 VMOVSD (%RCX),%XMM7 |
(829) 0x46bb44 MOV $0x8,%R14D |
(829) 0x46bb4a VFMADD231SD (%RSI),%XMM7,%XMM1 |
(829) 0x46bb4f VMOVSD (%RCX,%R14,1),%XMM4 |
(829) 0x46bb55 VFMADD231SD (%RSI,%R14,1),%XMM4,%XMM1 |
(829) 0x46bb5b ADD $0x8,%R14 |
(829) 0x46bb5f VMOVSD (%RCX,%R14,1),%XMM0 |
(829) 0x46bb65 VFMADD231SD (%RSI,%R14,1),%XMM0,%XMM1 |
(829) 0x46bb6b ADD $0x8,%R14 |
(829) 0x46bb6f VMOVSD (%RCX,%R14,1),%XMM2 |
(829) 0x46bb75 VFMADD231SD (%RSI,%R14,1),%XMM2,%XMM1 |
(829) 0x46bb7b ADD $0x8,%R14 |
(829) 0x46bb7f VMOVSD (%RCX,%R14,1),%XMM3 |
(829) 0x46bb85 VFMADD231SD (%RSI,%R14,1),%XMM3,%XMM1 |
(829) 0x46bb8b ADD $0x8,%R14 |
(829) 0x46bb8f VMOVSD (%RCX,%R14,1),%XMM6 |
(829) 0x46bb95 VFMADD231SD (%RSI,%R14,1),%XMM6,%XMM1 |
(829) 0x46bb9b ADD $0x8,%R14 |
(829) 0x46bb9f VMOVSD (%RCX,%R14,1),%XMM8 |
(829) 0x46bba5 VFMADD231SD (%RSI,%R14,1),%XMM8,%XMM1 |
(829) 0x46bbab ADD $0x8,%R14 |
(829) 0x46bbaf CMP %R14,%R10 |
(829) 0x46bbb2 JE 46bc2b |
(830) 0x46bbb4 VMOVSD (%RCX,%R14,1),%XMM9 |
(830) 0x46bbba VMOVSD 0x8(%R14,%RCX,1),%XMM10 |
(830) 0x46bbc1 VMOVSD 0x10(%R14,%RCX,1),%XMM11 |
(830) 0x46bbc8 VMOVSD 0x18(%R14,%RCX,1),%XMM12 |
(830) 0x46bbcf VFMADD231SD (%RSI,%R14,1),%XMM9,%XMM1 |
(830) 0x46bbd5 VMOVSD 0x20(%R14,%RCX,1),%XMM13 |
(830) 0x46bbdc ADD $0x40,%R14 |
(830) 0x46bbe0 VMOVSD -0x18(%R14,%RCX,1),%XMM14 |
(830) 0x46bbe7 VMOVSD -0x10(%R14,%RCX,1),%XMM15 |
(830) 0x46bbee VMOVSD -0x8(%R14,%RCX,1),%XMM7 |
(830) 0x46bbf5 VFMADD231SD -0x38(%R14,%RSI,1),%XMM10,%XMM1 |
(830) 0x46bbfc VFMADD231SD -0x30(%R14,%RSI,1),%XMM11,%XMM1 |
(830) 0x46bc03 VFMADD231SD -0x28(%R14,%RSI,1),%XMM12,%XMM1 |
(830) 0x46bc0a VFMADD231SD -0x20(%R14,%RSI,1),%XMM13,%XMM1 |
(830) 0x46bc11 VFMADD231SD -0x18(%R14,%RSI,1),%XMM14,%XMM1 |
(830) 0x46bc18 VFMADD231SD -0x10(%R14,%RSI,1),%XMM15,%XMM1 |
(830) 0x46bc1f VFMADD231SD -0x8(%R14,%RSI,1),%XMM7,%XMM1 |
(830) 0x46bc26 CMP %R14,%R10 |
(830) 0x46bc29 JNE 46bbb4 |
(829) 0x46bc2b MOV 0x118(%RBX),%RAX |
(829) 0x46bc32 MOV 0x140(%RBX),%RDX |
(829) 0x46bc39 VMOVAPD %XMM5,-0x50(%RBP) |
(829) 0x46bc3e VXORPD %XMM0,%XMM0,%XMM0 |
(829) 0x46bc42 IMUL %R8,%RAX |
(829) 0x46bc46 LEA (%RAX,%RAX,2),%R14 |
(829) 0x46bc4a LEA (%RDX,%R14,8),%RAX |
(829) 0x46bc4e MOV %R9,%R14 |
(829) 0x46bc51 MOV %RCX,%RDX |
(829) 0x46bc54 SUB %RCX,%R14 |
(829) 0x46bc57 SUB $0x8,%R14 |
(829) 0x46bc5b SHR $0x3,%R14 |
(829) 0x46bc5f AND $0x3,%R14D |
(829) 0x46bc63 JE 46be20 |
(829) 0x46bc69 VMOVAPD -0x50(%RBP),%XMM2 |
(829) 0x46bc6e VMOVDDUP (%RCX),%XMM4 |
(829) 0x46bc72 VMOVSD (%RCX),%XMM3 |
(829) 0x46bc76 LEA 0x8(%RCX),%RDX |
(829) 0x46bc7a ADD $0x18,%RAX |
(829) 0x46bc7e VFMADD132PD -0x18(%RAX),%XMM2,%XMM4 |
(829) 0x46bc84 VFMADD231SD -0x8(%RAX),%XMM3,%XMM0 |
(829) 0x46bc8a VMOVAPD %XMM4,-0x50(%RBP) |
(829) 0x46bc8f CMP $0x1,%R14 |
(829) 0x46bc93 JE 46be20 |
(829) 0x46bc99 CMP $0x2,%R14 |
(829) 0x46bc9d JE 46bcc5 |
(829) 0x46bc9f VMOVAPD -0x50(%RBP),%XMM8 |
(829) 0x46bca4 VMOVDDUP (%RDX),%XMM6 |
(829) 0x46bca8 VMOVSD (%RDX),%XMM9 |
(829) 0x46bcac ADD $0x18,%RAX |
(829) 0x46bcb0 LEA 0x10(%RCX),%RDX |
(829) 0x46bcb4 VFMADD132PD -0x18(%RAX),%XMM8,%XMM6 |
(829) 0x46bcba VFMADD231SD -0x8(%RAX),%XMM9,%XMM0 |
(829) 0x46bcc0 VMOVAPD %XMM6,-0x50(%RBP) |
(829) 0x46bcc5 VMOVAPD -0x50(%RBP),%XMM11 |
(829) 0x46bcca VMOVDDUP (%RDX),%XMM10 |
(829) 0x46bcce VMOVSD (%RDX),%XMM12 |
(829) 0x46bcd2 MOV %R11D,-0xe8(%RBP) |
(829) 0x46bcd9 ADD $0x8,%RDX |
(829) 0x46bcdd ADD $0x18,%RAX |
(829) 0x46bce1 VFMADD132PD -0x18(%RAX),%XMM11,%XMM10 |
(829) 0x46bce7 VFMADD231SD -0x8(%RAX),%XMM12,%XMM0 |
(829) 0x46bced VMOVAPD %XMM10,-0x50(%RBP) |
(829) 0x46bcf2 JMP 46bd4c |
0x46bcf4 NOPL (%RAX) |
(831) 0x46bcf8 VMOVAPD -0x50(%RBP),%XMM12 |
(831) 0x46bcfd VMOVDDUP 0x8(%RDX),%XMM11 |
(831) 0x46bd02 VMOVSD 0x8(%RDX),%XMM13 |
(831) 0x46bd07 VMOVDDUP 0x10(%RDX),%XMM14 |
(831) 0x46bd0c VMOVSD 0x10(%RDX),%XMM15 |
(831) 0x46bd11 VMOVDDUP 0x18(%RDX),%XMM7 |
(831) 0x46bd16 VMOVSD 0x18(%RDX),%XMM4 |
(831) 0x46bd1b ADD $0x60,%RAX |
(831) 0x46bd1f VFMADD132PD -0x48(%RAX),%XMM12,%XMM11 |
(831) 0x46bd25 VFMADD231SD 0x10(%R14),%XMM13,%XMM0 |
(831) 0x46bd2b ADD $0x20,%RDX |
(831) 0x46bd2f VFMADD231PD -0x30(%RAX),%XMM14,%XMM11 |
(831) 0x46bd35 VFMADD231SD -0x20(%RAX),%XMM15,%XMM0 |
(831) 0x46bd3b VFMADD231PD -0x18(%RAX),%XMM7,%XMM11 |
(831) 0x46bd41 VFMADD231SD -0x8(%RAX),%XMM4,%XMM0 |
(831) 0x46bd47 VMOVAPD %XMM11,-0x50(%RBP) |
(831) 0x46bd4c VMOVSD (%RDX),%XMM14 |
(831) 0x46bd50 VMOVAPD -0x50(%RBP),%XMM7 |
(831) 0x46bd55 LEA 0x8(%RDX),%R11 |
(831) 0x46bd59 LEA 0x18(%RAX),%R14 |
(831) 0x46bd5d VMOVSD -0x50(%RBP),%XMM4 |
(831) 0x46bd62 VMOVSD (%RAX),%XMM13 |
(831) 0x46bd66 VMOVDDUP %XMM14,%XMM15 |
(831) 0x46bd6b VFMADD231SD 0x10(%RAX),%XMM14,%XMM0 |
(831) 0x46bd71 VFMADD132PD (%RAX),%XMM7,%XMM15 |
(831) 0x46bd76 VMOVAPD %XMM15,-0x50(%RBP) |
(831) 0x46bd7b CMP %R9,%R11 |
(831) 0x46bd7e JNE 46bcf8 |
(829) 0x46bd84 VMOVSD %XMM0,-0x40(%RBP) |
(829) 0x46bd89 VMULSD %XMM0,%XMM0,%XMM0 |
(829) 0x46bd8d VUNPCKHPD %XMM15,%XMM15,%XMM2 |
(829) 0x46bd92 MOV -0xe8(%RBP),%R11D |
(829) 0x46bd99 VFMADD132SD %XMM14,%XMM4,%XMM13 |
(829) 0x46bd9e VFMADD132SD %XMM2,%XMM0,%XMM2 |
(829) 0x46bda3 VFMADD132SD %XMM13,%XMM2,%XMM13 |
(829) 0x46bda8 VMOVUPD (%RDI),%XMM3 |
(829) 0x46bdac VMOVSD 0x10(%RDI),%XMM8 |
(829) 0x46bdb1 ADD %R12,%RCX |
(829) 0x46bdb4 ADD $0x18,%RDI |
(829) 0x46bdb8 MOV -0xf0(%RBP),%RAX |
(829) 0x46bdbf ADD %R12,%R9 |
(829) 0x46bdc2 VADDPD -0x50(%RBP),%XMM3,%XMM6 |
(829) 0x46bdc7 VADDSD -0x40(%RBP),%XMM8,%XMM9 |
(829) 0x46bdcc ADD %RAX,%RSI |
(829) 0x46bdcf VMOVUPD %XMM6,-0x18(%RDI) |
(829) 0x46bdd4 VMOVSD %XMM9,-0x8(%RDI) |
(829) 0x46bdd9 VADDSD (%R13,%R8,8),%XMM1,%XMM1 |
(829) 0x46bde0 VSUBSD %XMM13,%XMM1,%XMM10 |
(829) 0x46bde5 VMOVSD %XMM10,(%R13,%R8,8) |
(829) 0x46bdec INC %R8 |
(829) 0x46bdef CMP %R15,%R8 |
(829) 0x46bdf2 JNE 46baf8 |
0x46bdf8 MOV -0x38(%RBP),%RAX |
0x46bdfc SUB %FS:0x28,%RAX |
0x46be05 JNE 46c150 |
0x46be0b LEA -0x28(%RBP),%RSP |
0x46be0f POP %RBX |
0x46be10 POP %R12 |
0x46be12 POP %R13 |
0x46be14 POP %R14 |
0x46be16 POP %R15 |
0x46be18 POP %RBP |
0x46be19 RET |
0x46be1a NOPW (%RAX,%RAX,1) |
(829) 0x46be20 MOV %R11D,-0xe8(%RBP) |
(829) 0x46be27 JMP 46bd4c |
(829) 0x46be2c VXORPD %XMM13,%XMM13,%XMM13 |
(829) 0x46be31 MOVQ $0,-0x40(%RBP) |
(829) 0x46be39 VMOVAPD %XMM5,-0x50(%RBP) |
(829) 0x46be3e VMOVSD %XMM13,%XMM13,%XMM1 |
(829) 0x46be42 JMP 46bda8 |
0x46be47 MOV 0x100(%RBX),%R15 |
0x46be4e MOV 0x140(%RBX),%R10 |
0x46be55 LEA (%R13,%R13,2),%R12 |
0x46be5a MOV -0x118(%RBP),%RDI |
0x46be61 MOV 0x180(%RBX),%RSI |
0x46be68 VMOVSD (%R15),%XMM5 |
0x46be6d MOV -0x120(%RBP),%RBX |
0x46be74 MOV 0x18(%RDI),%RCX |
0x46be78 VMULSD 0x10(%R10),%XMM5,%XMM0 |
0x46be7e VMOVDDUP %XMM5,%XMM2 |
0x46be82 MOV 0x18(%RBX),%R8 |
0x46be86 VMULPD (%R10),%XMM2,%XMM6 |
0x46be8b LEA (%RCX,%R12,8),%R9 |
0x46be8f LEA (%R8,%R13,8),%R13 |
0x46be93 VADDSD 0x10(%R9),%XMM0,%XMM1 |
0x46be99 VUNPCKHPD %XMM6,%XMM6,%XMM8 |
0x46be9d VADDPD (%R9),%XMM6,%XMM9 |
0x46bea2 VMOVSD %XMM6,%XMM6,%XMM3 |
0x46bea6 VMULSD %XMM8,%XMM8,%XMM10 |
0x46beab VMOVSD %XMM1,0x10(%R9) |
0x46beb1 VMOVUPD %XMM9,(%R9) |
0x46beb6 VFNMADD213SD (%R13),%XMM0,%XMM0 |
0x46bebc VFMADD132SD %XMM6,%XMM10,%XMM3 |
0x46bec1 VSUBSD %XMM3,%XMM0,%XMM11 |
0x46bec5 VFMADD132SD (%RSI),%XMM11,%XMM5 |
0x46beca VMOVSD %XMM5,(%R13) |
0x46bed0 JMP 46bdf8 |
0x46bed5 MOV 0x468(%RBX),%RDI |
0x46bedc CALL 4a40e0 <_ZN11qmcplusplus9TimerTypeINS_8CPUClockEE5startEv> |
0x46bee1 MOV 0x470(%RBX),%R14 |
0x46bee8 MOV 0x478(%RBX),%ESI |
0x46beee LEA -0x1ae65(%RIP),%RDX |
0x46bef5 MOV 0x47c(%RBX),%ECX |
0x46befb MOV (%R14),%RAX |
0x46befe MOV %ESI,-0xf0(%RBP) |
0x46bf04 MOV 0x28(%RAX),%R10 |
0x46bf08 CMP %RDX,%R10 |
0x46bf0b JNE 46c0e8 |
0x46bf11 CMP %ESI,%ECX |
0x46bf13 JLE 46c0be |
0x46bf19 SUB %ESI,%ECX |
0x46bf1b LEA -0x80(%RBP),%R11 |
0x46bf1f LEA -0xb0(%RBP),%RDI |
0x46bf26 XOR %R12D,%R12D |
0x46bf29 LEA -0xe0(%RBP),%RAX |
0x46bf30 MOV %RCX,-0x110(%RBP) |
0x46bf37 LEA 0x726f2(%RIP),%R13 |
0x46bf3e MOV %R11,-0x100(%RBP) |
0x46bf45 LEA 0x726a4(%RIP),%R15 |
0x46bf4c MOV %RDI,-0x108(%RBP) |
0x46bf53 MOV %RAX,-0xf8(%RBP) |
0x46bf5a JMP 46bfa1 |
0x46bf5c NOPL (%RAX) |
(832) 0x46bf60 MOV -0xa0(%RBP),%R9 |
(832) 0x46bf67 MOV %R15,-0xb0(%RBP) |
(832) 0x46bf6e TEST %R9,%R9 |
(832) 0x46bf71 JNE 46c0cf |
(832) 0x46bf77 MOV -0xd0(%RBP),%RCX |
(832) 0x46bf7e MOV %R13,-0xe0(%RBP) |
(832) 0x46bf85 TEST %RCX,%RCX |
(832) 0x46bf88 JNE 46c097 |
(832) 0x46bf8e MOV -0x110(%RBP),%RDI |
(832) 0x46bf95 INC %R12 |
(832) 0x46bf98 CMP %RDI,%R12 |
(832) 0x46bf9b JE 46c0be |
(832) 0x46bfa1 MOV 0x98(%RBX),%RSI |
(832) 0x46bfa8 MOV 0x118(%RBX),%R9 |
(832) 0x46bfaf MOV %R13,-0xe0(%RBP) |
(832) 0x46bfb6 MOV 0x158(%RBX),%RAX |
(832) 0x46bfbd MOV 0xc0(%RBX),%RDX |
(832) 0x46bfc4 MOV %R15,-0xb0(%RBP) |
(832) 0x46bfcb IMUL %R12,%RSI |
(832) 0x46bfcf MOV 0x140(%RBX),%R11 |
(832) 0x46bfd6 MOVSXD 0x8(%R14),%R10 |
(832) 0x46bfda MOV %R13,-0x80(%RBP) |
(832) 0x46bfde IMUL %R12,%R9 |
(832) 0x46bfe2 MOVQ $0,-0xd0(%RBP) |
(832) 0x46bfed IMUL %R12,%RAX |
(832) 0x46bff1 MOV %R10,-0xd8(%RBP) |
(832) 0x46bff8 LEA (%RDX,%RSI,8),%R8 |
(832) 0x46bffc MOV 0x180(%RBX),%RSI |
(832) 0x46c003 MOV %R10,-0xa8(%RBP) |
(832) 0x46c00a LEA (%R9,%R9,2),%RCX |
(832) 0x46c00e MOV %R8,-0xc8(%RBP) |
(832) 0x46c015 MOV -0x100(%RBP),%R9 |
(832) 0x46c01c LEA (%R11,%RCX,8),%RDI |
(832) 0x46c020 LEA (%RSI,%RAX,8),%RDX |
(832) 0x46c024 MOV %R10,-0x78(%RBP) |
(832) 0x46c028 MOV -0xf0(%RBP),%R10D |
(832) 0x46c02f MOV %RDI,-0x98(%RBP) |
(832) 0x46c036 MOV (%R14),%R11 |
(832) 0x46c039 MOV %R14,%RDI |
(832) 0x46c03c MOV -0x108(%RBP),%R8 |
(832) 0x46c043 MOV -0xf8(%RBP),%RCX |
(832) 0x46c04a MOV %RDX,-0x68(%RBP) |
(832) 0x46c04e LEA (%R10,%R12,1),%EDX |
(832) 0x46c052 MOVQ $0,-0xa0(%RBP) |
(832) 0x46c05d MOV -0xe8(%RBP),%RSI |
(832) 0x46c064 MOVQ $0,-0x70(%RBP) |
(832) 0x46c06c CALLQ 0x18(%R11) |
(832) 0x46c070 MOV -0x70(%RBP),%R8 |
(832) 0x46c074 MOV %R13,-0x80(%RBP) |
(832) 0x46c078 TEST %R8,%R8 |
(832) 0x46c07b JE 46bf60 |
(832) 0x46c081 MOV -0x68(%RBP),%RDI |
(832) 0x46c085 LEA (,%R8,8),%RSI |
(832) 0x46c08d CALL 404070 <_ZdlPvm@plt> |
(832) 0x46c092 JMP 46bf60 |
(832) 0x46c097 MOV -0xc8(%RBP),%RDI |
(832) 0x46c09e LEA (,%RCX,8),%RSI |
(832) 0x46c0a6 INC %R12 |
(832) 0x46c0a9 CALL 404070 <_ZdlPvm@plt> |
(832) 0x46c0ae MOV -0x110(%RBP),%RDI |
(832) 0x46c0b5 CMP %RDI,%R12 |
(832) 0x46c0b8 JNE 46bfa1 |
0x46c0be MOV 0x468(%RBX),%RDI |
0x46c0c5 CALL 4a4310 <_ZN11qmcplusplus9TimerTypeINS_8CPUClockEE4stopEv> |
0x46c0ca JMP 46ba66 |
(832) 0x46c0cf LEA (%R9,%R9,2),%RSI |
(832) 0x46c0d3 MOV -0x98(%RBP),%RDI |
(832) 0x46c0da SAL $0x3,%RSI |
(832) 0x46c0de CALL 404070 <_ZdlPvm@plt> |
(832) 0x46c0e3 JMP 46bf77 |
0x46c0e8 SUB $0x8,%RSP |
0x46c0ec LEA 0x150(%RBX),%R8 |
0x46c0f3 MOV -0xe8(%RBP),%RSI |
0x46c0fa MOV -0xf0(%RBP),%EDX |
0x46c100 PUSH %R8 |
0x46c102 LEA 0x110(%RBX),%R9 |
0x46c109 LEA 0x90(%RBX),%R8 |
0x46c110 MOV %R14,%RDI |
0x46c113 CALL %R10 |
0x46c116 POP %RCX |
0x46c117 POP %RSI |
0x46c118 JMP 46c0be |
(828) 0x46c11a MOV -0x100(%RBP),%RDI |
(828) 0x46c121 VZEROUPPER |
(828) 0x46c124 CALL 422020 <_ZN11qmcplusplus6VectorIdSaIdEED1Ev> |
(828) 0x46c129 MOV -0x108(%RBP),%RDI |
(828) 0x46c130 CALL 40f950 <_ZN11qmcplusplus6VectorINS_10TinyVectorIdLj3EEESaIS2_EED1Ev> |
(828) 0x46c135 MOV -0xf8(%RBP),%RDI |
(828) 0x46c13c CALL 422020 <_ZN11qmcplusplus6VectorIdSaIdEED1Ev> |
(828) 0x46c141 MOV -0x38(%RBP),%RAX |
(828) 0x46c145 SUB %FS:0x28,%RAX |
(828) 0x46c14e JE 46c15a |
(828) 0x46c150 CALL 404140 <__stack_chk_fail@plt> |
(828) 0x46c155 MOV %RAX,%RBX |
(828) 0x46c158 JMP 46c11a |
0x46c15a MOV %RBX,%RDI |
0x46c15d CALL 404230 <_Unwind_Resume@plt> |
0x46c162 NOPW %CS:(%RAX,%RAX,1) |
0x46c16c NOPL (%RAX) |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►50.00+ | qmcplusplus::WaveFunction::eva[...] | WaveFunction.cpp:256 | exec |
○ | main._omp_fn.1 | refwrap.h:346 | exec |
○ | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
►50.00+ | qmcplusplus::WaveFunction::eva[...] | WaveFunction.cpp:255 | exec |
○ | main._omp_fn.1 | refwrap.h:346 | exec |
○ | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
Path / |
Source file and lines | DiracDeterminantRef.cpp:152-181 |
Module | exec |
nb instructions | 131 |
nb uops | 135 |
loop length | 630 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 10 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 13 |
ADD-SUB / MUL ratio | 1.00 |
micro-operation queue | 33.75 cycles |
front end | 33.75 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 14.25 | 14.25 | 23.67 | 23.67 | 24.00 | 14.25 | 14.25 | 23.67 |
cycles | 14.25 | 14.25 | 23.67 | 23.67 | 24.00 | 14.25 | 14.25 | 23.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 33.10 |
Stall cycles | 0.00 |
Front-end | 33.75 |
Dispatch | 24.00 |
Overall L1 | 33.75 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 23% |
load | 28% |
store | 33% |
mul | 33% |
add-sub | 33% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 12% |
load | 28% |
store | 7% |
mul | 33% |
add-sub | 33% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 10% |
all | 10% |
load | NA (no load vectorizable/vectorized instructions) |
store | 11% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 8% |
all | 15% |
load | 16% |
store | 16% |
mul | 16% |
add-sub | 16% |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 15% |
all | 13% |
load | 16% |
store | 12% |
mul | 16% |
add-sub | 16% |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
PUSH %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
PUSH %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
PUSH %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
PUSH %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
PUSH %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RDI,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
SUB $0xf8,%RSP | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %RSI,-0xe8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RDX,-0x118(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0xc(%RDI),%EDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RCX,-0x120(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %FS:0x28,%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x38(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
TEST %EDI,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 46bed5 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV 0x484(%RBX),%R14D | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOVSXD 0x478(%RBX),%R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP $0x1,%R14D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 46be47 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOVSXD %R14D,%R15 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
TEST %R14D,%R14D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 46bdf8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0x118(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x120(%RBP),%R14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%R13,%R13,2),%R12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VXORPD %XMM5,%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOVSXD 0x480(%RBX),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x158(%RBX),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x18(%RAX),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xd8(%RBX),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x100(%RBX),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x18(%R14),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
SAL $0x3,%R8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
MOV %R10,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
LEA (%RSI,%R12,8),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x3,%R10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
MOV 0x180(%RBX),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R8,-0xf0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA (,%RDX,8),%R12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R10,%RCX,1),%R9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
LEA (%RAX,%R13,8),%R13 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV -0x38(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
SUB %FS:0x28,%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JNE 46c150 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
POP %RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %RBP | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
RET | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 | 0 | 1 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV 0x100(%RBX),%R15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x140(%RBX),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%R13,%R13,2),%R12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x118(%RBP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x180(%RBX),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%R15),%XMM5 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x120(%RBP),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x18(%RDI),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMULSD 0x10(%R10),%XMM5,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVDDUP %XMM5,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
MOV 0x18(%RBX),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMULPD (%R10),%XMM2,%XMM6 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LEA (%RCX,%R12,8),%R9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R8,%R13,8),%R13 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VADDSD 0x10(%R9),%XMM0,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VUNPCKHPD %XMM6,%XMM6,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VADDPD (%R9),%XMM6,%XMM9 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM6,%XMM6,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMULSD %XMM8,%XMM8,%XMM10 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM1,0x10(%R9) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVUPD %XMM9,(%R9) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VFNMADD213SD (%R13),%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD132SD %XMM6,%XMM10,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VSUBSD %XMM3,%XMM0,%XMM11 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD132SD (%RSI),%XMM11,%XMM5 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,(%R13) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JMP 46bdf8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
MOV 0x468(%RBX),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CALL 4a40e0 <_ZN11qmcplusplus9TimerTypeINS_8CPUClockEE5startEv> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV 0x470(%RBX),%R14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x478(%RBX),%ESI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA -0x1ae65(%RIP),%RDX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x47c(%RBX),%ECX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%R14),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %ESI,-0xf0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x28(%RAX),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP %RDX,%R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JNE 46c0e8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP %ESI,%ECX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 46c0be | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
SUB %ESI,%ECX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
LEA -0x80(%RBP),%R11 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA -0xb0(%RBP),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
LEA -0xe0(%RBP),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x110(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA 0x726f2(%RIP),%R13 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,-0x100(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA 0x726a4(%RIP),%R15 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0x108(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RAX,-0xf8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JMP 46bfa1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV 0x468(%RBX),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CALL 4a4310 <_ZN11qmcplusplus9TimerTypeINS_8CPUClockEE4stopEv> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
JMP 46ba66 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
SUB $0x8,%RSP | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
LEA 0x150(%RBX),%R8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xe8(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0xf0(%RBP),%EDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
PUSH %R8 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA 0x110(%RBX),%R9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x90(%RBX),%R8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL %R10 | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 3 |
POP %RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
JMP 46c0be | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 404230 <_Unwind_Resume@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
Source file and lines | DiracDeterminantRef.cpp:152-181 |
Module | exec |
nb instructions | 131 |
nb uops | 135 |
loop length | 630 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 10 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 13 |
ADD-SUB / MUL ratio | 1.00 |
micro-operation queue | 33.75 cycles |
front end | 33.75 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 14.25 | 14.25 | 23.67 | 23.67 | 24.00 | 14.25 | 14.25 | 23.67 |
cycles | 14.25 | 14.25 | 23.67 | 23.67 | 24.00 | 14.25 | 14.25 | 23.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 33.10 |
Stall cycles | 0.00 |
Front-end | 33.75 |
Dispatch | 24.00 |
Overall L1 | 33.75 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 23% |
load | 28% |
store | 33% |
mul | 33% |
add-sub | 33% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 12% |
load | 28% |
store | 7% |
mul | 33% |
add-sub | 33% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 10% |
all | 10% |
load | NA (no load vectorizable/vectorized instructions) |
store | 11% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 8% |
all | 15% |
load | 16% |
store | 16% |
mul | 16% |
add-sub | 16% |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 15% |
all | 13% |
load | 16% |
store | 12% |
mul | 16% |
add-sub | 16% |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
PUSH %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
PUSH %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
PUSH %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
PUSH %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
PUSH %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RDI,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
SUB $0xf8,%RSP | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %RSI,-0xe8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RDX,-0x118(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0xc(%RDI),%EDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RCX,-0x120(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %FS:0x28,%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x38(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
TEST %EDI,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 46bed5 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV 0x484(%RBX),%R14D | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOVSXD 0x478(%RBX),%R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP $0x1,%R14D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 46be47 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOVSXD %R14D,%R15 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
TEST %R14D,%R14D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 46bdf8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0x118(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x120(%RBP),%R14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%R13,%R13,2),%R12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VXORPD %XMM5,%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOVSXD 0x480(%RBX),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x158(%RBX),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x18(%RAX),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xd8(%RBX),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x100(%RBX),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x18(%R14),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
SAL $0x3,%R8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
MOV %R10,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
LEA (%RSI,%R12,8),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x3,%R10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
MOV 0x180(%RBX),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R8,-0xf0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA (,%RDX,8),%R12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R10,%RCX,1),%R9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
LEA (%RAX,%R13,8),%R13 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV -0x38(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
SUB %FS:0x28,%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JNE 46c150 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
POP %RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %RBP | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
RET | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 | 0 | 1 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV 0x100(%RBX),%R15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x140(%RBX),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%R13,%R13,2),%R12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x118(%RBP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x180(%RBX),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%R15),%XMM5 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x120(%RBP),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x18(%RDI),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMULSD 0x10(%R10),%XMM5,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVDDUP %XMM5,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
MOV 0x18(%RBX),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMULPD (%R10),%XMM2,%XMM6 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LEA (%RCX,%R12,8),%R9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R8,%R13,8),%R13 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VADDSD 0x10(%R9),%XMM0,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VUNPCKHPD %XMM6,%XMM6,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VADDPD (%R9),%XMM6,%XMM9 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM6,%XMM6,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMULSD %XMM8,%XMM8,%XMM10 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM1,0x10(%R9) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVUPD %XMM9,(%R9) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VFNMADD213SD (%R13),%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD132SD %XMM6,%XMM10,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VSUBSD %XMM3,%XMM0,%XMM11 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD132SD (%RSI),%XMM11,%XMM5 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,(%R13) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JMP 46bdf8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
MOV 0x468(%RBX),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CALL 4a40e0 <_ZN11qmcplusplus9TimerTypeINS_8CPUClockEE5startEv> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV 0x470(%RBX),%R14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x478(%RBX),%ESI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA -0x1ae65(%RIP),%RDX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x47c(%RBX),%ECX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%R14),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %ESI,-0xf0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x28(%RAX),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP %RDX,%R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JNE 46c0e8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP %ESI,%ECX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 46c0be | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
SUB %ESI,%ECX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
LEA -0x80(%RBP),%R11 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA -0xb0(%RBP),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
LEA -0xe0(%RBP),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x110(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA 0x726f2(%RIP),%R13 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,-0x100(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA 0x726a4(%RIP),%R15 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0x108(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RAX,-0xf8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JMP 46bfa1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV 0x468(%RBX),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CALL 4a4310 <_ZN11qmcplusplus9TimerTypeINS_8CPUClockEE4stopEv> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
JMP 46ba66 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
SUB $0x8,%RSP | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
LEA 0x150(%RBX),%R8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xe8(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0xf0(%RBP),%EDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
PUSH %R8 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA 0x110(%RBX),%R9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x90(%RBX),%R8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL %R10 | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 3 |
POP %RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
JMP 46c0be | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 404230 <_Unwind_Resume@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼miniqmcreference::DiracDeterminantRef | 0.56 | 0.55 |
▼Loop 829 - DiracDeterminantRef.cpp:173-181 - exec– | 0 | 0 |
○Loop 831 - inner_product.hpp:154-154 - exec | 0.35 | 0.34 |
○Loop 830 - inner_product.hpp:81-82 - exec | 0.21 | 0.2 |
○Loop 828 - SPOSet.h:112-112 - exec | 0 | 0 |
○Loop 832 - SPOSet.h:106-111 - exec | 0 | 0 |