Loop Id: 306 | Module: exec | Source: TwoBodyJastrowRef.h:125-130 [...] | Coverage: 0.02% |
---|
Loop Id: 306 | Module: exec | Source: TwoBodyJastrowRef.h:125-130 [...] | Coverage: 0.02% |
---|
0x423670 MOVSXD (%R12,%R8,4),%RDI |
0x423674 MOV (%R14,%R8,8),%RDX |
0x423678 INC %R8 |
0x42367b MOV (%R12,%R8,4),%EBX |
0x42367f MOV %RDI,%R11 |
0x423682 CMP %EDI,%EBX |
0x423684 JLE 423b98 |
0x42368a LEA (%R15,%RDI,8),%RSI |
0x42368e MOV %EDI,%EAX |
0x423690 MOV %EBX,%EDI |
0x423692 VMOVSD 0x8(%RDX),%XMM3 |
0x423697 SUB %R11D,%EDI |
0x42369a XOR %ECX,%ECX |
0x42369c AND $0x7,%EDI |
0x42369f JE 4237af |
0x4236a5 CMP $0x1,%EDI |
0x4236a8 JE 423786 |
0x4236ae CMP $0x2,%EDI |
0x4236b1 JE 423765 |
0x4236b7 CMP $0x3,%EDI |
0x4236ba JE 423745 |
0x4236c0 CMP $0x4,%EDI |
0x4236c3 JE 423725 |
0x4236c5 CMP $0x5,%EDI |
0x4236c8 JE 423705 |
0x4236ca CMP $0x6,%EDI |
0x4236cd JE 4236e5 |
0x4236cf VMOVSD (%RSI),%XMM1 |
0x4236d3 VCOMISD %XMM1,%XMM3 |
0x4236d7 JA 423bd7 |
0x4236dd ADD $0x8,%RSI |
0x4236e1 LEA 0x1(%R11),%EAX |
0x4236e5 VMOVSD (%RSI),%XMM4 |
0x4236e9 VCOMISD %XMM4,%XMM3 |
0x4236ed JBE 4236ff |
0x4236ef CMP %EAX,%R10D |
0x4236f2 JE 4236ff |
0x4236f4 MOVSXD %ECX,%R11 |
0x4236f7 INC %ECX |
0x4236f9 VMOVSD %XMM4,(%R9,%R11,8) |
0x4236ff ADD $0x8,%RSI |
0x423703 INC %EAX |
0x423705 VMOVSD (%RSI),%XMM5 |
0x423709 VCOMISD %XMM5,%XMM3 |
0x42370d JBE 42371f |
0x42370f CMP %EAX,%R10D |
0x423712 JE 42371f |
0x423714 MOVSXD %ECX,%RDI |
0x423717 INC %ECX |
0x423719 VMOVSD %XMM5,(%R9,%RDI,8) |
0x42371f ADD $0x8,%RSI |
0x423723 INC %EAX |
0x423725 VMOVSD (%RSI),%XMM6 |
0x423729 VCOMISD %XMM6,%XMM3 |
0x42372d JBE 42373f |
0x42372f CMP %EAX,%R10D |
0x423732 JE 42373f |
0x423734 MOVSXD %ECX,%R11 |
0x423737 INC %ECX |
0x423739 VMOVSD %XMM6,(%R9,%R11,8) |
0x42373f ADD $0x8,%RSI |
0x423743 INC %EAX |
0x423745 VMOVSD (%RSI),%XMM7 |
0x423749 VCOMISD %XMM7,%XMM3 |
0x42374d JBE 42375f |
0x42374f CMP %EAX,%R10D |
0x423752 JE 42375f |
0x423754 MOVSXD %ECX,%RDI |
0x423757 INC %ECX |
0x423759 VMOVSD %XMM7,(%R9,%RDI,8) |
0x42375f ADD $0x8,%RSI |
0x423763 INC %EAX |
0x423765 VMOVSD (%RSI),%XMM8 |
0x423769 VCOMISD %XMM8,%XMM3 |
0x42376e JBE 423780 |
0x423770 CMP %EAX,%R10D |
0x423773 JE 423780 |
0x423775 MOVSXD %ECX,%R11 |
0x423778 INC %ECX |
0x42377a VMOVSD %XMM8,(%R9,%R11,8) |
0x423780 ADD $0x8,%RSI |
0x423784 INC %EAX |
0x423786 VMOVSD (%RSI),%XMM9 |
0x42378a VCOMISD %XMM9,%XMM3 |
0x42378f JBE 4237a1 |
0x423791 CMP %EAX,%R10D |
0x423794 JE 4237a1 |
0x423796 MOVSXD %ECX,%RDI |
0x423799 INC %ECX |
0x42379b VMOVSD %XMM9,(%R9,%RDI,8) |
0x4237a1 INC %EAX |
0x4237a3 ADD $0x8,%RSI |
0x4237a7 CMP %EAX,%EBX |
0x4237a9 JE 4238b9 |
(307) 0x4237af VMOVSD (%RSI),%XMM10 |
(307) 0x4237b3 VCOMISD %XMM10,%XMM3 |
(307) 0x4237b8 JBE 4237ca |
(307) 0x4237ba CMP %EAX,%R10D |
(307) 0x4237bd JE 4237ca |
(307) 0x4237bf MOVSXD %ECX,%R11 |
(307) 0x4237c2 INC %ECX |
(307) 0x4237c4 VMOVSD %XMM10,(%R9,%R11,8) |
(307) 0x4237ca VMOVSD 0x8(%RSI),%XMM11 |
(307) 0x4237cf INC %EAX |
(307) 0x4237d1 LEA 0x8(%RSI),%RDI |
(307) 0x4237d5 VCOMISD %XMM11,%XMM3 |
(307) 0x4237da JBE 4237ec |
(307) 0x4237dc CMP %EAX,%R10D |
(307) 0x4237df JE 4237ec |
(307) 0x4237e1 MOVSXD %ECX,%RSI |
(307) 0x4237e4 INC %ECX |
(307) 0x4237e6 VMOVSD %XMM11,(%R9,%RSI,8) |
(307) 0x4237ec VMOVSD 0x8(%RDI),%XMM12 |
(307) 0x4237f1 LEA 0x1(%RAX),%R11D |
(307) 0x4237f5 VCOMISD %XMM12,%XMM3 |
(307) 0x4237fa JBE 42380c |
(307) 0x4237fc CMP %R11D,%R10D |
(307) 0x4237ff JE 42380c |
(307) 0x423801 MOVSXD %ECX,%RSI |
(307) 0x423804 INC %ECX |
(307) 0x423806 VMOVSD %XMM12,(%R9,%RSI,8) |
(307) 0x42380c VMOVSD 0x10(%RDI),%XMM13 |
(307) 0x423811 LEA 0x2(%RAX),%R11D |
(307) 0x423815 VCOMISD %XMM13,%XMM3 |
(307) 0x42381a JBE 42382c |
(307) 0x42381c CMP %R11D,%R10D |
(307) 0x42381f JE 42382c |
(307) 0x423821 MOVSXD %ECX,%RSI |
(307) 0x423824 INC %ECX |
(307) 0x423826 VMOVSD %XMM13,(%R9,%RSI,8) |
(307) 0x42382c VMOVSD 0x18(%RDI),%XMM14 |
(307) 0x423831 LEA 0x3(%RAX),%R11D |
(307) 0x423835 VCOMISD %XMM14,%XMM3 |
(307) 0x42383a JBE 42384c |
(307) 0x42383c CMP %R11D,%R10D |
(307) 0x42383f JE 42384c |
(307) 0x423841 MOVSXD %ECX,%RSI |
(307) 0x423844 INC %ECX |
(307) 0x423846 VMOVSD %XMM14,(%R9,%RSI,8) |
(307) 0x42384c VMOVSD 0x20(%RDI),%XMM15 |
(307) 0x423851 LEA 0x4(%RAX),%R11D |
(307) 0x423855 VCOMISD %XMM15,%XMM3 |
(307) 0x42385a JBE 42386c |
(307) 0x42385c CMP %R11D,%R10D |
(307) 0x42385f JE 42386c |
(307) 0x423861 MOVSXD %ECX,%RSI |
(307) 0x423864 INC %ECX |
(307) 0x423866 VMOVSD %XMM15,(%R9,%RSI,8) |
(307) 0x42386c VMOVSD 0x28(%RDI),%XMM2 |
(307) 0x423871 LEA 0x5(%RAX),%R11D |
(307) 0x423875 VCOMISD %XMM2,%XMM3 |
(307) 0x423879 JBE 42388b |
(307) 0x42387b CMP %R11D,%R10D |
(307) 0x42387e JE 42388b |
(307) 0x423880 MOVSXD %ECX,%RSI |
(307) 0x423883 INC %ECX |
(307) 0x423885 VMOVSD %XMM2,(%R9,%RSI,8) |
(307) 0x42388b VMOVSD 0x30(%RDI),%XMM0 |
(307) 0x423890 LEA 0x6(%RAX),%R11D |
(307) 0x423894 VCOMISD %XMM0,%XMM3 |
(307) 0x423898 JBE 4238aa |
(307) 0x42389a CMP %R11D,%R10D |
(307) 0x42389d JE 4238aa |
(307) 0x42389f MOVSXD %ECX,%RSI |
(307) 0x4238a2 INC %ECX |
(307) 0x4238a4 VMOVSD %XMM0,(%R9,%RSI,8) |
(307) 0x4238aa ADD $0x7,%EAX |
(307) 0x4238ad LEA 0x38(%RDI),%RSI |
(307) 0x4238b1 CMP %EAX,%EBX |
(307) 0x4238b3 JNE 4237af |
0x4238b9 TEST %ECX,%ECX |
0x4238bb JLE 423b98 |
0x4238c1 MOVSXD %ECX,%RCX |
0x4238c4 VMOVSD 0x238(%RDX),%XMM19 |
0x4238cb MOV 0x218(%RDX),%RBX |
0x4238d2 MOV %R9,%R11 |
0x4238d5 LEA (%R9,%RCX,8),%RAX |
0x4238d9 AND $0x1,%ECX |
0x4238dc VMOVSD 0x18(%RDX),%XMM17 |
0x4238e3 VMOVSD 0x20(%RDX),%XMM18 |
0x4238ea VMOVSD 0x28(%RDX),%XMM16 |
0x4238f1 VMOVSD 0x30(%RDX),%XMM15 |
0x4238f6 VXORPD %XMM0,%XMM0,%XMM0 |
0x4238fa VMOVSD 0x38(%RDX),%XMM13 |
0x4238ff VMOVSD 0x40(%RDX),%XMM14 |
0x423904 VMOVSD 0x48(%RDX),%XMM12 |
0x423909 VMOVSD 0x50(%RDX),%XMM11 |
0x42390e VMOVSD 0x58(%RDX),%XMM9 |
0x423913 VMOVSD 0x60(%RDX),%XMM10 |
0x423918 VMOVSD 0x68(%RDX),%XMM8 |
0x42391d VMOVSD 0x70(%RDX),%XMM7 |
0x423922 VMOVSD 0x78(%RDX),%XMM5 |
0x423927 VMOVSD 0x80(%RDX),%XMM6 |
0x42392f VMOVSD 0x88(%RDX),%XMM4 |
0x423937 VMOVSD 0x90(%RDX),%XMM3 |
0x42393f JE 423a08 |
0x423945 VMULSD (%R9),%XMM19,%XMM2 |
0x42394b LEA 0x8(%R9),%R11 |
0x42394f VRNDSCALESD $0xb,%XMM2,%XMM2,%XMM1 |
0x423956 VCVTTSD2SI %XMM2,%EDX |
0x42395a VSUBSD %XMM1,%XMM2,%XMM1 |
0x42395e VMULSD %XMM1,%XMM1,%XMM21 |
0x423964 VMOVSD %XMM1,%XMM1,%XMM22 |
0x42396a VMOVSD %XMM1,%XMM1,%XMM2 |
0x42396e VFMADD132SD %XMM16,%XMM15,%XMM22 |
0x423974 VFMADD132SD %XMM12,%XMM11,%XMM2 |
0x423979 VMOVSD %XMM1,%XMM1,%XMM24 |
0x42397f MOVSXD %EDX,%RDI |
0x423982 VFMADD132SD %XMM8,%XMM7,%XMM24 |
0x423988 VMULSD %XMM21,%XMM1,%XMM20 |
0x42398e VFMADD132SD %XMM4,%XMM3,%XMM1 |
0x423993 VMULSD %XMM18,%XMM21,%XMM0 |
0x423999 VMULSD %XMM6,%XMM21,%XMM26 |
0x42399f VFMADD231SD %XMM17,%XMM20,%XMM0 |
0x4239a5 VADDSD %XMM0,%XMM22,%XMM25 |
0x4239ab VMULSD %XMM14,%XMM21,%XMM0 |
0x4239b1 VFMADD231SD %XMM13,%XMM20,%XMM0 |
0x4239b7 VADDSD %XMM2,%XMM0,%XMM0 |
0x4239bb VMULSD %XMM10,%XMM21,%XMM2 |
0x4239c1 VFMADD231SD %XMM9,%XMM20,%XMM2 |
0x4239c7 VFMADD132SD %XMM5,%XMM26,%XMM20 |
0x4239cd VADDSD %XMM24,%XMM2,%XMM2 |
0x4239d3 VADDSD %XMM1,%XMM20,%XMM27 |
0x4239d9 VMULSD 0x10(%RBX,%RDI,8),%XMM2,%XMM2 |
0x4239df VMULSD 0x18(%RBX,%RDI,8),%XMM27,%XMM28 |
0x4239e7 VFMADD132SD 0x8(%RBX,%RDI,8),%XMM2,%XMM0 |
0x4239ee VFMADD132SD (%RBX,%RDI,8),%XMM28,%XMM25 |
0x4239f5 VADDSD %XMM25,%XMM0,%XMM0 |
0x4239fb CMP %RAX,%R11 |
0x4239fe JE 423b92 |
0x423a04 NOPL (%RAX) |
(308) 0x423a08 VMULSD (%R11),%XMM19,%XMM29 |
(308) 0x423a0e ADD $0x10,%R11 |
(308) 0x423a12 VRNDSCALESD $0xb,%XMM29,%XMM29,%XMM1 |
(308) 0x423a19 VCVTTSD2SI %XMM29,%ESI |
(308) 0x423a1f VSUBSD %XMM1,%XMM29,%XMM1 |
(308) 0x423a25 VMULSD %XMM1,%XMM1,%XMM30 |
(308) 0x423a2b VMOVSD %XMM1,%XMM1,%XMM25 |
(308) 0x423a31 VMOVSD %XMM1,%XMM1,%XMM21 |
(308) 0x423a37 VFMADD132SD %XMM8,%XMM7,%XMM25 |
(308) 0x423a3d VFMADD132SD %XMM16,%XMM15,%XMM21 |
(308) 0x423a43 VMOVSD %XMM1,%XMM1,%XMM22 |
(308) 0x423a49 MOVSXD %ESI,%RCX |
(308) 0x423a4c VFMADD132SD %XMM12,%XMM11,%XMM22 |
(308) 0x423a52 VMULSD %XMM30,%XMM1,%XMM2 |
(308) 0x423a58 VFMADD132SD %XMM4,%XMM3,%XMM1 |
(308) 0x423a5d VMULSD %XMM18,%XMM30,%XMM31 |
(308) 0x423a63 VMULSD %XMM14,%XMM30,%XMM20 |
(308) 0x423a69 VMULSD %XMM10,%XMM30,%XMM27 |
(308) 0x423a6f VMULSD %XMM6,%XMM30,%XMM30 |
(308) 0x423a75 VFMADD231SD %XMM17,%XMM2,%XMM31 |
(308) 0x423a7b VFMADD231SD %XMM13,%XMM2,%XMM20 |
(308) 0x423a81 VFMADD231SD %XMM9,%XMM2,%XMM27 |
(308) 0x423a87 VFMADD132SD %XMM5,%XMM30,%XMM2 |
(308) 0x423a8d VADDSD %XMM31,%XMM21,%XMM24 |
(308) 0x423a93 VADDSD %XMM22,%XMM20,%XMM26 |
(308) 0x423a99 VADDSD %XMM25,%XMM27,%XMM28 |
(308) 0x423a9f VADDSD %XMM1,%XMM2,%XMM1 |
(308) 0x423aa3 VMULSD 0x10(%RBX,%RCX,8),%XMM28,%XMM29 |
(308) 0x423aab VMULSD 0x18(%RBX,%RCX,8),%XMM1,%XMM2 |
(308) 0x423ab1 VFMADD132SD 0x8(%RBX,%RCX,8),%XMM29,%XMM26 |
(308) 0x423ab9 VFMADD231SD (%RBX,%RCX,8),%XMM24,%XMM2 |
(308) 0x423ac0 VADDSD %XMM2,%XMM26,%XMM1 |
(308) 0x423ac6 VADDSD %XMM1,%XMM0,%XMM2 |
(308) 0x423aca VMULSD -0x8(%R11),%XMM19,%XMM0 |
(308) 0x423ad1 VRNDSCALESD $0xb,%XMM0,%XMM0,%XMM31 |
(308) 0x423ad8 VCVTTSD2SI %XMM0,%EDX |
(308) 0x423adc VSUBSD %XMM31,%XMM0,%XMM21 |
(308) 0x423ae2 VMULSD %XMM21,%XMM21,%XMM22 |
(308) 0x423ae8 VMOVSD %XMM21,%XMM21,%XMM24 |
(308) 0x423aee VMOVSD %XMM21,%XMM21,%XMM25 |
(308) 0x423af4 VFMADD132SD %XMM16,%XMM15,%XMM24 |
(308) 0x423afa VFMADD132SD %XMM8,%XMM7,%XMM25 |
(308) 0x423b00 VMOVSD %XMM21,%XMM21,%XMM20 |
(308) 0x423b06 MOVSXD %EDX,%RDI |
(308) 0x423b09 VFMADD132SD %XMM12,%XMM11,%XMM20 |
(308) 0x423b0f VMULSD %XMM22,%XMM21,%XMM1 |
(308) 0x423b15 VFMADD132SD %XMM4,%XMM3,%XMM21 |
(308) 0x423b1b VMULSD %XMM18,%XMM22,%XMM0 |
(308) 0x423b21 VMULSD %XMM10,%XMM22,%XMM27 |
(308) 0x423b27 VMULSD %XMM6,%XMM22,%XMM30 |
(308) 0x423b2d VFMADD231SD %XMM17,%XMM1,%XMM0 |
(308) 0x423b33 VFMADD231SD %XMM9,%XMM1,%XMM27 |
(308) 0x423b39 VADDSD %XMM0,%XMM24,%XMM26 |
(308) 0x423b3f VMULSD %XMM14,%XMM22,%XMM0 |
(308) 0x423b45 VADDSD %XMM25,%XMM27,%XMM28 |
(308) 0x423b4b VMULSD 0x10(%RBX,%RDI,8),%XMM28,%XMM29 |
(308) 0x423b53 VFMADD231SD %XMM13,%XMM1,%XMM0 |
(308) 0x423b58 VFMADD132SD %XMM5,%XMM30,%XMM1 |
(308) 0x423b5e VADDSD %XMM21,%XMM1,%XMM1 |
(308) 0x423b64 VADDSD %XMM20,%XMM0,%XMM0 |
(308) 0x423b6a VMULSD 0x18(%RBX,%RDI,8),%XMM1,%XMM1 |
(308) 0x423b70 VFMADD132SD 0x8(%RBX,%RDI,8),%XMM29,%XMM0 |
(308) 0x423b78 VFMADD132SD (%RBX,%RDI,8),%XMM1,%XMM26 |
(308) 0x423b7f VADDSD %XMM26,%XMM0,%XMM0 |
(308) 0x423b85 VADDSD %XMM0,%XMM2,%XMM0 |
(308) 0x423b89 CMP %RAX,%R11 |
(308) 0x423b8c JNE 423a08 |
0x423b92 VADDSD %XMM0,%XMM23,%XMM23 |
0x423b98 CMP %R8,%R13 |
0x423b9b JNE 423670 |
0x423bd7 CMP %R11D,%R10D |
0x423bda JE 4236dd |
0x423be0 VMOVSD %XMM1,(%R9) |
0x423be5 MOV $0x1,%ECX |
0x423bea JMP 4236dd |
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/TwoBodyJastrowRef.h: 125 - 130 |
-------------------------------------------------------------------------------- |
125: for (int jg = 0; jg < NumGroups; ++jg) |
126: { |
127: const FuncType& f2(*F[igt + jg]); |
128: int iStart = P.first(jg); |
129: int iEnd = P.last(jg); |
130: curUat += f2.evaluateV(iat, iStart, iEnd, dist, DistCompressed.data()); |
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h: 302 - 305 |
-------------------------------------------------------------------------------- |
302: inline int first(int igroup) const { return SubPtcl[igroup]; } |
303: |
304: /// return the last index of a group i |
305: inline int last(int igroup) const { return SubPtcl[igroup + 1]; } |
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h: 232 - 260 |
-------------------------------------------------------------------------------- |
232: int iCount = 0; |
233: const int iLimit = iEnd - iStart; |
234: |
235: #pragma vector always |
236: for (int jat = 0; jat < iLimit; jat++) |
237: { |
238: real_type r = distArray[jat]; |
239: // pick the distances smaller than the cutoff and avoid the reference atom |
240: if (r < cutoff_radius && iStart + jat != iat) |
241: distArrayCompressed[iCount++] = distArray[jat]; |
242: } |
243: |
244: real_type d = 0.0; |
245: //#pragma omp simd reduction(+:d) |
246: for (int jat = 0; jat < iCount; jat++) |
247: { |
248: real_type r = distArrayCompressed[jat]; |
249: r *= DeltaRInv; |
250: int i = (int)r; |
251: real_type t = r - real_type(i); |
252: real_type tp0 = t * t * t; |
253: real_type tp1 = t * t; |
254: real_type tp2 = t; |
255: |
256: real_type d1 = SplineCoefs[i + 0] * (A[0] * tp0 + A[1] * tp1 + A[2] * tp2 + A[3]); |
257: real_type d2 = SplineCoefs[i + 1] * (A[4] * tp0 + A[5] * tp1 + A[6] * tp2 + A[7]); |
258: real_type d3 = SplineCoefs[i + 2] * (A[8] * tp0 + A[9] * tp1 + A[10] * tp2 + A[11]); |
259: real_type d4 = SplineCoefs[i + 3] * (A[12] * tp0 + A[13] * tp1 + A[14] * tp2 + A[15]); |
260: d += (d1 + d2 + d3 + d4); |
/home/kcamus/qaas_runs/169-451-1869/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 227 - 227 |
-------------------------------------------------------------------------------- |
227: inline const Type_t& operator[](size_t i) const |
/usr/include/c++/13.1.1/bits/stl_vector.h: 1142 - 1145 |
-------------------------------------------------------------------------------- |
1142: operator[](size_type __n) const _GLIBCXX_NOEXCEPT |
1143: { |
1144: __glibcxx_requires_subscript(__n); |
1145: return *(this->_M_impl._M_start + __n); |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►75.00+ | qmcplusplus::WaveFunction::rat[...] | WaveFunction.cpp:219 | exec |
○ | main._omp_fn.1 | stl_vector.h:1126 | exec |
○ | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
►25.00+ | qmcplusplus::WaveFunction::rat[...] | WaveFunction.cpp:219 | exec |
○ | main._omp_fn.1 | miniqmc.cpp:486 | exec |
○ | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.48 |
CQA speedup if FP arith vectorized | 2.22 |
CQA speedup if fully vectorized | 11.24 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.39 |
Bottlenecks | micro-operation queue, |
Function | miniqmcreference::TwoBodyJastrowRef |
Source | TwoBodyJastrowRef.h:125-130,ParticleSet.h:302-305,BsplineFunctor.h:232-260,OhmmsVector.h:227-227,stl_vector.h:1142-1145 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 42.25 |
CQA cycles if no scalar integer | 28.50 |
CQA cycles if FP arith vectorized | 19.00 |
CQA cycles if fully vectorized | 3.76 |
Front-end cycles | 42.25 |
DIV/SQRT cycles | 30.50 |
P0 cycles | 30.50 |
P1 cycles | 17.00 |
P2 cycles | 17.00 |
P3 cycles | 7.00 |
P4 cycles | 30.50 |
P5 cycles | 30.50 |
P6 cycles | 7.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 46.81 |
Stall cycles (UFS) | 4.01 |
Nb insns | 163.00 |
Nb uops | 165.00 |
Nb loads | 34.00 |
Nb stores | 7.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.85 |
Nb FLOP add-sub | 7.00 |
Nb FLOP mul | 9.00 |
Nb FLOP fma | 10.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 7.57 |
Bytes prefetched | 0.00 |
Bytes loaded | 264.00 |
Bytes stored | 56.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 1.14 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 3.33 |
Vector-efficiency ratio all | 11.58 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | 12.50 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 9.79 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.48 |
CQA speedup if FP arith vectorized | 2.22 |
CQA speedup if fully vectorized | 11.24 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.39 |
Bottlenecks | micro-operation queue, |
Function | miniqmcreference::TwoBodyJastrowRef |
Source | TwoBodyJastrowRef.h:125-130,ParticleSet.h:302-305,BsplineFunctor.h:232-260,OhmmsVector.h:227-227,stl_vector.h:1142-1145 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 42.25 |
CQA cycles if no scalar integer | 28.50 |
CQA cycles if FP arith vectorized | 19.00 |
CQA cycles if fully vectorized | 3.76 |
Front-end cycles | 42.25 |
DIV/SQRT cycles | 30.50 |
P0 cycles | 30.50 |
P1 cycles | 17.00 |
P2 cycles | 17.00 |
P3 cycles | 7.00 |
P4 cycles | 30.50 |
P5 cycles | 30.50 |
P6 cycles | 7.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 46.81 |
Stall cycles (UFS) | 4.01 |
Nb insns | 163.00 |
Nb uops | 165.00 |
Nb loads | 34.00 |
Nb stores | 7.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.85 |
Nb FLOP add-sub | 7.00 |
Nb FLOP mul | 9.00 |
Nb FLOP fma | 10.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 7.57 |
Bytes prefetched | 0.00 |
Bytes loaded | 264.00 |
Bytes stored | 56.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 1.14 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 3.33 |
Vector-efficiency ratio all | 11.58 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | 12.50 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 9.79 |
Path / |
Function | miniqmcreference::TwoBodyJastrowRef |
Source file and lines | TwoBodyJastrowRef.h:125-130 |
Module | exec |
nb instructions | 163 |
nb uops | 165 |
loop length | 693 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 29 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
ADD-SUB / MUL ratio | 0.78 |
micro-operation queue | 42.25 cycles |
front end | 42.25 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 30.50 | 30.50 | 17.00 | 17.00 | 7.00 | 30.50 | 30.50 | 7.00 |
cycles | 30.50 | 30.50 | 17.00 | 17.00 | 7.00 | 30.50 | 30.50 | 7.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 46.81 |
Stall cycles | 4.01 |
ROB full (events) | 4.27 |
Front-end | 42.25 |
Dispatch | 30.50 |
Overall L1 | 42.25 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 1% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 7% |
all | 1% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 3% |
all | 6% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 6% |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 13% |
all | 11% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 9% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
MOVSXD (%R12,%R8,4),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%R14,%R8,8),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
INC %R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV (%R12,%R8,4),%EBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RDI,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CMP %EDI,%EBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 423b98 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
LEA (%R15,%RDI,8),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %EBX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVSD 0x8(%RDX),%XMM3 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
SUB %R11D,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
AND $0x7,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 4237af | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x1,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 423786 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x2,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 423765 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x3,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 423745 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x4,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 423725 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x5,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 423705 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x6,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 4236e5 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VMOVSD (%RSI),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VCOMISD %XMM1,%XMM3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JA 423bd7 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
ADD $0x8,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
LEA 0x1(%R11),%EAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD (%RSI),%XMM4 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VCOMISD %XMM4,%XMM3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JBE 4236ff | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP %EAX,%R10D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 4236ff | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOVSXD %ECX,%R11 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
INC %ECX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD %XMM4,(%R9,%R11,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
ADD $0x8,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
INC %EAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD (%RSI),%XMM5 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VCOMISD %XMM5,%XMM3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JBE 42371f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP %EAX,%R10D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 42371f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOVSXD %ECX,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
INC %ECX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD %XMM5,(%R9,%RDI,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
ADD $0x8,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
INC %EAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD (%RSI),%XMM6 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VCOMISD %XMM6,%XMM3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JBE 42373f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP %EAX,%R10D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 42373f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOVSXD %ECX,%R11 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
INC %ECX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD %XMM6,(%R9,%R11,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
ADD $0x8,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
INC %EAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD (%RSI),%XMM7 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VCOMISD %XMM7,%XMM3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JBE 42375f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP %EAX,%R10D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 42375f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOVSXD %ECX,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
INC %ECX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD %XMM7,(%R9,%RDI,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
ADD $0x8,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
INC %EAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD (%RSI),%XMM8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VCOMISD %XMM8,%XMM3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JBE 423780 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP %EAX,%R10D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 423780 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOVSXD %ECX,%R11 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
INC %ECX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD %XMM8,(%R9,%R11,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
ADD $0x8,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
INC %EAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD (%RSI),%XMM9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VCOMISD %XMM9,%XMM3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JBE 4237a1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP %EAX,%R10D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 4237a1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOVSXD %ECX,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
INC %ECX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD %XMM9,(%R9,%RDI,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
INC %EAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD $0x8,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %EAX,%EBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 4238b9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
TEST %ECX,%ECX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 423b98 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOVSXD %ECX,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD 0x238(%RDX),%XMM19 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x218(%RDX),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R9,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
LEA (%R9,%RCX,8),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
AND $0x1,%ECX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD 0x18(%RDX),%XMM17 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x20(%RDX),%XMM18 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x28(%RDX),%XMM16 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x30(%RDX),%XMM15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVSD 0x38(%RDX),%XMM13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x40(%RDX),%XMM14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x48(%RDX),%XMM12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x50(%RDX),%XMM11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x58(%RDX),%XMM9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x60(%RDX),%XMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x68(%RDX),%XMM8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x70(%RDX),%XMM7 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x78(%RDX),%XMM5 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x80(%RDX),%XMM6 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x88(%RDX),%XMM4 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x90(%RDX),%XMM3 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
JE 423a08 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VMULSD (%R9),%XMM19,%XMM2 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LEA 0x8(%R9),%R11 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VRNDSCALESD $0xb,%XMM2,%XMM2,%XMM1 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VCVTTSD2SI %XMM2,%EDX | 2 | 1.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 6 | 1 |
VSUBSD %XMM1,%XMM2,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM1,%XMM1,%XMM21 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM1,%XMM1,%XMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMOVSD %XMM1,%XMM1,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VFMADD132SD %XMM16,%XMM15,%XMM22 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD132SD %XMM12,%XMM11,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM1,%XMM1,%XMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
MOVSXD %EDX,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VFMADD132SD %XMM8,%XMM7,%XMM24 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM21,%XMM1,%XMM20 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD132SD %XMM4,%XMM3,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM18,%XMM21,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM6,%XMM21,%XMM26 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD %XMM17,%XMM20,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDSD %XMM0,%XMM22,%XMM25 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM14,%XMM21,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD %XMM13,%XMM20,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDSD %XMM2,%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM10,%XMM21,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD %XMM9,%XMM20,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD132SD %XMM5,%XMM26,%XMM20 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDSD %XMM24,%XMM2,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDSD %XMM1,%XMM20,%XMM27 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD 0x10(%RBX,%RDI,8),%XMM2,%XMM2 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD 0x18(%RBX,%RDI,8),%XMM27,%XMM28 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD132SD 0x8(%RBX,%RDI,8),%XMM2,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD132SD (%RBX,%RDI,8),%XMM28,%XMM25 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDSD %XMM25,%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %RAX,%R11 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 423b92 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VADDSD %XMM0,%XMM23,%XMM23 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %R8,%R13 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JNE 423670 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP %R11D,%R10D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 4236dd | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VMOVSD %XMM1,(%R9) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV $0x1,%ECX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JMP 4236dd | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
Function | miniqmcreference::TwoBodyJastrowRef |
Source file and lines | TwoBodyJastrowRef.h:125-130 |
Module | exec |
nb instructions | 163 |
nb uops | 165 |
loop length | 693 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 29 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
ADD-SUB / MUL ratio | 0.78 |
micro-operation queue | 42.25 cycles |
front end | 42.25 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 30.50 | 30.50 | 17.00 | 17.00 | 7.00 | 30.50 | 30.50 | 7.00 |
cycles | 30.50 | 30.50 | 17.00 | 17.00 | 7.00 | 30.50 | 30.50 | 7.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 46.81 |
Stall cycles | 4.01 |
ROB full (events) | 4.27 |
Front-end | 42.25 |
Dispatch | 30.50 |
Overall L1 | 42.25 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 1% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 7% |
all | 1% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 3% |
all | 6% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 6% |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 13% |
all | 11% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 9% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
MOVSXD (%R12,%R8,4),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%R14,%R8,8),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
INC %R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV (%R12,%R8,4),%EBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RDI,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CMP %EDI,%EBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 423b98 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
LEA (%R15,%RDI,8),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %EBX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVSD 0x8(%RDX),%XMM3 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
SUB %R11D,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
AND $0x7,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 4237af | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x1,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 423786 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x2,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 423765 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x3,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 423745 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x4,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 423725 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x5,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 423705 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x6,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 4236e5 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VMOVSD (%RSI),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VCOMISD %XMM1,%XMM3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JA 423bd7 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
ADD $0x8,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
LEA 0x1(%R11),%EAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD (%RSI),%XMM4 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VCOMISD %XMM4,%XMM3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JBE 4236ff | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP %EAX,%R10D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 4236ff | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOVSXD %ECX,%R11 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
INC %ECX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD %XMM4,(%R9,%R11,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
ADD $0x8,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
INC %EAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD (%RSI),%XMM5 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VCOMISD %XMM5,%XMM3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JBE 42371f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP %EAX,%R10D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 42371f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOVSXD %ECX,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
INC %ECX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD %XMM5,(%R9,%RDI,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
ADD $0x8,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
INC %EAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD (%RSI),%XMM6 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VCOMISD %XMM6,%XMM3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JBE 42373f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP %EAX,%R10D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 42373f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOVSXD %ECX,%R11 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
INC %ECX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD %XMM6,(%R9,%R11,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
ADD $0x8,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
INC %EAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD (%RSI),%XMM7 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VCOMISD %XMM7,%XMM3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JBE 42375f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP %EAX,%R10D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 42375f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOVSXD %ECX,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
INC %ECX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD %XMM7,(%R9,%RDI,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
ADD $0x8,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
INC %EAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD (%RSI),%XMM8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VCOMISD %XMM8,%XMM3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JBE 423780 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP %EAX,%R10D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 423780 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOVSXD %ECX,%R11 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
INC %ECX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD %XMM8,(%R9,%R11,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
ADD $0x8,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
INC %EAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD (%RSI),%XMM9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VCOMISD %XMM9,%XMM3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JBE 4237a1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP %EAX,%R10D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 4237a1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOVSXD %ECX,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
INC %ECX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD %XMM9,(%R9,%RDI,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
INC %EAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD $0x8,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %EAX,%EBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 4238b9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
TEST %ECX,%ECX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 423b98 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOVSXD %ECX,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD 0x238(%RDX),%XMM19 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x218(%RDX),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R9,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
LEA (%R9,%RCX,8),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
AND $0x1,%ECX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD 0x18(%RDX),%XMM17 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x20(%RDX),%XMM18 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x28(%RDX),%XMM16 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x30(%RDX),%XMM15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVSD 0x38(%RDX),%XMM13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x40(%RDX),%XMM14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x48(%RDX),%XMM12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x50(%RDX),%XMM11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x58(%RDX),%XMM9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x60(%RDX),%XMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x68(%RDX),%XMM8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x70(%RDX),%XMM7 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x78(%RDX),%XMM5 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x80(%RDX),%XMM6 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x88(%RDX),%XMM4 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x90(%RDX),%XMM3 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
JE 423a08 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VMULSD (%R9),%XMM19,%XMM2 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LEA 0x8(%R9),%R11 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VRNDSCALESD $0xb,%XMM2,%XMM2,%XMM1 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VCVTTSD2SI %XMM2,%EDX | 2 | 1.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 6 | 1 |
VSUBSD %XMM1,%XMM2,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM1,%XMM1,%XMM21 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM1,%XMM1,%XMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMOVSD %XMM1,%XMM1,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VFMADD132SD %XMM16,%XMM15,%XMM22 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD132SD %XMM12,%XMM11,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM1,%XMM1,%XMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
MOVSXD %EDX,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VFMADD132SD %XMM8,%XMM7,%XMM24 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM21,%XMM1,%XMM20 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD132SD %XMM4,%XMM3,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM18,%XMM21,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM6,%XMM21,%XMM26 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD %XMM17,%XMM20,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDSD %XMM0,%XMM22,%XMM25 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM14,%XMM21,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD %XMM13,%XMM20,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDSD %XMM2,%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM10,%XMM21,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231SD %XMM9,%XMM20,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD132SD %XMM5,%XMM26,%XMM20 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDSD %XMM24,%XMM2,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDSD %XMM1,%XMM20,%XMM27 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD 0x10(%RBX,%RDI,8),%XMM2,%XMM2 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD 0x18(%RBX,%RDI,8),%XMM27,%XMM28 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD132SD 0x8(%RBX,%RDI,8),%XMM2,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD132SD (%RBX,%RDI,8),%XMM28,%XMM25 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDSD %XMM25,%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %RAX,%R11 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 423b92 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VADDSD %XMM0,%XMM23,%XMM23 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %R8,%R13 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JNE 423670 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP %R11D,%R10D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 4236dd | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VMOVSD %XMM1,(%R9) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV $0x1,%ECX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JMP 4236dd | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |