Loop Id: 641 | Module: libkripke.so | Source: forall.hpp:59-59 [...] | Coverage: 0.18% |
---|
Loop Id: 641 | Module: libkripke.so | Source: forall.hpp:59-59 [...] | Coverage: 0.18% |
---|
0x679a8 CMPQ $0,-0x40(%RBP) |
0x679ad JLE 67bec |
0x679b3 MOV -0x58(%RBP),%RBX |
0x679b7 MOV -0xa0(%RBP),%RDI |
0x679be MOV -0xb8(%RBP),%R10 |
0x679c5 MOV -0x60(%RBP),%R9 |
0x679c9 LEA (,%RBX,8),%RCX |
0x679d1 MOV -0xb0(%RBP),%RDX |
0x679d8 LEA (%RCX,%RDI,1),%R8 |
0x679dc MOV -0xa8(%RBP),%RDI |
0x679e3 LEA (%R10,%R9,8),%RAX |
0x679e7 MOV -0x78(%RBP),%R9 |
0x679eb XOR %R10D,%R10D |
0x679ee ADD %RCX,%RDI |
0x679f1 ADD %RDX,%RCX |
0x679f4 MOV -0x70(%RBP),%RDX |
0x679f8 TESTB $0x1,-0x40(%RBP) |
0x679fc JE 67aad |
0x67a02 MOV -0x68(%RBP),%RBX |
0x67a06 VMOVSD (%R12),%XMM6 |
0x67a0c MOV -0x48(%RBP),%R10 |
0x67a10 VMOVSD (%R13),%XMM2 |
0x67a16 VMOVSD (%RBX),%XMM13 |
0x67a1a MOV -0x70(%RBP),%RDX |
0x67a1e VADDSD %XMM6,%XMM6,%XMM1 |
0x67a22 VDIVSD (%R10),%XMM1,%XMM0 |
0x67a27 VMULSD (%RAX),%XMM0,%XMM3 |
0x67a2b VMOVSD (%RSI),%XMM7 |
0x67a2f VADDSD %XMM2,%XMM2,%XMM11 |
0x67a33 VADDSD %XMM13,%XMM13,%XMM14 |
0x67a38 VDIVSD (%R9),%XMM11,%XMM12 |
0x67a3d VADDSD (%RDI),%XMM12,%XMM8 |
0x67a41 VFMADD213SD (%R8),%XMM12,%XMM7 |
0x67a46 VDIVSD (%R11),%XMM14,%XMM15 |
0x67a4b VADDSD %XMM0,%XMM15,%XMM4 |
0x67a4f ADD %R15,%R9 |
0x67a52 ADD %R14,%R8 |
0x67a55 VFMADD132SD (%RDX),%XMM3,%XMM15 |
0x67a5a MOV -0x40(%RBP),%RBX |
0x67a5e MOV $0x1,%R10D |
0x67a64 ADD %R14,%RDI |
0x67a67 VADDSD %XMM4,%XMM8,%XMM9 |
0x67a6b VADDSD %XMM7,%XMM15,%XMM5 |
0x67a6f VDIVSD %XMM9,%XMM5,%XMM2 |
0x67a74 VMOVSD %XMM2,(%RCX) |
0x67a78 VMOVSD %XMM2,%XMM2,%XMM11 |
0x67a7c VMOVSD %XMM2,%XMM2,%XMM12 |
0x67a80 ADD %R14,%RCX |
0x67a83 VFMSUB213SD (%RSI),%XMM10,%XMM11 |
0x67a88 VMOVSD %XMM11,(%RSI) |
0x67a8c VFMSUB213SD (%RDX),%XMM10,%XMM12 |
0x67a91 VMOVSD %XMM12,(%RDX) |
0x67a95 VFMSUB213SD (%RAX),%XMM10,%XMM2 |
0x67a9a ADD %R15,%RDX |
0x67a9d VMOVSD %XMM2,(%RAX) |
0x67aa1 ADD %R15,%RAX |
0x67aa4 CMP %RBX,%R10 |
0x67aa7 JE 67bec |
0x67aad MOV %R10,-0x38(%RBP) |
0x67ab1 MOV -0x68(%RBP),%RBX |
(642) 0x67ab5 VMOVSD (%R12),%XMM4 |
(642) 0x67abb MOV -0x48(%RBP),%R10 |
(642) 0x67abf VMOVSD (%R13),%XMM13 |
(642) 0x67ac5 VMOVSD (%RBX),%XMM6 |
(642) 0x67ac9 VADDSD %XMM4,%XMM4,%XMM7 |
(642) 0x67acd VDIVSD (%R10),%XMM7,%XMM3 |
(642) 0x67ad2 VMULSD (%RAX),%XMM3,%XMM9 |
(642) 0x67ad6 VMOVSD (%RSI),%XMM5 |
(642) 0x67ada VADDSD %XMM13,%XMM13,%XMM14 |
(642) 0x67adf VADDSD %XMM6,%XMM6,%XMM1 |
(642) 0x67ae3 VDIVSD (%R9),%XMM14,%XMM15 |
(642) 0x67ae8 ADD %R15,%R9 |
(642) 0x67aeb VFMADD213SD (%R8),%XMM15,%XMM5 |
(642) 0x67af0 VDIVSD (%R11),%XMM1,%XMM0 |
(642) 0x67af5 VADDSD %XMM3,%XMM0,%XMM8 |
(642) 0x67af9 VADDSD (%RDI),%XMM15,%XMM2 |
(642) 0x67afd VFMADD132SD (%RDX),%XMM9,%XMM0 |
(642) 0x67b02 ADD %R14,%R8 |
(642) 0x67b05 ADD %R14,%RDI |
(642) 0x67b08 VADDSD %XMM8,%XMM2,%XMM12 |
(642) 0x67b0d VADDSD %XMM5,%XMM0,%XMM11 |
(642) 0x67b11 VDIVSD %XMM12,%XMM11,%XMM13 |
(642) 0x67b16 VMOVSD %XMM13,(%RCX) |
(642) 0x67b1a VMOVSD %XMM13,%XMM13,%XMM14 |
(642) 0x67b1f VMOVSD %XMM13,%XMM13,%XMM15 |
(642) 0x67b24 ADD %R14,%RCX |
(642) 0x67b27 VFMSUB213SD (%RSI),%XMM10,%XMM14 |
(642) 0x67b2c VMOVSD %XMM14,(%RSI) |
(642) 0x67b30 VFMSUB213SD (%RDX),%XMM10,%XMM15 |
(642) 0x67b35 VMOVSD %XMM15,(%RDX) |
(642) 0x67b39 VFMSUB213SD (%RAX),%XMM10,%XMM13 |
(642) 0x67b3e ADD %R15,%RDX |
(642) 0x67b41 VMOVSD %XMM13,(%RAX) |
(642) 0x67b45 ADD %R15,%RAX |
(642) 0x67b48 VMOVSD (%RBX),%XMM0 |
(642) 0x67b4c VMOVSD (%RSI),%XMM2 |
(642) 0x67b50 VMOVSD (%R12),%XMM3 |
(642) 0x67b56 VMOVSD (%R13),%XMM6 |
(642) 0x67b5c VADDSD %XMM0,%XMM0,%XMM4 |
(642) 0x67b60 VDIVSD (%R11),%XMM4,%XMM8 |
(642) 0x67b65 VADDSD %XMM3,%XMM3,%XMM5 |
(642) 0x67b69 VDIVSD (%R10),%XMM5,%XMM9 |
(642) 0x67b6e VMULSD (%RAX),%XMM9,%XMM12 |
(642) 0x67b72 VADDSD %XMM6,%XMM6,%XMM1 |
(642) 0x67b76 VADDSD %XMM9,%XMM8,%XMM11 |
(642) 0x67b7b VDIVSD (%R9),%XMM1,%XMM7 |
(642) 0x67b80 VADDSD (%RDI),%XMM7,%XMM14 |
(642) 0x67b84 ADD %R15,%R9 |
(642) 0x67b87 VFMADD213SD (%R8),%XMM7,%XMM2 |
(642) 0x67b8c VFMADD132SD (%RDX),%XMM12,%XMM8 |
(642) 0x67b91 ADD %R14,%R8 |
(642) 0x67b94 ADD %R14,%RDI |
(642) 0x67b97 VADDSD %XMM11,%XMM14,%XMM15 |
(642) 0x67b9c VADDSD %XMM2,%XMM8,%XMM13 |
(642) 0x67ba0 VDIVSD %XMM15,%XMM13,%XMM6 |
(642) 0x67ba5 VMOVSD %XMM6,(%RCX) |
(642) 0x67ba9 VMOVSD %XMM6,%XMM6,%XMM1 |
(642) 0x67bad VMOVSD %XMM6,%XMM6,%XMM7 |
(642) 0x67bb1 ADD %R14,%RCX |
(642) 0x67bb4 VFMSUB213SD (%RSI),%XMM10,%XMM1 |
(642) 0x67bb9 VMOVSD %XMM1,(%RSI) |
(642) 0x67bbd VFMSUB213SD (%RDX),%XMM10,%XMM7 |
(642) 0x67bc2 MOV -0x40(%RBP),%R10 |
(642) 0x67bc6 ADDQ $0x2,-0x38(%RBP) |
(642) 0x67bcb VMOVSD %XMM7,(%RDX) |
(642) 0x67bcf VFMSUB213SD (%RAX),%XMM10,%XMM6 |
(642) 0x67bd4 ADD %R15,%RDX |
(642) 0x67bd7 VMOVSD %XMM6,(%RAX) |
(642) 0x67bdb ADD %R15,%RAX |
(642) 0x67bde CMP %R10,-0x38(%RBP) |
(642) 0x67be2 JNE 67ab5 |
0x67be8 MOV %RBX,-0x68(%RBP) |
0x67bec MOV -0x88(%RBP),%RCX |
0x67bf3 INCQ -0x50(%RBP) |
0x67bf7 MOV -0x80(%RBP),%R9 |
0x67bfb MOV -0x50(%RBP),%R8 |
0x67bff MOV -0x90(%RBP),%RAX |
0x67c06 MOV -0x98(%RBP),%RDI |
0x67c0d ADD %RCX,%R11 |
0x67c10 ADD %RCX,%RSI |
0x67c13 ADD %RAX,-0x58(%RBP) |
0x67c17 ADD %RDI,-0x60(%RBP) |
0x67c1b CMP %R9,%R8 |
0x67c1e JNE 679a8 |
/home/kcamus/qaas_runs/169-391-8990/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/loop/forall.hpp: 59 - 59 |
-------------------------------------------------------------------------------- |
59: for (decltype(distance_it) i = 0; i < distance_it; ++i) { |
/home/kcamus/qaas_runs/169-391-8990/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Operators.hpp: 304 - 304 |
-------------------------------------------------------------------------------- |
304: RAJA_HOST_DEVICE constexpr Ret operator()(const Arg1& lhs, |
/home/kcamus/qaas_runs/169-391-8990/intel/Kripke/build/Kripke/src/Kripke/Kernel/SweepSubdomain.cpp: 87 - 105 |
-------------------------------------------------------------------------------- |
87: double xcos_dxi = 2.0 * xcos(d) / dx(i); |
88: double ycos_dyj = 2.0 * ycos(d) / dy(j); |
89: double zcos_dzk = 2.0 * zcos(d) / dz(k); |
90: |
91: Zone z(zone_layout(*i, *j, *k)); |
92: |
93: /* Calculate new zonal flux */ |
94: double psi_d_g_z = (rhs(d,g,z) |
95: + psi_lf(d, g, j, k) * xcos_dxi |
96: + psi_fr(d, g, i, k) * ycos_dyj |
97: + psi_bo(d, g, i, j) * zcos_dzk) |
98: / (xcos_dxi + ycos_dyj + zcos_dzk + sigt(g, z)); |
99: |
100: psi(d, g, z) = psi_d_g_z; |
101: |
102: /* Apply diamond-difference relationships */ |
103: psi_lf(d, g, j, k) = 2.0 * psi_d_g_z - psi_lf(d, g, j, k); |
104: psi_fr(d, g, i, k) = 2.0 * psi_d_g_z - psi_fr(d, g, i, k); |
105: psi_bo(d, g, i, j) = 2.0 * psi_d_g_z - psi_bo(d, g, i, j); |
/home/kcamus/qaas_runs/169-391-8990/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/View.hpp: 107 - 107 |
-------------------------------------------------------------------------------- |
107: RAJA_HOST_DEVICE RAJA_INLINE value_type &operator()(Args... args) const |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
○100.00 | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.11 |
CQA speedup if FP arith vectorized | 1.46 |
CQA speedup if fully vectorized | 2.98 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.03 |
Bottlenecks | |
Function | void RAJA::internal::StatementExecutor |
Source | forall.hpp:59-59,Operators.hpp:304-304,SweepSubdomain.cpp:87-105,View.hpp:107-107 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 12.81 |
CQA cycles if no scalar integer | 11.50 |
CQA cycles if FP arith vectorized | 8.80 |
CQA cycles if fully vectorized | 4.30 |
Front-end cycles | 12.63 |
DIV/SQRT cycles | 6.81 |
P0 cycles | 6.81 |
P1 cycles | 12.63 |
P2 cycles | 12.63 |
P3 cycles | 6.00 |
P4 cycles | 6.81 |
P5 cycles | 6.81 |
P6 cycles | 6.00 |
P7 cycles | 8.00 |
Inter-iter dependencies cycles | 0 |
FE+BE cycles (UFS) | 17.32 - 17.56 |
Stall cycles (UFS) | 4.67 - 4.90 |
Nb insns | 47.50 |
Nb uops | 50.50 |
Nb loads | 25.25 |
Nb stores | 6.00 |
Nb stack references | 14.25 |
FLOP/cycle | 0.86 |
Nb FLOP add-sub | 3.50 |
Nb FLOP mul | 0.50 |
Nb FLOP fma | 2.50 |
Nb FLOP div | 2.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 19.57 |
Bytes prefetched | 0.00 |
Bytes loaded | 196.75 |
Bytes stored | 48.00 |
Stride 0 | 2.50 |
Stride 1 | 0.00 |
Stride n | 0.00 |
Stride unknown | 6.75 |
Stride indirect | 0.75 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.11 |
Vector-efficiency ratio load | 11.87 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | 12.50 |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 10.04 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.06 |
Bottlenecks | P2, P3, |
Function | void RAJA::internal::StatementExecutor |
Source | forall.hpp:59-59,Operators.hpp:304-304,SweepSubdomain.cpp:87-105,View.hpp:107-107 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 4.50 |
CQA cycles if no scalar integer | 4.50 |
CQA cycles if FP arith vectorized | 4.50 |
CQA cycles if fully vectorized | 0.56 |
Front-end cycles | 4.25 |
DIV/SQRT cycles | 2.00 |
P0 cycles | 2.00 |
P1 cycles | 4.50 |
P2 cycles | 4.50 |
P3 cycles | 3.00 |
P4 cycles | 2.00 |
P5 cycles | 2.00 |
P6 cycles | 3.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | 0 |
FE+BE cycles (UFS) | 4.66 |
Stall cycles (UFS) | 0.44 |
Nb insns | 14.00 |
Nb uops | 17.00 |
Nb loads | 9.00 |
Nb stores | 3.00 |
Nb stack references | 8.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 21.33 |
Bytes prefetched | 0.00 |
Bytes loaded | 72.00 |
Bytes stored | 24.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 15.20 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.06 |
Bottlenecks | P2, P3, |
Function | void RAJA::internal::StatementExecutor |
Source | forall.hpp:59-59,Operators.hpp:304-304,SweepSubdomain.cpp:87-105,View.hpp:107-107 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 9.50 |
CQA cycles if no scalar integer | 9.50 |
CQA cycles if FP arith vectorized | 9.50 |
CQA cycles if fully vectorized | 0.63 |
Front-end cycles | 9.00 |
DIV/SQRT cycles | 3.75 |
P0 cycles | 3.75 |
P1 cycles | 9.50 |
P2 cycles | 9.50 |
P3 cycles | 5.00 |
P4 cycles | 3.75 |
P5 cycles | 3.75 |
P6 cycles | 5.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | 0 |
FE+BE cycles (UFS) | 9.66 |
Stall cycles (UFS) | 0.69 |
Nb insns | 33.00 |
Nb uops | 36.00 |
Nb loads | 19.00 |
Nb stores | 5.00 |
Nb stack references | 16.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 19.47 |
Bytes prefetched | 0.00 |
Bytes loaded | 145.00 |
Bytes stored | 40.00 |
Stride 0 | 3.00 |
Stride 1 | 0.00 |
Stride n | 0.00 |
Stride unknown | 9.00 |
Stride indirect | 1.00 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 11.59 |
Vector-efficiency ratio load | 11.13 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 7.03 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.19 |
CQA speedup if FP arith vectorized | 1.79 |
CQA speedup if fully vectorized | 2.38 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.03 |
Bottlenecks | micro-operation queue, |
Function | void RAJA::internal::StatementExecutor |
Source | forall.hpp:59-59,Operators.hpp:304-304,SweepSubdomain.cpp:87-105,View.hpp:107-107 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 19.00 |
CQA cycles if no scalar integer | 16.00 |
CQA cycles if FP arith vectorized | 10.63 |
CQA cycles if fully vectorized | 8.00 |
Front-end cycles | 19.00 |
DIV/SQRT cycles | 10.75 |
P0 cycles | 10.75 |
P1 cycles | 18.50 |
P2 cycles | 18.50 |
P3 cycles | 9.00 |
P4 cycles | 10.75 |
P5 cycles | 10.75 |
P6 cycles | 9.00 |
P7 cycles | 16.00 |
Inter-iter dependencies cycles | 0 |
FE+BE cycles (UFS) | 28.17 - 28.51 |
Stall cycles (UFS) | 9.08 - 9.42 |
Nb insns | 73.00 |
Nb uops | 76.00 |
Nb loads | 37.00 |
Nb stores | 9.00 |
Nb stack references | 17.00 |
FLOP/cycle | 1.16 |
Nb FLOP add-sub | 7.00 |
Nb FLOP mul | 1.00 |
Nb FLOP fma | 5.00 |
Nb FLOP div | 4.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 19.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 289.00 |
Bytes stored | 72.00 |
Stride 0 | 3.00 |
Stride 1 | 0.00 |
Stride n | 0.00 |
Stride unknown | 9.00 |
Stride indirect | 1.00 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.19 |
Vector-efficiency ratio load | 11.92 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | 12.50 |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 10.31 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.14 |
CQA speedup if FP arith vectorized | 1.73 |
CQA speedup if fully vectorized | 2.28 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.01 |
Bottlenecks | micro-operation queue, |
Function | void RAJA::internal::StatementExecutor |
Source | forall.hpp:59-59,Operators.hpp:304-304,SweepSubdomain.cpp:87-105,View.hpp:107-107 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 18.25 |
CQA cycles if no scalar integer | 16.00 |
CQA cycles if FP arith vectorized | 10.56 |
CQA cycles if fully vectorized | 8.00 |
Front-end cycles | 18.25 |
DIV/SQRT cycles | 10.75 |
P0 cycles | 10.75 |
P1 cycles | 18.00 |
P2 cycles | 18.00 |
P3 cycles | 7.00 |
P4 cycles | 10.75 |
P5 cycles | 10.75 |
P6 cycles | 7.00 |
P7 cycles | 16.00 |
Inter-iter dependencies cycles | 0 |
FE+BE cycles (UFS) | 26.81 - 27.41 |
Stall cycles (UFS) | 8.45 - 9.05 |
Nb insns | 70.00 |
Nb uops | 73.00 |
Nb loads | 36.00 |
Nb stores | 7.00 |
Nb stack references | 16.00 |
FLOP/cycle | 1.21 |
Nb FLOP add-sub | 7.00 |
Nb FLOP mul | 1.00 |
Nb FLOP fma | 5.00 |
Nb FLOP div | 4.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 18.47 |
Bytes prefetched | 0.00 |
Bytes loaded | 281.00 |
Bytes stored | 56.00 |
Stride 0 | 3.00 |
Stride 1 | 0.00 |
Stride n | 0.00 |
Stride unknown | 9.00 |
Stride indirect | 1.00 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.17 |
Vector-efficiency ratio load | 11.92 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | 12.50 |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 10.31 |
Path / |
nb instructions | 47.50 |
nb uops | 50.50 |
loop length | 217.75 |
used x86 registers | 12.25 |
used mmx registers | 0 |
used xmm registers | 8 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 14.25 |
micro-operation queue | 12.63 cycles |
front end | 12.63 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 6.81 | 6.81 | 12.63 | 12.63 | 6.00 | 6.81 | 6.81 | 6.00 |
cycles | 6.81 | 6.81 | 12.63 | 12.63 | 6.00 | 6.81 | 6.81 | 6.00 |
Cycles executing div or sqrt instructions | 8.00 |
Longest recurrence chain latency (RecMII) | 0.00 |
FE+BE cycles | 17.32-17.56 |
Stall cycles | 4.67-4.90 |
LB full (events) | 5.07-5.25 |
LM full (events) | 0.79 |
Front-end | 12.63 |
Dispatch | 12.63 |
DIV/SQRT | 8.00 |
Data deps. | 0.00 |
Overall L1 | 12.81 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | 0% |
other | 0% |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | 0% |
other | 0% |
all | 11% |
load | 11% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 9% |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | 12% |
div/sqrt | 12% |
other | 12% |
all | 12% |
load | 11% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | 12% |
div/sqrt | 12% |
other | 10% |
nb instructions | 14 |
nb uops | 17 |
loop length | 67 |
used x86 registers | 8 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 8 |
micro-operation queue | 4.25 cycles |
front end | 4.25 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 2.00 | 2.00 | 4.50 | 4.50 | 3.00 | 2.00 | 2.00 | 3.00 |
cycles | 2.00 | 2.00 | 4.50 | 4.50 | 3.00 | 2.00 | 2.00 | 3.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 0.00 |
FE+BE cycles | 4.66 |
Stall cycles | 0.44 |
LM full (events) | 1.33 |
Front-end | 4.25 |
Dispatch | 4.50 |
Data deps. | 0.00 |
Overall L1 | 4.50 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
CMPQ $0,-0x40(%RBP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JLE 67bec <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_3ForILl2ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS8_ILl4ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSH_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke9DirectionElPST_EEST_EENSP_INSR_INSS_5GroupElPSX_EESX_EENSP_INSQ_24strided_numeric_iteratorINSS_5ZoneKElPS12_EES12_EENSP_INS11_INSS_5ZoneJElPS16_EES16_EENSP_INS11_INSS_5ZoneIElPS1A_EES1A_EEEEENSN_IJEEEJZNK9SweepSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_RNSS_4Core9DataStoreENSS_6SdomIdEEUlST_SX_S12_S16_S1A_E_EEEEEvOS1M_._omp_fn.0.lto_priv.0+0xefc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0x88(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
INCQ -0x50(%RBP) | 3 | 0.25 | 0.25 | 0.83 | 0.83 | 1 | 0.25 | 0.25 | 0.33 | 5 | 1 |
MOV -0x80(%RBP),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x50(%RBP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x98(%RBP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %RCX,%R11 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %RCX,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %RAX,-0x58(%RBP) | 2 | 0.25 | 0.25 | 0.83 | 0.83 | 1 | 0.25 | 0.25 | 0.33 | 5 | 1 |
ADD %RDI,-0x60(%RBP) | 2 | 0.25 | 0.25 | 0.83 | 0.83 | 1 | 0.25 | 0.25 | 0.33 | 5 | 1 |
CMP %R9,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JNE 679a8 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_3ForILl2ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS8_ILl4ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSH_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke9DirectionElPST_EEST_EENSP_INSR_INSS_5GroupElPSX_EESX_EENSP_INSQ_24strided_numeric_iteratorINSS_5ZoneKElPS12_EES12_EENSP_INS11_INSS_5ZoneJElPS16_EES16_EENSP_INS11_INSS_5ZoneIElPS1A_EES1A_EEEEENSN_IJEEEJZNK9SweepSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_RNSS_4Core9DataStoreENSS_6SdomIdEEUlST_SX_S12_S16_S1A_E_EEEEEvOS1M_._omp_fn.0.lto_priv.0+0xcb8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
nb instructions | 33 |
nb uops | 36 |
loop length | 158 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 16 |
micro-operation queue | 9.00 cycles |
front end | 9.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 3.75 | 3.75 | 9.50 | 9.50 | 5.00 | 3.75 | 3.75 | 5.00 |
cycles | 3.75 | 3.75 | 9.50 | 9.50 | 5.00 | 3.75 | 3.75 | 5.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 0.00 |
FE+BE cycles | 9.66 |
Stall cycles | 0.69 |
LM full (events) | 1.83 |
Front-end | 9.00 |
Dispatch | 9.50 |
Data deps. | 0.00 |
Overall L1 | 9.50 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 11% |
load | 11% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 7% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
CMPQ $0,-0x40(%RBP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JLE 67bec <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_3ForILl2ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS8_ILl4ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSH_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke9DirectionElPST_EEST_EENSP_INSR_INSS_5GroupElPSX_EESX_EENSP_INSQ_24strided_numeric_iteratorINSS_5ZoneKElPS12_EES12_EENSP_INS11_INSS_5ZoneJElPS16_EES16_EENSP_INS11_INSS_5ZoneIElPS1A_EES1A_EEEEENSN_IJEEEJZNK9SweepSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_RNSS_4Core9DataStoreENSS_6SdomIdEEUlST_SX_S12_S16_S1A_E_EEEEEvOS1M_._omp_fn.0.lto_priv.0+0xefc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0x58(%RBP),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0xa0(%RBP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0xb8(%RBP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x60(%RBP),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (,%RBX,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xb0(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RCX,%RDI,1),%R8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xa8(%RBP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%R10,%R9,8),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x78(%RBP),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
ADD %RCX,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %RDX,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
TESTB $0x1,-0x40(%RBP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JE 67aad <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_3ForILl2ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS8_ILl4ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSH_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke9DirectionElPST_EEST_EENSP_INSR_INSS_5GroupElPSX_EESX_EENSP_INSQ_24strided_numeric_iteratorINSS_5ZoneKElPS12_EES12_EENSP_INS11_INSS_5ZoneJElPS16_EES16_EENSP_INS11_INSS_5ZoneIElPS1A_EES1A_EEEEENSN_IJEEEJZNK9SweepSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_RNSS_4Core9DataStoreENSS_6SdomIdEEUlST_SX_S12_S16_S1A_E_EEEEEvOS1M_._omp_fn.0.lto_priv.0+0xdbd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %R10,-0x38(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x68(%RBP),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RBX,-0x68(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x88(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
INCQ -0x50(%RBP) | 3 | 0.25 | 0.25 | 0.83 | 0.83 | 1 | 0.25 | 0.25 | 0.33 | 5 | 1 |
MOV -0x80(%RBP),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x50(%RBP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x98(%RBP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %RCX,%R11 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %RCX,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %RAX,-0x58(%RBP) | 2 | 0.25 | 0.25 | 0.83 | 0.83 | 1 | 0.25 | 0.25 | 0.33 | 5 | 1 |
ADD %RDI,-0x60(%RBP) | 2 | 0.25 | 0.25 | 0.83 | 0.83 | 1 | 0.25 | 0.25 | 0.33 | 5 | 1 |
CMP %R9,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JNE 679a8 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_3ForILl2ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS8_ILl4ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSH_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke9DirectionElPST_EEST_EENSP_INSR_INSS_5GroupElPSX_EESX_EENSP_INSQ_24strided_numeric_iteratorINSS_5ZoneKElPS12_EES12_EENSP_INS11_INSS_5ZoneJElPS16_EES16_EENSP_INS11_INSS_5ZoneIElPS1A_EES1A_EEEEENSN_IJEEEJZNK9SweepSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_RNSS_4Core9DataStoreENSS_6SdomIdEEUlST_SX_S12_S16_S1A_E_EEEEEvOS1M_._omp_fn.0.lto_priv.0+0xcb8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
nb instructions | 73 |
nb uops | 76 |
loop length | 329 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 16 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 17 |
ADD-SUB / MUL ratio | 7.00 |
micro-operation queue | 19.00 cycles |
front end | 19.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 10.75 | 10.75 | 18.50 | 18.50 | 9.00 | 10.75 | 10.75 | 9.00 |
cycles | 10.75 | 10.75 | 18.50 | 18.50 | 9.00 | 10.75 | 10.75 | 9.00 |
Cycles executing div or sqrt instructions | 16.00 |
Longest recurrence chain latency (RecMII) | 0.00 |
FE+BE cycles | 28.17-28.51 |
Stall cycles | 9.08-9.42 |
LB full (events) | 9.83-10.17 |
Front-end | 19.00 |
Dispatch | 18.50 |
DIV/SQRT | 16.00 |
Data deps. | 0.00 |
Overall L1 | 19.00 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | 0% |
other | 0% |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | 0% |
other | 0% |
all | 11% |
load | 10% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 8% |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | 12% |
div/sqrt | 12% |
other | 12% |
all | 12% |
load | 11% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | 12% |
div/sqrt | 12% |
other | 10% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
CMPQ $0,-0x40(%RBP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JLE 67bec <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_3ForILl2ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS8_ILl4ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSH_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke9DirectionElPST_EEST_EENSP_INSR_INSS_5GroupElPSX_EESX_EENSP_INSQ_24strided_numeric_iteratorINSS_5ZoneKElPS12_EES12_EENSP_INS11_INSS_5ZoneJElPS16_EES16_EENSP_INS11_INSS_5ZoneIElPS1A_EES1A_EEEEENSN_IJEEEJZNK9SweepSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_RNSS_4Core9DataStoreENSS_6SdomIdEEUlST_SX_S12_S16_S1A_E_EEEEEvOS1M_._omp_fn.0.lto_priv.0+0xefc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0x58(%RBP),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0xa0(%RBP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0xb8(%RBP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x60(%RBP),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (,%RBX,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xb0(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RCX,%RDI,1),%R8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xa8(%RBP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%R10,%R9,8),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x78(%RBP),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
ADD %RCX,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %RDX,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
TESTB $0x1,-0x40(%RBP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JE 67aad <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_3ForILl2ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS8_ILl4ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSH_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke9DirectionElPST_EEST_EENSP_INSR_INSS_5GroupElPSX_EESX_EENSP_INSQ_24strided_numeric_iteratorINSS_5ZoneKElPS12_EES12_EENSP_INS11_INSS_5ZoneJElPS16_EES16_EENSP_INS11_INSS_5ZoneIElPS1A_EES1A_EEEEENSN_IJEEEJZNK9SweepSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_RNSS_4Core9DataStoreENSS_6SdomIdEEUlST_SX_S12_S16_S1A_E_EEEEEvOS1M_._omp_fn.0.lto_priv.0+0xdbd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0x68(%RBP),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%R12),%XMM6 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x48(%RBP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%R13),%XMM2 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%RBX),%XMM13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VADDSD %XMM6,%XMM6,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVSD (%R10),%XMM1,%XMM0 | 1 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13-14 | 4 |
VMULSD (%RAX),%XMM0,%XMM3 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD (%RSI),%XMM7 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VADDSD %XMM2,%XMM2,%XMM11 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDSD %XMM13,%XMM13,%XMM14 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVSD (%R9),%XMM11,%XMM12 | 1 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13-14 | 4 |
VADDSD (%RDI),%XMM12,%XMM8 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD213SD (%R8),%XMM12,%XMM7 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVSD (%R11),%XMM14,%XMM15 | 1 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13-14 | 4 |
VADDSD %XMM0,%XMM15,%XMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD %R15,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %R14,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VFMADD132SD (%RDX),%XMM3,%XMM15 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0x40(%RBP),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV $0x1,%R10D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %R14,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VADDSD %XMM4,%XMM8,%XMM9 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDSD %XMM7,%XMM15,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVSD %XMM9,%XMM5,%XMM2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-14 | 4 |
VMOVSD %XMM2,(%RCX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD %XMM2,%XMM2,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMOVSD %XMM2,%XMM2,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
ADD %R14,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VFMSUB213SD (%RSI),%XMM10,%XMM11 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM11,(%RSI) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VFMSUB213SD (%RDX),%XMM10,%XMM12 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM12,(%RDX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VFMSUB213SD (%RAX),%XMM10,%XMM2 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD %R15,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD %XMM2,(%RAX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
ADD %R15,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %RBX,%R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 67bec <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_3ForILl2ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS8_ILl4ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSH_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke9DirectionElPST_EEST_EENSP_INSR_INSS_5GroupElPSX_EESX_EENSP_INSQ_24strided_numeric_iteratorINSS_5ZoneKElPS12_EES12_EENSP_INS11_INSS_5ZoneJElPS16_EES16_EENSP_INS11_INSS_5ZoneIElPS1A_EES1A_EEEEENSN_IJEEEJZNK9SweepSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_RNSS_4Core9DataStoreENSS_6SdomIdEEUlST_SX_S12_S16_S1A_E_EEEEEvOS1M_._omp_fn.0.lto_priv.0+0xefc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %R10,-0x38(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x68(%RBP),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RBX,-0x68(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x88(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
INCQ -0x50(%RBP) | 3 | 0.25 | 0.25 | 0.83 | 0.83 | 1 | 0.25 | 0.25 | 0.33 | 5 | 1 |
MOV -0x80(%RBP),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x50(%RBP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x98(%RBP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %RCX,%R11 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %RCX,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %RAX,-0x58(%RBP) | 2 | 0.25 | 0.25 | 0.83 | 0.83 | 1 | 0.25 | 0.25 | 0.33 | 5 | 1 |
ADD %RDI,-0x60(%RBP) | 2 | 0.25 | 0.25 | 0.83 | 0.83 | 1 | 0.25 | 0.25 | 0.33 | 5 | 1 |
CMP %R9,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JNE 679a8 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_3ForILl2ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS8_ILl4ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSH_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke9DirectionElPST_EEST_EENSP_INSR_INSS_5GroupElPSX_EESX_EENSP_INSQ_24strided_numeric_iteratorINSS_5ZoneKElPS12_EES12_EENSP_INS11_INSS_5ZoneJElPS16_EES16_EENSP_INS11_INSS_5ZoneIElPS1A_EES1A_EEEEENSN_IJEEEJZNK9SweepSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_RNSS_4Core9DataStoreENSS_6SdomIdEEUlST_SX_S12_S16_S1A_E_EEEEEvOS1M_._omp_fn.0.lto_priv.0+0xcb8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
nb instructions | 70 |
nb uops | 73 |
loop length | 317 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 16 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 16 |
ADD-SUB / MUL ratio | 7.00 |
micro-operation queue | 18.25 cycles |
front end | 18.25 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 10.75 | 10.75 | 18.00 | 18.00 | 7.00 | 10.75 | 10.75 | 7.00 |
cycles | 10.75 | 10.75 | 18.00 | 18.00 | 7.00 | 10.75 | 10.75 | 7.00 |
Cycles executing div or sqrt instructions | 16.00 |
Longest recurrence chain latency (RecMII) | 0.00 |
FE+BE cycles | 26.81-27.41 |
Stall cycles | 8.45-9.05 |
LB full (events) | 10.44-10.82 |
Front-end | 18.25 |
Dispatch | 18.00 |
DIV/SQRT | 16.00 |
Data deps. | 0.00 |
Overall L1 | 18.25 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | 0% |
other | 0% |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | 0% |
other | 0% |
all | 10% |
load | 10% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 8% |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | 12% |
div/sqrt | 12% |
other | 12% |
all | 12% |
load | 11% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | 12% |
div/sqrt | 12% |
other | 10% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
CMPQ $0,-0x40(%RBP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JLE 67bec <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_3ForILl2ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS8_ILl4ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSH_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke9DirectionElPST_EEST_EENSP_INSR_INSS_5GroupElPSX_EESX_EENSP_INSQ_24strided_numeric_iteratorINSS_5ZoneKElPS12_EES12_EENSP_INS11_INSS_5ZoneJElPS16_EES16_EENSP_INS11_INSS_5ZoneIElPS1A_EES1A_EEEEENSN_IJEEEJZNK9SweepSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_RNSS_4Core9DataStoreENSS_6SdomIdEEUlST_SX_S12_S16_S1A_E_EEEEEvOS1M_._omp_fn.0.lto_priv.0+0xefc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0x58(%RBP),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0xa0(%RBP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0xb8(%RBP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x60(%RBP),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (,%RBX,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xb0(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RCX,%RDI,1),%R8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xa8(%RBP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%R10,%R9,8),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x78(%RBP),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
ADD %RCX,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %RDX,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
TESTB $0x1,-0x40(%RBP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JE 67aad <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_3ForILl2ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS8_ILl4ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSH_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke9DirectionElPST_EEST_EENSP_INSR_INSS_5GroupElPSX_EESX_EENSP_INSQ_24strided_numeric_iteratorINSS_5ZoneKElPS12_EES12_EENSP_INS11_INSS_5ZoneJElPS16_EES16_EENSP_INS11_INSS_5ZoneIElPS1A_EES1A_EEEEENSN_IJEEEJZNK9SweepSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_RNSS_4Core9DataStoreENSS_6SdomIdEEUlST_SX_S12_S16_S1A_E_EEEEEvOS1M_._omp_fn.0.lto_priv.0+0xdbd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0x68(%RBP),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%R12),%XMM6 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x48(%RBP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%R13),%XMM2 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%RBX),%XMM13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VADDSD %XMM6,%XMM6,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVSD (%R10),%XMM1,%XMM0 | 1 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13-14 | 4 |
VMULSD (%RAX),%XMM0,%XMM3 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD (%RSI),%XMM7 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VADDSD %XMM2,%XMM2,%XMM11 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDSD %XMM13,%XMM13,%XMM14 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVSD (%R9),%XMM11,%XMM12 | 1 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13-14 | 4 |
VADDSD (%RDI),%XMM12,%XMM8 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD213SD (%R8),%XMM12,%XMM7 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVSD (%R11),%XMM14,%XMM15 | 1 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13-14 | 4 |
VADDSD %XMM0,%XMM15,%XMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD %R15,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %R14,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VFMADD132SD (%RDX),%XMM3,%XMM15 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0x40(%RBP),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV $0x1,%R10D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %R14,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VADDSD %XMM4,%XMM8,%XMM9 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDSD %XMM7,%XMM15,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVSD %XMM9,%XMM5,%XMM2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-14 | 4 |
VMOVSD %XMM2,(%RCX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD %XMM2,%XMM2,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VMOVSD %XMM2,%XMM2,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
ADD %R14,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VFMSUB213SD (%RSI),%XMM10,%XMM11 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM11,(%RSI) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VFMSUB213SD (%RDX),%XMM10,%XMM12 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM12,(%RDX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VFMSUB213SD (%RAX),%XMM10,%XMM2 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD %R15,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD %XMM2,(%RAX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
ADD %R15,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %RBX,%R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 67bec <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_3ForILl2ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS8_ILl4ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSH_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke9DirectionElPST_EEST_EENSP_INSR_INSS_5GroupElPSX_EESX_EENSP_INSQ_24strided_numeric_iteratorINSS_5ZoneKElPS12_EES12_EENSP_INS11_INSS_5ZoneJElPS16_EES16_EENSP_INS11_INSS_5ZoneIElPS1A_EES1A_EEEEENSN_IJEEEJZNK9SweepSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_RNSS_4Core9DataStoreENSS_6SdomIdEEUlST_SX_S12_S16_S1A_E_EEEEEvOS1M_._omp_fn.0.lto_priv.0+0xefc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0x88(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
INCQ -0x50(%RBP) | 3 | 0.25 | 0.25 | 0.83 | 0.83 | 1 | 0.25 | 0.25 | 0.33 | 5 | 1 |
MOV -0x80(%RBP),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x50(%RBP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x98(%RBP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %RCX,%R11 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %RCX,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %RAX,-0x58(%RBP) | 2 | 0.25 | 0.25 | 0.83 | 0.83 | 1 | 0.25 | 0.25 | 0.33 | 5 | 1 |
ADD %RDI,-0x60(%RBP) | 2 | 0.25 | 0.25 | 0.83 | 0.83 | 1 | 0.25 | 0.25 | 0.33 | 5 | 1 |
CMP %R9,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JNE 679a8 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_3ForILl2ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS8_ILl4ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSH_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke9DirectionElPST_EEST_EENSP_INSR_INSS_5GroupElPSX_EESX_EENSP_INSQ_24strided_numeric_iteratorINSS_5ZoneKElPS12_EES12_EENSP_INS11_INSS_5ZoneJElPS16_EES16_EENSP_INS11_INSS_5ZoneIElPS1A_EES1A_EEEEENSN_IJEEEJZNK9SweepSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_RNSS_4Core9DataStoreENSS_6SdomIdEEUlST_SX_S12_S16_S1A_E_EEEEEvOS1M_._omp_fn.0.lto_priv.0+0xcb8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |