Loop Id: 1056 | Module: exec | Source: forall.hpp:59-59 [...] | Coverage: 0.01% |
---|
Loop Id: 1056 | Module: exec | Source: forall.hpp:59-59 [...] | Coverage: 0.01% |
---|
0x4626a0 MOV 0x8(%RSP),%R8 |
0x4626a5 IMUL %RDI,%R8 |
0x4626a9 VBROADCASTSD %XMM0,%YMM0 |
0x4626ae XOR %ESI,%ESI |
0x4626b0 VPBROADCASTQ %RSI,%YMM1 |
0x4626b6 VPADDQ %YMM25,%YMM1,%YMM1 |
0x4626bc VPCMPLTUQ %YMM27,%YMM1,%K1 |
0x4626c3 ADD %R14,%R8 |
0x4626c6 ADD %RSI,%R8 |
0x4626c9 VMOVUPD (%R15,%R8,8),%YMM1{%K1}{z} |
0x4626d0 VMOVAPD %YMM1,%YMM19{%K1} |
0x4626d6 ADD 0xa0(%RSP),%RSI |
0x4626de MOV 0x38(%RSP),%RDX |
0x4626e3 VMOVUPD (%RDX,%RSI,8),%YMM1{%K1}{z} |
0x4626ea VMOVAPD %YMM1,%YMM18{%K1} |
0x4626f0 VFMADD213PD %YMM18,%YMM19,%YMM0 |
0x4626f6 VMOVUPD %YMM0,(%RDX,%RSI,8){%K1} |
0x4626fd ADD %RBX,%RCX |
0x462700 CMP 0x1c8(%RSP),%RDI |
0x462708 LEA 0x1(%RDI),%RDI |
0x46270c JE 4624e0 |
0x462712 TEST %R10,%R10 |
0x462715 JLE 4626fd |
0x462717 MOV %R11,%RDX |
0x46271a IMUL %RDI,%RDX |
0x46271e ADD 0xa8(%RSP),%RDX |
0x462726 VMOVSD (%R13,%RDX,8),%XMM0 |
0x46272d CMPQ $0,0x18(%RSP) |
0x462733 JE 4626a0 |
0x462739 MOV 0x8(%RSP),%R8 |
0x46273e IMUL %RDI,%R8 |
0x462742 VBROADCASTSD %XMM0,%YMM0 |
0x462747 XOR %ESI,%ESI |
0x462749 NOPL (%RAX) |
(1057) 0x462750 VMOVUPD (%RCX,%RSI,8),%YMM1 |
(1057) 0x462755 VFMADD213PD (%R9,%RSI,8),%YMM0,%YMM1 |
(1057) 0x46275b VMOVUPD %YMM1,(%R9,%RSI,8) |
(1057) 0x462761 ADD $0x4,%RSI |
(1057) 0x462765 CMP %RAX,%RSI |
(1057) 0x462768 JLE 462750 |
0x46276a MOV 0x18(%RSP),%RDX |
0x46276f MOV %RDX,%RSI |
0x462772 CMP %RDX,%R10 |
0x462775 JNE 4626b0 |
0x46277b JMP 4626fd |
/home/kcamus/qaas_runs/169-391-8990/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/loop/forall.hpp: 59 - 59 |
-------------------------------------------------------------------------------- |
59: for (decltype(distance_it) i = 0; i < distance_it; ++i) { |
/home/kcamus/qaas_runs/169-391-8990/intel/Kripke/build/Kripke/src/Kripke/Kernel/LTimes.cpp: 62 - 62 |
-------------------------------------------------------------------------------- |
62: phi(nm,g,z) += ell(nm, d) * psi(d, g, z); |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_fork_call | libiomp5.so | |
○ | __kmpc_fork_call | libiomp5.so | |
○ | void Kripke::DispatchHelper<Kr[...] | internal.hpp:345 | exec |
○ | Kripke::Kernel::LTimes(Kripke:[...] | ArchLayout.h:145 | exec |
○ | Kripke::SteadyStateSolver(Krip[...] | basic_string.h:202 | exec |
○ | main | kripke.cpp:482 | exec |
○ | __libc_init_first | libc.so.6 |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.81 |
CQA speedup if FP arith vectorized | 1.28 |
CQA speedup if fully vectorized | 6.09 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.54 |
Bottlenecks | |
Function | void Kripke::DispatchHelper |
Source | forall.hpp:59-59,LTimes.cpp:62-62 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 5.44 |
CQA cycles if no scalar integer | 3.00 |
CQA cycles if FP arith vectorized | 4.25 |
CQA cycles if fully vectorized | 0.89 |
Front-end cycles | 5.44 |
DIV/SQRT cycles | 3.56 |
P0 cycles | 3.67 |
P1 cycles | 3.25 |
P2 cycles | 3.25 |
P3 cycles | 0.50 |
P4 cycles | 3.52 |
P5 cycles | 3.56 |
P6 cycles | 0.50 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 5.63 |
Stall cycles (UFS) | 0.00 |
Nb insns | 22.75 |
Nb uops | 21.75 |
Nb loads | 6.50 |
Nb stores | 0.50 |
Nb stack references | 4.25 |
FLOP/cycle | 0.74 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 2.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 14.21 |
Bytes prefetched | 0.00 |
Bytes loaded | 76.00 |
Bytes stored | 16.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 0.00 |
Stride unknown | 2.75 |
Stride indirect | 0.00 |
Vectorization ratio all | 27.62 |
Vectorization ratio load | 22.50 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 25.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 20.09 |
Vector-efficiency ratio all | 22.70 |
Vector-efficiency ratio load | 20.94 |
Vector-efficiency ratio store | 50.00 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | 21.88 |
Vector-efficiency ratio fma | 50.00 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 19.77 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 2.50 |
Bottlenecks | micro-operation queue, P0, P1, P5, P6, |
Function | void Kripke::DispatchHelper |
Source | forall.hpp:59-59,LTimes.cpp:62-62 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 1.25 |
CQA cycles if no scalar integer | 1.25 |
CQA cycles if FP arith vectorized | 1.25 |
CQA cycles if fully vectorized | 0.16 |
Front-end cycles | 1.25 |
DIV/SQRT cycles | 1.25 |
P0 cycles | 1.25 |
P1 cycles | 0.50 |
P2 cycles | 0.50 |
P3 cycles | 0.00 |
P4 cycles | 1.25 |
P5 cycles | 1.25 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 1.39 |
Stall cycles (UFS) | 0.00 |
Nb insns | 6.00 |
Nb uops | 5.00 |
Nb loads | 1.00 |
Nb stores | 0.00 |
Nb stack references | 1.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 6.40 |
Bytes prefetched | 0.00 |
Bytes loaded | 8.00 |
Bytes stored | 0.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 2.00 |
CQA speedup if FP arith vectorized | 1.45 |
CQA speedup if fully vectorized | 4.94 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.53 |
Bottlenecks | micro-operation queue, |
Function | void Kripke::DispatchHelper |
Source | forall.hpp:59-59,LTimes.cpp:62-62 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 7.00 |
CQA cycles if no scalar integer | 3.50 |
CQA cycles if FP arith vectorized | 4.83 |
CQA cycles if fully vectorized | 1.42 |
Front-end cycles | 7.00 |
DIV/SQRT cycles | 4.42 |
P0 cycles | 4.58 |
P1 cycles | 4.50 |
P2 cycles | 4.50 |
P3 cycles | 1.00 |
P4 cycles | 4.50 |
P5 cycles | 4.50 |
P6 cycles | 1.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 7.24 |
Stall cycles (UFS) | 0.00 |
Nb insns | 29.00 |
Nb uops | 28.00 |
Nb loads | 9.00 |
Nb stores | 1.00 |
Nb stack references | 6.00 |
FLOP/cycle | 1.14 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 4.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 21.71 |
Bytes prefetched | 0.00 |
Bytes loaded | 120.00 |
Bytes stored | 32.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 0.00 |
Stride unknown | 3.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 57.14 |
Vectorization ratio load | 50.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 50.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 42.86 |
Vector-efficiency ratio all | 33.93 |
Vector-efficiency ratio load | 31.25 |
Vector-efficiency ratio store | 50.00 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 31.25 |
Vector-efficiency ratio fma | 50.00 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 28.57 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 2.20 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 11.73 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.38 |
Bottlenecks | micro-operation queue, |
Function | void Kripke::DispatchHelper |
Source | forall.hpp:59-59,LTimes.cpp:62-62 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 5.50 |
CQA cycles if no scalar integer | 2.50 |
CQA cycles if FP arith vectorized | 5.50 |
CQA cycles if fully vectorized | 0.47 |
Front-end cycles | 5.50 |
DIV/SQRT cycles | 3.75 |
P0 cycles | 4.00 |
P1 cycles | 3.00 |
P2 cycles | 3.00 |
P3 cycles | 0.00 |
P4 cycles | 3.75 |
P5 cycles | 3.75 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 5.67 |
Stall cycles (UFS) | 0.00 |
Nb insns | 22.00 |
Nb uops | 22.00 |
Nb loads | 6.00 |
Nb stores | 0.00 |
Nb stack references | 4.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 8.73 |
Bytes prefetched | 0.00 |
Bytes loaded | 48.00 |
Bytes stored | 0.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 0.00 |
Stride unknown | 3.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 11.88 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 11.46 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.68 |
CQA speedup if FP arith vectorized | 1.48 |
CQA speedup if fully vectorized | 5.23 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.60 |
Bottlenecks | micro-operation queue, |
Function | void Kripke::DispatchHelper |
Source | forall.hpp:59-59,LTimes.cpp:62-62 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 8.00 |
CQA cycles if no scalar integer | 4.75 |
CQA cycles if FP arith vectorized | 5.41 |
CQA cycles if fully vectorized | 1.53 |
Front-end cycles | 8.00 |
DIV/SQRT cycles | 4.83 |
P0 cycles | 4.83 |
P1 cycles | 5.00 |
P2 cycles | 5.00 |
P3 cycles | 1.00 |
P4 cycles | 4.58 |
P5 cycles | 4.75 |
P6 cycles | 1.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 8.23 |
Stall cycles (UFS) | 0.00 |
Nb insns | 34.00 |
Nb uops | 32.00 |
Nb loads | 10.00 |
Nb stores | 1.00 |
Nb stack references | 6.00 |
FLOP/cycle | 1.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 4.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 20.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 128.00 |
Bytes stored | 32.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 0.00 |
Stride unknown | 5.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 53.33 |
Vectorization ratio load | 40.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 50.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 37.50 |
Vector-efficiency ratio all | 32.50 |
Vector-efficiency ratio load | 27.50 |
Vector-efficiency ratio store | 50.00 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 31.25 |
Vector-efficiency ratio fma | 50.00 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 26.56 |
Path / |
nb instructions | 22.75 |
nb uops | 21.75 |
loop length | 114.50 |
used x86 registers | 10.25 |
used mmx registers | 0 |
used xmm registers | 0.75 |
used ymm registers | 3.25 |
used zmm registers | 0 |
nb stack references | 4.25 |
micro-operation queue | 5.44 cycles |
front end | 5.44 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 3.56 | 3.60 | 3.25 | 3.25 | 0.50 | 3.52 | 3.56 | 0.50 |
cycles | 3.56 | 3.67 | 3.25 | 3.25 | 0.50 | 3.52 | 3.56 | 0.50 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 5.63 |
Stall cycles | 0.00 |
Front-end | 5.44 |
Dispatch | 3.71 |
Data deps. | 1.00 |
Overall L1 | 5.44 |
all | 15% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 0% |
add-sub | 25% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 50% |
load | 44% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 100% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 44% |
all | 27% |
load | 22% |
store | 100% |
mul | 0% |
add-sub | 25% |
fma | 100% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 20% |
all | 18% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 12% |
add-sub | 21% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 16% |
all | 31% |
load | 29% |
store | 50% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 50% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 29% |
all | 22% |
load | 20% |
store | 50% |
mul | 12% |
add-sub | 21% |
fma | 50% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 19% |
nb instructions | 6 |
nb uops | 5 |
loop length | 26 |
used x86 registers | 5 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 1 |
micro-operation queue | 1.25 cycles |
front end | 1.25 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 1.25 | 1.25 | 0.50 | 0.50 | 0.00 | 1.25 | 1.25 | 0.00 |
cycles | 1.25 | 1.25 | 0.50 | 0.50 | 0.00 | 1.25 | 1.25 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 1.39 |
Stall cycles | 0.00 |
Front-end | 1.25 |
Dispatch | 1.25 |
Data deps. | 1.00 |
Overall L1 | 1.25 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
ADD %RBX,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP 0x1c8(%RSP),%RDI | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
LEA 0x1(%RDI),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 4624e0 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE10LTimesSdomJRNS_6SdomIdERKNS_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS_9DirectionENS_5GroupENS_4ZoneEEEERNSC_IdJNS_6MomentESE_SF_EEERNSC_IdJSI_SD_EEEEEEvT_RKT0_DpOT1_.extracted+0x3a0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
TEST %R10,%R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 4626fd <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE10LTimesSdomJRNS_6SdomIdERKNS_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS_9DirectionENS_5GroupENS_4ZoneEEEERNSC_IdJNS_6MomentESE_SF_EEERNSC_IdJSI_SD_EEEEEEvT_RKT0_DpOT1_.extracted+0x5bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
nb instructions | 29 |
nb uops | 28 |
loop length | 153 |
used x86 registers | 12 |
used mmx registers | 0 |
used xmm registers | 1 |
used ymm registers | 6 |
used zmm registers | 0 |
nb stack references | 6 |
micro-operation queue | 7.00 cycles |
front end | 7.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 4.42 | 4.58 | 4.50 | 4.50 | 1.00 | 4.50 | 4.50 | 1.00 |
cycles | 4.42 | 4.58 | 4.50 | 4.50 | 1.00 | 4.50 | 4.50 | 1.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 7.24 |
Stall cycles | 0.00 |
Front-end | 7.00 |
Dispatch | 4.58 |
Data deps. | 1.00 |
Overall L1 | 7.00 |
all | 33% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 25% |
all | 75% |
load | 66% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 100% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 66% |
all | 57% |
load | 50% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | 100% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 42% |
all | 25% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 31% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 21% |
all | 40% |
load | 37% |
store | 50% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 50% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 37% |
all | 33% |
load | 31% |
store | 50% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 31% |
fma | 50% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 28% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
MOV 0x8(%RSP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
IMUL %RDI,%R8 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM0,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VPBROADCASTQ %RSI,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VPADDQ %YMM25,%YMM1,%YMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 1 | 0.33 |
VPCMPLTUQ %YMM27,%YMM1,%K1 | |||||||||||
ADD %R14,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %RSI,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVUPD (%R15,%R8,8),%YMM1{%K1}{z} | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 |
VMOVAPD %YMM1,%YMM19{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
ADD 0xa0(%RSP),%RSI | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
MOV 0x38(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVUPD (%RDX,%RSI,8),%YMM1{%K1}{z} | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 |
VMOVAPD %YMM1,%YMM18{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VFMADD213PD %YMM18,%YMM19,%YMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD %YMM0,(%RDX,%RSI,8){%K1} | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
ADD %RBX,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP 0x1c8(%RSP),%RDI | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
LEA 0x1(%RDI),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 4624e0 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE10LTimesSdomJRNS_6SdomIdERKNS_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS_9DirectionENS_5GroupENS_4ZoneEEEERNSC_IdJNS_6MomentESE_SF_EEERNSC_IdJSI_SD_EEEEEEvT_RKT0_DpOT1_.extracted+0x3a0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
TEST %R10,%R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 4626fd <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE10LTimesSdomJRNS_6SdomIdERKNS_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS_9DirectionENS_5GroupENS_4ZoneEEEERNSC_IdJNS_6MomentESE_SF_EEERNSC_IdJSI_SD_EEEEEEvT_RKT0_DpOT1_.extracted+0x5bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %R11,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
IMUL %RDI,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD 0xa8(%RSP),%RDX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
VMOVSD (%R13,%RDX,8),%XMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMPQ $0,0x18(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JE 4626a0 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE10LTimesSdomJRNS_6SdomIdERKNS_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS_9DirectionENS_5GroupENS_4ZoneEEEERNSC_IdJNS_6MomentESE_SF_EEERNSC_IdJSI_SD_EEEEEEvT_RKT0_DpOT1_.extracted+0x560> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
nb instructions | 22 |
nb uops | 22 |
loop length | 102 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 1 |
used ymm registers | 1 |
used zmm registers | 0 |
nb stack references | 4 |
micro-operation queue | 5.50 cycles |
front end | 5.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 3.75 | 3.75 | 3.00 | 3.00 | 0.00 | 3.75 | 3.75 | 0.00 |
cycles | 3.75 | 4.00 | 3.00 | 3.00 | 0.00 | 3.75 | 3.75 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 5.67 |
Stall cycles | 0.00 |
Front-end | 5.50 |
Dispatch | 4.00 |
Data deps. | 1.00 |
Overall L1 | 5.50 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 11% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
all | 11% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
ADD %RBX,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP 0x1c8(%RSP),%RDI | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
LEA 0x1(%RDI),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 4624e0 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE10LTimesSdomJRNS_6SdomIdERKNS_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS_9DirectionENS_5GroupENS_4ZoneEEEERNSC_IdJNS_6MomentESE_SF_EEERNSC_IdJSI_SD_EEEEEEvT_RKT0_DpOT1_.extracted+0x3a0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
TEST %R10,%R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 4626fd <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE10LTimesSdomJRNS_6SdomIdERKNS_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS_9DirectionENS_5GroupENS_4ZoneEEEERNSC_IdJNS_6MomentESE_SF_EEERNSC_IdJSI_SD_EEEEEEvT_RKT0_DpOT1_.extracted+0x5bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %R11,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
IMUL %RDI,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD 0xa8(%RSP),%RDX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
VMOVSD (%R13,%RDX,8),%XMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMPQ $0,0x18(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JE 4626a0 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE10LTimesSdomJRNS_6SdomIdERKNS_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS_9DirectionENS_5GroupENS_4ZoneEEEERNSC_IdJNS_6MomentESE_SF_EEERNSC_IdJSI_SD_EEEEEEvT_RKT0_DpOT1_.extracted+0x560> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV 0x8(%RSP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
IMUL %RDI,%R8 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM0,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV 0x18(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RDX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CMP %RDX,%R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JNE 4626b0 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE10LTimesSdomJRNS_6SdomIdERKNS_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS_9DirectionENS_5GroupENS_4ZoneEEEERNSC_IdJNS_6MomentESE_SF_EEERNSC_IdJSI_SD_EEEEEEvT_RKT0_DpOT1_.extracted+0x570> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
JMP 4626fd <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE10LTimesSdomJRNS_6SdomIdERKNS_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS_9DirectionENS_5GroupENS_4ZoneEEEERNSC_IdJNS_6MomentESE_SF_EEERNSC_IdJSI_SD_EEEEEEvT_RKT0_DpOT1_.extracted+0x5bd> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
nb instructions | 34 |
nb uops | 32 |
loop length | 177 |
used x86 registers | 13 |
used mmx registers | 0 |
used xmm registers | 1 |
used ymm registers | 6 |
used zmm registers | 0 |
nb stack references | 6 |
micro-operation queue | 8.00 cycles |
front end | 8.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 4.83 | 4.83 | 5.00 | 5.00 | 1.00 | 4.58 | 4.75 | 1.00 |
cycles | 4.83 | 4.83 | 5.00 | 5.00 | 1.00 | 4.58 | 4.75 | 1.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 8.23 |
Stall cycles | 0.00 |
Front-end | 8.00 |
Dispatch | 5.00 |
Data deps. | 1.00 |
Overall L1 | 8.00 |
all | 28% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 20% |
all | 75% |
load | 66% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 100% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 66% |
all | 53% |
load | 40% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | 100% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 37% |
all | 23% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 31% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 20% |
all | 40% |
load | 37% |
store | 50% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 50% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 37% |
all | 32% |
load | 27% |
store | 50% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 31% |
fma | 50% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 26% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
VPBROADCASTQ %RSI,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VPADDQ %YMM25,%YMM1,%YMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 1 | 0.33 |
VPCMPLTUQ %YMM27,%YMM1,%K1 | |||||||||||
ADD %R14,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %RSI,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVUPD (%R15,%R8,8),%YMM1{%K1}{z} | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 |
VMOVAPD %YMM1,%YMM19{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
ADD 0xa0(%RSP),%RSI | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
MOV 0x38(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVUPD (%RDX,%RSI,8),%YMM1{%K1}{z} | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 |
VMOVAPD %YMM1,%YMM18{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VFMADD213PD %YMM18,%YMM19,%YMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD %YMM0,(%RDX,%RSI,8){%K1} | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
ADD %RBX,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP 0x1c8(%RSP),%RDI | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
LEA 0x1(%RDI),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 4624e0 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE10LTimesSdomJRNS_6SdomIdERKNS_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS_9DirectionENS_5GroupENS_4ZoneEEEERNSC_IdJNS_6MomentESE_SF_EEERNSC_IdJSI_SD_EEEEEEvT_RKT0_DpOT1_.extracted+0x3a0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
TEST %R10,%R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 4626fd <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE10LTimesSdomJRNS_6SdomIdERKNS_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS_9DirectionENS_5GroupENS_4ZoneEEEERNSC_IdJNS_6MomentESE_SF_EEERNSC_IdJSI_SD_EEEEEEvT_RKT0_DpOT1_.extracted+0x5bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %R11,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
IMUL %RDI,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD 0xa8(%RSP),%RDX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
VMOVSD (%R13,%RDX,8),%XMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMPQ $0,0x18(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JE 4626a0 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE10LTimesSdomJRNS_6SdomIdERKNS_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS_9DirectionENS_5GroupENS_4ZoneEEEERNSC_IdJNS_6MomentESE_SF_EEERNSC_IdJSI_SD_EEEEEEvT_RKT0_DpOT1_.extracted+0x560> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV 0x8(%RSP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
IMUL %RDI,%R8 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM0,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV 0x18(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RDX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CMP %RDX,%R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JNE 4626b0 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE10LTimesSdomJRNS_6SdomIdERKNS_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS_9DirectionENS_5GroupENS_4ZoneEEEERNSC_IdJNS_6MomentESE_SF_EEERNSC_IdJSI_SD_EEEEEEvT_RKT0_DpOT1_.extracted+0x570> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |