Loop Id: 629 | Module: libkripke.so | Source: Source.cpp:67-71 [...] | Coverage: 0.02% |
---|
Loop Id: 629 | Module: libkripke.so | Source: Source.cpp:67-71 [...] | Coverage: 0.02% |
---|
0x64d80 CMP %RDI,%R13 |
0x64d83 JE 64b0b |
0x64d89 INC %RCX |
0x64d8c CMP %RCX,%RBX |
0x64d8f JLE 64f38 |
0x64d95 LEA 0x1(%RDI),%RAX |
0x64d99 LEA (%RCX,%R15,1),%RDI |
0x64d9d CMPQ $0,(%RSI,%RDI,8) [6] |
0x64da2 JE 64e88 |
0x64da8 INC %RCX |
0x64dab CMP %RCX,%RBX |
0x64dae JLE 64f2e |
0x64db4 LEA (%RCX,%R15,1),%RDI |
0x64db8 CMPQ $0,(%RSI,%RDI,8) [4] |
0x64dbd JE 64e58 |
0x64dc3 INC %RCX |
0x64dc6 CMP %RCX,%RBX |
0x64dc9 JLE 64f24 |
0x64dcf LEA (%RCX,%R15,1),%RDI |
0x64dd3 CMPQ $0,(%RSI,%RDI,8) [3] |
0x64dd8 JE 64e28 |
0x64dda INC %RCX |
0x64ddd CMP %RCX,%RBX |
0x64de0 JLE 64f1a |
0x64de6 LEA 0x3(%RAX),%RDI |
0x64dea LEA (%RCX,%R15,1),%RAX |
0x64dee CMPQ $0,(%RSI,%RAX,8) [9] |
0x64df3 JNE 64d80 |
0x64df5 MOV -0x38(%RBP),%R12 [17] |
0x64df9 VMOVSD (%R10,%RAX,8),%XMM5 [14] |
0x64dff ADD %R14,%R12 |
0x64e02 IMUL %RDX,%R12 |
0x64e06 ADD %R8,%R12 |
0x64e09 ADD (%R9,%RAX,8),%R12 [13] |
0x64e0d LEA (%R11,%R12,8),%R12 |
0x64e11 VFMADD213SD (%R12),%XMM2,%XMM5 [2] |
0x64e17 VMOVSD %XMM5,(%R12) [2] |
0x64e1d JMP 64d80 |
0x64e28 MOV -0x38(%RBP),%R12 [17] |
0x64e2c VMOVSD (%R10,%RDI,8),%XMM8 [7] |
0x64e32 ADD %R14,%R12 |
0x64e35 IMUL %RDX,%R12 |
0x64e39 ADD %R8,%R12 |
0x64e3c ADD (%R9,%RDI,8),%R12 [5] |
0x64e40 LEA (%R11,%R12,8),%R12 |
0x64e44 VFMADD213SD (%R12),%XMM2,%XMM8 [15] |
0x64e4a VMOVSD %XMM8,(%R12) [15] |
0x64e50 JMP 64dda |
0x64e58 MOV -0x38(%RBP),%R12 [17] |
0x64e5c VMOVSD (%R10,%RDI,8),%XMM7 [10] |
0x64e62 ADD %R14,%R12 |
0x64e65 IMUL %RDX,%R12 |
0x64e69 ADD %R8,%R12 |
0x64e6c ADD (%R9,%RDI,8),%R12 [8] |
0x64e70 LEA (%R11,%R12,8),%R12 |
0x64e74 VFMADD213SD (%R12),%XMM2,%XMM7 [1] |
0x64e7a VMOVSD %XMM7,(%R12) [1] |
0x64e80 JMP 64dc3 |
0x64e88 MOV -0x38(%RBP),%R12 [17] |
0x64e8c VMOVSD (%R10,%RDI,8),%XMM6 [12] |
0x64e92 ADD %R14,%R12 |
0x64e95 IMUL %RDX,%R12 |
0x64e99 ADD %R8,%R12 |
0x64e9c ADD (%R9,%RDI,8),%R12 [11] |
0x64ea0 LEA (%R11,%R12,8),%R12 |
0x64ea4 VFMADD213SD (%R12),%XMM2,%XMM6 [16] |
0x64eaa VMOVSD %XMM6,(%R12) [16] |
0x64eb0 JMP 64da8 |
0x64f1a INC %R14 |
0x64f1d XOR %ECX,%ECX |
0x64f1f JMP 64de6 |
0x64f24 INC %R14 |
0x64f27 XOR %ECX,%ECX |
0x64f29 JMP 64dcf |
0x64f2e INC %R14 |
0x64f31 XOR %ECX,%ECX |
0x64f33 JMP 64db4 |
0x64f38 INC %R14 |
0x64f3b XOR %ECX,%ECX |
0x64f3d JMP 64d95 |
/home/kcamus/qaas_runs/169-391-8990/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Layout.hpp: 55 - 55 |
-------------------------------------------------------------------------------- |
55: return a * b; |
/home/kcamus/qaas_runs/169-391-8990/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/internal/Iterators.hpp: 177 - 177 |
-------------------------------------------------------------------------------- |
177: return value_type(val + rhs); |
/home/kcamus/qaas_runs/169-391-8990/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Operators.hpp: 307 - 307 |
-------------------------------------------------------------------------------- |
307: return Ret{lhs} + rhs; |
/home/kcamus/qaas_runs/169-391-8990/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/openmp/kernel/Collapse.hpp: 81 - 81 |
-------------------------------------------------------------------------------- |
81: #pragma omp parallel for private(i0, i1) firstprivate(privatizer) \ |
/home/kcamus/qaas_runs/169-391-8990/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/View.hpp: 110 - 110 |
-------------------------------------------------------------------------------- |
110: return data[idx]; |
/home/kcamus/qaas_runs/169-391-8990/intel/Kripke/build/Kripke/src/Kripke/Kernel/Source.cpp: 67 - 71 |
-------------------------------------------------------------------------------- |
67: if(material == 0){ |
68: Zone z = mixelem_to_zone(mix); |
69: double fraction = mixelem_to_fraction(mix); |
70: |
71: phi_out(nm, g, z) += source_strength * fraction; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
○100.00 | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 3.36 |
CQA speedup if FP arith vectorized | 3.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.29 |
Bottlenecks | micro-operation queue, |
Function | void RAJA::internal::StatementExecutor |
Source | Layout.hpp:55-55,Iterators.hpp:177-177,Operators.hpp:307-307,Collapse.hpp:81-81,View.hpp:110-110,Source.cpp:67-71 |
Source loop unroll info | multi-versionned |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 21.00 |
CQA cycles if no scalar integer | 6.25 |
CQA cycles if FP arith vectorized | 6.99 |
CQA cycles if fully vectorized | 2.63 |
Front-end cycles | 21.00 |
DIV/SQRT cycles | 16.00 |
P0 cycles | 16.25 |
P1 cycles | 10.00 |
P2 cycles | 10.00 |
P3 cycles | 4.00 |
P4 cycles | 16.00 |
P5 cycles | 16.00 |
P6 cycles | 4.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 21.35 |
Stall cycles (UFS) | 0.00 |
Nb insns | 80.00 |
Nb uops | 80.00 |
Nb loads | 20.00 |
Nb stores | 4.00 |
Nb stack references | 1.00 |
FLOP/cycle | 0.38 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 4.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 9.14 |
Bytes prefetched | 0.00 |
Bytes loaded | 160.00 |
Bytes stored | 32.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | 12.50 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 3.36 |
CQA speedup if FP arith vectorized | 3.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.29 |
Bottlenecks | micro-operation queue, |
Function | void RAJA::internal::StatementExecutor |
Source | Layout.hpp:55-55,Iterators.hpp:177-177,Operators.hpp:307-307,Collapse.hpp:81-81,View.hpp:110-110,Source.cpp:67-71 |
Source loop unroll info | multi-versionned |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 21.00 |
CQA cycles if no scalar integer | 6.25 |
CQA cycles if FP arith vectorized | 6.99 |
CQA cycles if fully vectorized | 2.63 |
Front-end cycles | 21.00 |
DIV/SQRT cycles | 16.00 |
P0 cycles | 16.25 |
P1 cycles | 10.00 |
P2 cycles | 10.00 |
P3 cycles | 4.00 |
P4 cycles | 16.00 |
P5 cycles | 16.00 |
P6 cycles | 4.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 21.35 |
Stall cycles (UFS) | 0.00 |
Nb insns | 80.00 |
Nb uops | 80.00 |
Nb loads | 20.00 |
Nb stores | 4.00 |
Nb stack references | 1.00 |
FLOP/cycle | 0.38 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 4.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 9.14 |
Bytes prefetched | 0.00 |
Bytes loaded | 160.00 |
Bytes stored | 32.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | 12.50 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
nb instructions | 80 |
nb uops | 80 |
loop length | 334 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 5 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 1 |
micro-operation queue | 21.00 cycles |
front end | 21.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 16.00 | 16.00 | 10.00 | 10.00 | 4.00 | 16.00 | 16.00 | 4.00 |
cycles | 16.00 | 16.25 | 10.00 | 10.00 | 4.00 | 16.00 | 16.00 | 4.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 21.35 |
Stall cycles | 0.00 |
Front-end | 21.00 |
Dispatch | 16.25 |
Overall L1 | 21.00 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
CMP %RDI,%R13 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 64b0b <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x1bb> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
INC %RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %RCX,%RBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 64f38 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x5e8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
LEA 0x1(%RDI),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RCX,%R15,1),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
CMPQ $0,(%RSI,%RDI,8) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JE 64e88 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x538> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
INC %RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %RCX,%RBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 64f2e <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x5de> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
LEA (%RCX,%R15,1),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
CMPQ $0,(%RSI,%RDI,8) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JE 64e58 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x508> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
INC %RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %RCX,%RBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 64f24 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x5d4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
LEA (%RCX,%R15,1),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
CMPQ $0,(%RSI,%RDI,8) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JE 64e28 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x4d8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
INC %RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %RCX,%RBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 64f1a <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x5ca> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
LEA 0x3(%RAX),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RCX,%R15,1),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
CMPQ $0,(%RSI,%RAX,8) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JNE 64d80 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x430> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0x38(%RBP),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%R10,%RAX,8),%XMM5 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %R14,%R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
IMUL %RDX,%R12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R8,%R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD (%R9,%RAX,8),%R12 | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
LEA (%R11,%R12,8),%R12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VFMADD213SD (%R12),%XMM2,%XMM5 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,(%R12) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JMP 64d80 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x430> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
MOV -0x38(%RBP),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%R10,%RDI,8),%XMM8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %R14,%R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
IMUL %RDX,%R12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R8,%R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD (%R9,%RDI,8),%R12 | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
LEA (%R11,%R12,8),%R12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VFMADD213SD (%R12),%XMM2,%XMM8 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM8,(%R12) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JMP 64dda <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x48a> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
MOV -0x38(%RBP),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%R10,%RDI,8),%XMM7 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %R14,%R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
IMUL %RDX,%R12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R8,%R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD (%R9,%RDI,8),%R12 | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
LEA (%R11,%R12,8),%R12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VFMADD213SD (%R12),%XMM2,%XMM7 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM7,(%R12) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JMP 64dc3 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x473> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
MOV -0x38(%RBP),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%R10,%RDI,8),%XMM6 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %R14,%R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
IMUL %RDX,%R12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R8,%R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD (%R9,%RDI,8),%R12 | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
LEA (%R11,%R12,8),%R12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VFMADD213SD (%R12),%XMM2,%XMM6 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM6,(%R12) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JMP 64da8 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x458> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
INC %R14 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 64de6 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x496> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
INC %R14 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 64dcf <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x47f> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
INC %R14 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 64db4 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x464> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
INC %R14 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 64d95 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x445> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
nb instructions | 80 |
nb uops | 80 |
loop length | 334 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 5 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 1 |
micro-operation queue | 21.00 cycles |
front end | 21.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 16.00 | 16.00 | 10.00 | 10.00 | 4.00 | 16.00 | 16.00 | 4.00 |
cycles | 16.00 | 16.25 | 10.00 | 10.00 | 4.00 | 16.00 | 16.00 | 4.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 21.35 |
Stall cycles | 0.00 |
Front-end | 21.00 |
Dispatch | 16.25 |
Overall L1 | 21.00 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
CMP %RDI,%R13 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 64b0b <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x1bb> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
INC %RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %RCX,%RBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 64f38 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x5e8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
LEA 0x1(%RDI),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RCX,%R15,1),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
CMPQ $0,(%RSI,%RDI,8) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JE 64e88 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x538> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
INC %RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %RCX,%RBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 64f2e <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x5de> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
LEA (%RCX,%R15,1),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
CMPQ $0,(%RSI,%RDI,8) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JE 64e58 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x508> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
INC %RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %RCX,%RBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 64f24 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x5d4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
LEA (%RCX,%R15,1),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
CMPQ $0,(%RSI,%RDI,8) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JE 64e28 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x4d8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
INC %RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %RCX,%RBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 64f1a <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x5ca> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
LEA 0x3(%RAX),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RCX,%R15,1),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
CMPQ $0,(%RSI,%RAX,8) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JNE 64d80 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x430> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0x38(%RBP),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%R10,%RAX,8),%XMM5 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %R14,%R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
IMUL %RDX,%R12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R8,%R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD (%R9,%RAX,8),%R12 | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
LEA (%R11,%R12,8),%R12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VFMADD213SD (%R12),%XMM2,%XMM5 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,(%R12) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JMP 64d80 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x430> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
MOV -0x38(%RBP),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%R10,%RDI,8),%XMM8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %R14,%R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
IMUL %RDX,%R12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R8,%R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD (%R9,%RDI,8),%R12 | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
LEA (%R11,%R12,8),%R12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VFMADD213SD (%R12),%XMM2,%XMM8 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM8,(%R12) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JMP 64dda <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x48a> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
MOV -0x38(%RBP),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%R10,%RDI,8),%XMM7 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %R14,%R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
IMUL %RDX,%R12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R8,%R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD (%R9,%RDI,8),%R12 | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
LEA (%R11,%R12,8),%R12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VFMADD213SD (%R12),%XMM2,%XMM7 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM7,(%R12) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JMP 64dc3 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x473> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
MOV -0x38(%RBP),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%R10,%RDI,8),%XMM6 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %R14,%R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
IMUL %RDX,%R12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R8,%R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD (%R9,%RDI,8),%R12 | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
LEA (%R11,%R12,8),%R12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VFMADD213SD (%R12),%XMM2,%XMM6 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM6,(%R12) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JMP 64da8 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x458> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
INC %R14 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 64de6 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x496> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
INC %R14 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 64dcf <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x47f> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
INC %R14 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 64db4 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x464> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
INC %R14 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 64d95 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_6LambdaILl0EJEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSA_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke5GroupElPSM_EESM_EENSI_INSK_INSL_7MixElemElPSQ_EESQ_EEEEENSG_IJEEEJZNK10SourceSdomclINSL_11ArchLayoutTINSL_12ArchT_OpenMPENSL_11LayoutT_DGZEEEEEvT_NSL_6SdomIdERKNSL_4Core3SetES17_RNS14_5FieldIdJNSL_6MomentESM_NSL_4ZoneEEEERNS18_IS1A_JSQ_EEERNS18_INSL_8MaterialEJSQ_EEERNS18_IdJSQ_EEEdEUlSM_SQ_E_EEEEEvOS12_._omp_fn.0+0x445> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |