Loop Id: 1949 | Module: exec | Source: :0-0 | Coverage: 0.05% |
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Loop Id: 1949 | Module: exec | Source: :0-0 | Coverage: 0.05% |
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0x4d8b30 MOVSXD %EBX,%RBX |
0x4d8b33 MOV %RBX,%RAX |
0x4d8b36 SAL $0x4,%RAX |
0x4d8b3a MOVUPS (%R12),%XMM0 |
0x4d8b3f MOVUPS (%R13,%RAX,1),%XMM1 |
0x4d8b45 MOVUPS %XMM1,(%R12) |
0x4d8b4a MOVUPS %XMM0,(%R13,%RAX,1) |
0x4d8b50 LEA -0x1(%RBX),%EDX |
0x4d8b53 MOV %R13,%RDI |
0x4d8b56 CALL 4d8b00 <quicksort> |
0x4d8b5b INC %EBX |
0x4d8b5d MOV %EBX,%ESI |
0x4d8b5f CMP %R15D,%EBX |
0x4d8b62 JGE 4d8bb7 |
0x4d8b64 MOVSXD %ESI,%RAX |
0x4d8b67 MOV %R14,%RCX |
0x4d8b6a SUB %RAX,%RCX |
0x4d8b6d SAL $0x4,%RAX |
0x4d8b71 ADD %R13,%RAX |
0x4d8b74 MOV %ESI,%EBX |
0x4d8b76 JMP 4d8b89 |
(1950) 0x4d8b80 ADD $0x10,%RAX |
(1950) 0x4d8b84 DEC %RCX |
(1950) 0x4d8b87 JE 4d8b30 |
(1950) 0x4d8b89 MOV (%RAX),%RDI |
(1950) 0x4d8b8c CMP (%R12),%RDI |
(1950) 0x4d8b90 JAE 4d8b80 |
(1950) 0x4d8b92 MOVSXD %EBX,%RBX |
(1950) 0x4d8b95 MOV 0x8(%RAX),%RBP |
(1950) 0x4d8b99 MOV %RBX,%RDX |
(1950) 0x4d8b9c SAL $0x4,%RDX |
(1950) 0x4d8ba0 MOVUPS (%R13,%RDX,1),%XMM0 |
(1950) 0x4d8ba6 MOVUPS %XMM0,(%RAX) |
(1950) 0x4d8ba9 MOV %RDI,(%R13,%RDX,1) |
(1950) 0x4d8bae MOV %RBP,0x8(%R13,%RDX,1) |
(1950) 0x4d8bb3 INC %EBX |
(1950) 0x4d8bb5 JMP 4d8b80 |
*** This Panel is Intentionally Left Blank. *** It is due to a lack of debug symbols in the given object |
Coverage (%) | Name | Source Location | Module |
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Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.38 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 9.78 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.83 |
Bottlenecks | micro-operation queue, |
Function | quicksort |
Source | |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 5.50 |
CQA cycles if no scalar integer | 4.00 |
CQA cycles if FP arith vectorized | 5.50 |
CQA cycles if fully vectorized | 0.56 |
Front-end cycles | 5.50 |
DIV/SQRT cycles | 3.00 |
P0 cycles | 3.00 |
P1 cycles | 1.67 |
P2 cycles | 1.67 |
P3 cycles | 3.00 |
P4 cycles | 3.00 |
P5 cycles | 3.00 |
P6 cycles | 1.67 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | 4 |
FE+BE cycles (UFS) | 5.39 |
Stall cycles (UFS) | 0.00 |
Nb insns | 21.00 |
Nb uops | 22.00 |
Nb loads | 2.00 |
Nb stores | 2.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 11.64 |
Bytes prefetched | 0.00 |
Bytes loaded | 32.00 |
Bytes stored | 32.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 2.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 44.44 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 16.67 |
Vector-efficiency ratio load | 25.00 |
Vector-efficiency ratio store | 25.00 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 9.38 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.38 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 9.78 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.83 |
Bottlenecks | micro-operation queue, |
Function | quicksort |
Source | |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 5.50 |
CQA cycles if no scalar integer | 4.00 |
CQA cycles if FP arith vectorized | 5.50 |
CQA cycles if fully vectorized | 0.56 |
Front-end cycles | 5.50 |
DIV/SQRT cycles | 3.00 |
P0 cycles | 3.00 |
P1 cycles | 1.67 |
P2 cycles | 1.67 |
P3 cycles | 3.00 |
P4 cycles | 3.00 |
P5 cycles | 3.00 |
P6 cycles | 1.67 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | 4 |
FE+BE cycles (UFS) | 5.39 |
Stall cycles (UFS) | 0.00 |
Nb insns | 21.00 |
Nb uops | 22.00 |
Nb loads | 2.00 |
Nb stores | 2.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 11.64 |
Bytes prefetched | 0.00 |
Bytes loaded | 32.00 |
Bytes stored | 32.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 2.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 44.44 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 16.67 |
Vector-efficiency ratio load | 25.00 |
Vector-efficiency ratio store | 25.00 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 9.38 |
Path / |
Function | quicksort |
Source file and lines | |
Module | exec |
nb instructions | 21 |
nb uops | 22 |
loop length | 72 |
used x86 registers | 10 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 5.50 cycles |
front end | 5.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 3.00 | 3.00 | 1.67 | 1.67 | 3.00 | 3.00 | 3.00 | 1.67 |
cycles | 3.00 | 3.00 | 1.67 | 1.67 | 3.00 | 3.00 | 3.00 | 1.67 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 4.00 |
FE+BE cycles | 5.39 |
Stall cycles | 0.00 |
Front-end | 5.50 |
Dispatch | 3.00 |
Data deps. | 4.00 |
Overall L1 | 5.50 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 100% |
load | 100% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 44% |
load | 100% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 10% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 9% |
all | 25% |
load | 25% |
store | 25% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 16% |
load | 25% |
store | 25% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 9% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
MOVSXD %EBX,%RBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %RBX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
SAL $0x4,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
MOVUPS (%R12),%XMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOVUPS (%R13,%RAX,1),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOVUPS %XMM1,(%R12) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOVUPS %XMM0,(%R13,%RAX,1) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA -0x1(%RBX),%EDX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 4d8b00 | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
INC %EBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %EBX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CMP %R15D,%EBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JGE 4d8bb7 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOVSXD %ESI,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %R14,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
SUB %RAX,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
SAL $0x4,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
ADD %R13,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %ESI,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 4d8b89 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
Function | quicksort |
Source file and lines | |
Module | exec |
nb instructions | 21 |
nb uops | 22 |
loop length | 72 |
used x86 registers | 10 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 5.50 cycles |
front end | 5.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 3.00 | 3.00 | 1.67 | 1.67 | 3.00 | 3.00 | 3.00 | 1.67 |
cycles | 3.00 | 3.00 | 1.67 | 1.67 | 3.00 | 3.00 | 3.00 | 1.67 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 4.00 |
FE+BE cycles | 5.39 |
Stall cycles | 0.00 |
Front-end | 5.50 |
Dispatch | 3.00 |
Data deps. | 4.00 |
Overall L1 | 5.50 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 100% |
load | 100% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 44% |
load | 100% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 10% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 9% |
all | 25% |
load | 25% |
store | 25% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 16% |
load | 25% |
store | 25% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 9% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
MOVSXD %EBX,%RBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %RBX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
SAL $0x4,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
MOVUPS (%R12),%XMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOVUPS (%R13,%RAX,1),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOVUPS %XMM1,(%R12) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOVUPS %XMM0,(%R13,%RAX,1) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA -0x1(%RBX),%EDX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 4d8b00 | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
INC %EBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %EBX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CMP %R15D,%EBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JGE 4d8bb7 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOVSXD %ESI,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %R14,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
SUB %RAX,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
SAL $0x4,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
ADD %R13,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %ESI,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 4d8b89 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |