Loop Id: 1164 | Module: exec | Source: Collapse.hpp:81-83 [...] | Coverage: 0.01% |
---|
Loop Id: 1164 | Module: exec | Source: Collapse.hpp:81-83 [...] | Coverage: 0.01% |
---|
0x4593f0 LEA 0x1(%R9),%RAX |
0x4593f4 CMP %R10,%R9 |
0x4593f7 MOV %RAX,%R9 |
0x4593fa JE 45950d |
0x459400 MOV -0x50(%RBP),%RAX |
0x459404 ADD %R9,%RAX |
0x459407 MOV %RAX,%RDX |
0x45940a OR %R12,%RDX |
0x45940d SHR $0x20,%RDX |
0x459411 JE 459420 |
0x459413 CQTO |
0x459415 IDIV %R12 |
0x459418 JMP 459425 |
0x459420 XOR %EDX,%EDX |
0x459422 DIV %R12D |
0x459425 ADD -0x90(%RBP),%RAX |
0x45942c MOV -0x88(%RBP),%RSI |
0x459433 VMOVSD (%RSI,%RAX,8),%XMM0 |
0x459438 TEST %R11,%R11 |
0x45943b JE 4594c0 |
0x459441 LEA (%RBX,%RDX,1),%RSI |
0x459445 IMUL -0x60(%RBP),%RSI |
0x45944a ADD %R14,%RSI |
0x45944d MOV %R8,%RBX |
0x459450 IMUL %RAX,%RBX |
0x459454 ADD %RSI,%RBX |
0x459457 VBROADCASTSD %XMM0,%YMM2 |
0x45945c MOV -0x58(%RBP),%RSI |
0x459460 LEA (%RSI,%RBX,8),%RSI |
0x459464 VXORPD %XMM1,%XMM1,%XMM1 |
0x459468 XOR %R8D,%R8D |
0x45946b NOPL (%RAX,%RAX,1) |
(1165) 0x459470 VMULPD (%RSI,%R8,8),%YMM2,%YMM3 |
(1165) 0x459476 VFMADD231PD (%RDI,%R8,8),%YMM3,%YMM1 |
(1165) 0x45947c ADD $0x4,%R8 |
(1165) 0x459480 CMP %RCX,%R8 |
(1165) 0x459483 JLE 459470 |
0x459485 VEXTRACTF128 $0x1,%YMM1,%XMM2 |
0x45948b VADDPD %XMM2,%XMM1,%XMM1 |
0x45948f VPERMILPD $0x1,%XMM1,%XMM2 |
0x459495 VADDSD %XMM2,%XMM1,%XMM1 |
0x459499 VADDSD %XMM1,%XMM4,%XMM4 |
0x45949d MOV %R11,%RSI |
0x4594a0 CMP %R11,-0x80(%RBP) |
0x4594a4 MOV -0x48(%RBP),%RBX |
0x4594a8 MOV -0x40(%RBP),%R8 |
0x4594ac JE 4593f0 |
0x4594b2 JMP 4594c2 |
0x4594c0 XOR %ESI,%ESI |
0x4594c2 ADD %RBX,%RDX |
0x4594c5 IMUL -0x60(%RBP),%RDX |
0x4594ca IMUL %R8,%RAX |
0x4594ce ADD %R14,%RSI |
0x4594d1 ADD %RDX,%RAX |
0x4594d4 MOV -0x58(%RBP),%RDX |
0x4594d8 LEA (%RDX,%RAX,8),%RAX |
0x4594dc NOPL (%RAX) |
(1163) 0x4594e0 VMULSD (%RAX,%RSI,8),%XMM0,%XMM1 |
(1163) 0x4594e5 VFMADD231SD (%R13,%RSI,8),%XMM1,%XMM4 |
(1163) 0x4594ec INC %RSI |
(1163) 0x4594ef CMP %RSI,%R15 |
(1163) 0x4594f2 JNE 4594e0 |
0x4594f4 JMP 4593f0 |
/home/kcamus/qaas_runs/169-391-8990/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/loop/forall.hpp: 59 - 59 |
-------------------------------------------------------------------------------- |
59: for (decltype(distance_it) i = 0; i < distance_it; ++i) { |
/home/kcamus/qaas_runs/169-391-8990/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Operators.hpp: 307 - 307 |
-------------------------------------------------------------------------------- |
307: return Ret{lhs} + rhs; |
/home/kcamus/qaas_runs/169-391-8990/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/openmp/kernel/Collapse.hpp: 81 - 83 |
-------------------------------------------------------------------------------- |
81: #pragma omp parallel for private(i0, i1) firstprivate(privatizer) \ |
82: RAJA_COLLAPSE(2) |
83: for (i0 = 0; i0 < l0; ++i0) { |
/home/kcamus/qaas_runs/169-391-8990/intel/Kripke/build/Kripke/src/Kripke/Kernel/Population.cpp: 58 - 58 |
-------------------------------------------------------------------------------- |
58: part_red += w(d) * psi(d,g,z) * volume(z); |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_fork_call | libiomp5.so | |
○ | __kmpc_fork_call | libiomp5.so | |
○ | void PopulationSdom::operator([...] | reduce.hpp:58 | exec |
○ | Kripke::Kernel::population(Kri[...] | ArchLayout.h:179 | exec |
○ | Kripke::SteadyStateSolver(Krip[...] | SteadyStateSolver.cpp:99 | exec |
○ | main | kripke.cpp:482 | exec |
○ | __libc_init_first | libc.so.6 |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 4.80 - 15.36 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 2.22 - 2.06 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.02 - 3.25 |
Bottlenecks | P0, |
Function | void PopulationSdom::operator() |
Source | forall.hpp:59-59,Operators.hpp:307-307,Collapse.hpp:81-83,Population.cpp:58-58 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 30.00 - 96.00 |
CQA cycles if no scalar integer | 6.25 |
CQA cycles if FP arith vectorized | 30.00 - 96.00 |
CQA cycles if fully vectorized | 13.50 - 46.50 |
Front-end cycles | 29.50 |
DIV/SQRT cycles | 25.25 |
P0 cycles | 25.50 |
P1 cycles | 5.50 |
P2 cycles | 5.50 |
P3 cycles | 0.00 |
P4 cycles | 25.25 |
P5 cycles | 25.25 |
P6 cycles | 0.00 |
P7 cycles | 30.00 - 96.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 30.36 - 96.36 |
Stall cycles (UFS) | 15.56 - 81.56 |
Nb insns | 53.00 |
Nb uops | 118.00 |
Nb loads | 11.00 |
Nb stores | 0.00 |
Nb stack references | 8.00 |
FLOP/cycle | 0.13 - 0.04 |
Nb FLOP add-sub | 4.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 0.92 - 2.93 |
Bytes prefetched | 0.00 |
Bytes loaded | 88.00 |
Bytes stored | 0.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 25.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 33.33 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 33.33 |
Vector-efficiency ratio all | 14.84 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 16.67 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | 9.38 |
Vector-efficiency ratio other | 15.97 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 4.80 - 15.36 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 2.22 - 2.06 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.02 - 3.25 |
Bottlenecks | P0, |
Function | void PopulationSdom::operator() |
Source | forall.hpp:59-59,Operators.hpp:307-307,Collapse.hpp:81-83,Population.cpp:58-58 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 30.00 - 96.00 |
CQA cycles if no scalar integer | 6.25 |
CQA cycles if FP arith vectorized | 30.00 - 96.00 |
CQA cycles if fully vectorized | 13.50 - 46.50 |
Front-end cycles | 29.50 |
DIV/SQRT cycles | 25.25 |
P0 cycles | 25.50 |
P1 cycles | 5.50 |
P2 cycles | 5.50 |
P3 cycles | 0.00 |
P4 cycles | 25.25 |
P5 cycles | 25.25 |
P6 cycles | 0.00 |
P7 cycles | 30.00 - 96.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 30.36 - 96.36 |
Stall cycles (UFS) | 15.56 - 81.56 |
Nb insns | 53.00 |
Nb uops | 118.00 |
Nb loads | 11.00 |
Nb stores | 0.00 |
Nb stack references | 8.00 |
FLOP/cycle | 0.13 - 0.04 |
Nb FLOP add-sub | 4.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 0.92 - 2.93 |
Bytes prefetched | 0.00 |
Bytes loaded | 88.00 |
Bytes stored | 0.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 25.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 33.33 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 33.33 |
Vector-efficiency ratio all | 14.84 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 16.67 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | 9.38 |
Vector-efficiency ratio other | 15.97 |
Path / |
nb instructions | 53 |
nb uops | 118 |
loop length | 206 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 4 |
used ymm registers | 2 |
used zmm registers | 0 |
nb stack references | 8 |
micro-operation queue | 29.50 cycles |
front end | 29.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 25.25 | 25.25 | 5.50 | 5.50 | 0.00 | 25.25 | 25.25 | 0.00 |
cycles | 25.25 | 25.50 | 5.50 | 5.50 | 0.00 | 25.25 | 25.25 | 0.00 |
Cycles executing div or sqrt instructions | 30.00-96.00 |
FE+BE cycles | 30.36-96.36 |
Stall cycles | 15.56-81.56 |
ROB full (events) | 17.78-83.80 |
Front-end | 29.50 |
Dispatch | 25.50 |
DIV/SQRT | 30.00-96.00 |
Overall L1 | 30.00-96.00 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 50% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 33% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 75% |
all | 25% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 33% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 33% |
all | 10% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 10% |
all | 18% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 16% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 21% |
all | 14% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 16% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 9% |
other | 15% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
LEA 0x1(%R9),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R10,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %RAX,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JE 45950d <_ZNK14PopulationSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_RNS8_5FieldIdJNS1_9DirectionENS1_5GroupENS1_4ZoneEEEERNSC_IdJSD_EEERNSC_IdJSF_EEEPd.extracted+0x26d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0x50(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %R9,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
OR %R12,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
SHR $0x20,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
JE 459420 <_ZNK14PopulationSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_RNS8_5FieldIdJNS1_9DirectionENS1_5GroupENS1_4ZoneEEEERNSC_IdJSD_EEERNSC_IdJSF_EEEPd.extracted+0x180> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
IDIV %R12 | 57 | 14.25 | 14.25 | 0 | 0 | 0 | 14.25 | 14.25 | 0 | 42-95 | 24-90 |
JMP 459425 <_ZNK14PopulationSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_RNS8_5FieldIdJNS1_9DirectionENS1_5GroupENS1_4ZoneEEEERNSC_IdJSD_EEERNSC_IdJSF_EEEPd.extracted+0x185> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
DIV %R12D | 10 | 2.50 | 2.50 | 0 | 0 | 0 | 2.50 | 2.50 | 0 | 26 | 6 |
ADD -0x90(%RBP),%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
MOV -0x88(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%RSI,%RAX,8),%XMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
TEST %R11,%R11 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 4594c0 <_ZNK14PopulationSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_RNS8_5FieldIdJNS1_9DirectionENS1_5GroupENS1_4ZoneEEEERNSC_IdJSD_EEERNSC_IdJSF_EEEPd.extracted+0x220> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
LEA (%RBX,%RDX,1),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL -0x60(%RBP),%RSI | 1 | 0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R14,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %R8,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
IMUL %RAX,%RBX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %RSI,%RBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VBROADCASTSD %XMM0,%YMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
MOV -0x58(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RSI,%RBX,8),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VXORPD %XMM1,%XMM1,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VEXTRACTF128 $0x1,%YMM1,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VADDPD %XMM2,%XMM1,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VPERMILPD $0x1,%XMM1,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VADDSD %XMM2,%XMM1,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDSD %XMM1,%XMM4,%XMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R11,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CMP %R11,-0x80(%RBP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
MOV -0x48(%RBP),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x40(%RBP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
JE 4593f0 <_ZNK14PopulationSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_RNS8_5FieldIdJNS1_9DirectionENS1_5GroupENS1_4ZoneEEEERNSC_IdJSD_EEERNSC_IdJSF_EEEPd.extracted+0x150> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
JMP 4594c2 <_ZNK14PopulationSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_RNS8_5FieldIdJNS1_9DirectionENS1_5GroupENS1_4ZoneEEEERNSC_IdJSD_EEERNSC_IdJSF_EEEPd.extracted+0x222> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
ADD %RBX,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
IMUL -0x60(%RBP),%RDX | 1 | 0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
IMUL %R8,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R14,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %RDX,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RDX,%RAX,8),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 4593f0 <_ZNK14PopulationSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_RNS8_5FieldIdJNS1_9DirectionENS1_5GroupENS1_4ZoneEEEERNSC_IdJSD_EEERNSC_IdJSF_EEEPd.extracted+0x150> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
nb instructions | 53 |
nb uops | 118 |
loop length | 206 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 4 |
used ymm registers | 2 |
used zmm registers | 0 |
nb stack references | 8 |
micro-operation queue | 29.50 cycles |
front end | 29.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 25.25 | 25.25 | 5.50 | 5.50 | 0.00 | 25.25 | 25.25 | 0.00 |
cycles | 25.25 | 25.50 | 5.50 | 5.50 | 0.00 | 25.25 | 25.25 | 0.00 |
Cycles executing div or sqrt instructions | 30.00-96.00 |
FE+BE cycles | 30.36-96.36 |
Stall cycles | 15.56-81.56 |
ROB full (events) | 17.78-83.80 |
Front-end | 29.50 |
Dispatch | 25.50 |
DIV/SQRT | 30.00-96.00 |
Overall L1 | 30.00-96.00 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 50% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 33% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 75% |
all | 25% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 33% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 33% |
all | 10% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 10% |
all | 18% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 16% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 21% |
all | 14% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 16% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 9% |
other | 15% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
LEA 0x1(%R9),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R10,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %RAX,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JE 45950d <_ZNK14PopulationSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_RNS8_5FieldIdJNS1_9DirectionENS1_5GroupENS1_4ZoneEEEERNSC_IdJSD_EEERNSC_IdJSF_EEEPd.extracted+0x26d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0x50(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %R9,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
OR %R12,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
SHR $0x20,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
JE 459420 <_ZNK14PopulationSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_RNS8_5FieldIdJNS1_9DirectionENS1_5GroupENS1_4ZoneEEEERNSC_IdJSD_EEERNSC_IdJSF_EEEPd.extracted+0x180> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
IDIV %R12 | 57 | 14.25 | 14.25 | 0 | 0 | 0 | 14.25 | 14.25 | 0 | 42-95 | 24-90 |
JMP 459425 <_ZNK14PopulationSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_RNS8_5FieldIdJNS1_9DirectionENS1_5GroupENS1_4ZoneEEEERNSC_IdJSD_EEERNSC_IdJSF_EEEPd.extracted+0x185> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
DIV %R12D | 10 | 2.50 | 2.50 | 0 | 0 | 0 | 2.50 | 2.50 | 0 | 26 | 6 |
ADD -0x90(%RBP),%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
MOV -0x88(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%RSI,%RAX,8),%XMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
TEST %R11,%R11 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 4594c0 <_ZNK14PopulationSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_RNS8_5FieldIdJNS1_9DirectionENS1_5GroupENS1_4ZoneEEEERNSC_IdJSD_EEERNSC_IdJSF_EEEPd.extracted+0x220> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
LEA (%RBX,%RDX,1),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL -0x60(%RBP),%RSI | 1 | 0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R14,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %R8,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
IMUL %RAX,%RBX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %RSI,%RBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VBROADCASTSD %XMM0,%YMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
MOV -0x58(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RSI,%RBX,8),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VXORPD %XMM1,%XMM1,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VEXTRACTF128 $0x1,%YMM1,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VADDPD %XMM2,%XMM1,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VPERMILPD $0x1,%XMM1,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VADDSD %XMM2,%XMM1,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDSD %XMM1,%XMM4,%XMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R11,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CMP %R11,-0x80(%RBP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
MOV -0x48(%RBP),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x40(%RBP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
JE 4593f0 <_ZNK14PopulationSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_RNS8_5FieldIdJNS1_9DirectionENS1_5GroupENS1_4ZoneEEEERNSC_IdJSD_EEERNSC_IdJSF_EEEPd.extracted+0x150> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
JMP 4594c2 <_ZNK14PopulationSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_RNS8_5FieldIdJNS1_9DirectionENS1_5GroupENS1_4ZoneEEEERNSC_IdJSD_EEERNSC_IdJSF_EEEPd.extracted+0x222> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
ADD %RBX,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
IMUL -0x60(%RBP),%RDX | 1 | 0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
IMUL %R8,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R14,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %RDX,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RDX,%RAX,8),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 4593f0 <_ZNK14PopulationSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_RNS8_5FieldIdJNS1_9DirectionENS1_5GroupENS1_4ZoneEEEERNSC_IdJSD_EEERNSC_IdJSF_EEEPd.extracted+0x150> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |