Loop Id: 1484 | Module: exec | Source: SweepSubdomain.cpp:87-105 [...] | Coverage: 0.23% |
---|
Loop Id: 1484 | Module: exec | Source: SweepSubdomain.cpp:87-105 [...] | Coverage: 0.23% |
---|
0x48c9c0 ADD -0xc0(%RBP),%RSI |
0x48c9c7 MOV -0xb8(%RBP),%RAX |
0x48c9ce ADD %RAX,%R14 |
0x48c9d1 ADD %RAX,%R11 |
0x48c9d4 ADD %RAX,%R10 |
0x48c9d7 CMP -0xc8(%RBP),%R8 |
0x48c9de LEA 0x1(%R8),%R8 |
0x48c9e2 JE 48c540 |
0x48c9e8 CMPQ $0,-0x58(%RBP) |
0x48c9ed JLE 48c9c0 |
0x48c9ef MOV -0xb0(%RBP),%RAX |
0x48c9f6 VMOVSD (%RAX),%XMM1 |
0x48c9fa MOV -0xa8(%RBP),%R9 |
0x48ca01 IMUL %R8,%R9 |
0x48ca05 MOV -0x50(%RBP),%RAX |
0x48ca09 ADD %R9,%RAX |
0x48ca0c ADD -0x180(%RBP),%R9 |
0x48ca13 ADD -0x178(%RBP),%R9 |
0x48ca1a VMOVSD (%R12,%R9,8),%XMM0 |
0x48ca20 MOV -0x38(%RBP),%RCX |
0x48ca24 VMOVSD (%RCX),%XMM2 |
0x48ca28 MOV -0xe0(%RBP),%RCX |
0x48ca2f VMOVHPD (%RCX),%XMM2,%XMM2 |
0x48ca33 MOV -0xd8(%RBP),%RCX |
0x48ca3a VMOVSD (%RCX,%RAX,8),%XMM3 |
0x48ca3f MOV -0x198(%RBP),%RAX |
0x48ca46 VMOVHPD (%RAX),%XMM3,%XMM3 |
0x48ca4a VADDSD %XMM1,%XMM1,%XMM8 |
0x48ca4e VADDPD %XMM2,%XMM2,%XMM2 |
0x48ca52 VDIVPD %XMM3,%XMM2,%XMM2 |
0x48ca56 VPERMILPD $0x1,%XMM2,%XMM3 |
0x48ca5c XOR %EBX,%EBX |
0x48ca5e XOR %EDI,%EDI |
0x48ca60 MOV -0x58(%RBP),%RAX |
0x48ca64 MOV -0x188(%RBP),%RCX |
0x48ca6b NOPL (%RAX,%RAX,1) |
(1485) 0x48ca70 VDIVSD (%RCX,%RDI,1),%XMM8,%XMM4 |
(1485) 0x48ca75 VMOVSD (%R10,%RBX,1),%XMM5 |
(1485) 0x48ca7b VMOVSD (%R13,%RDI,1),%XMM6 |
(1485) 0x48ca82 VADDSD (%R11,%RBX,1),%XMM3,%XMM7 |
(1485) 0x48ca88 VFMADD231SD %XMM4,%XMM0,%XMM5 |
(1485) 0x48ca8d VMOVSD (%RSI,%RDI,1),%XMM1 |
(1485) 0x48ca92 VADDSD %XMM4,%XMM2,%XMM4 |
(1485) 0x48ca96 VFMADD231SD %XMM2,%XMM6,%XMM5 |
(1485) 0x48ca9b VADDSD %XMM4,%XMM7,%XMM4 |
(1485) 0x48ca9f VFMADD231SD %XMM3,%XMM1,%XMM5 |
(1485) 0x48caa4 VDIVSD %XMM4,%XMM5,%XMM4 |
(1485) 0x48caa8 VADDSD %XMM4,%XMM4,%XMM5 |
(1485) 0x48caac VSUBSD %XMM6,%XMM5,%XMM6 |
(1485) 0x48cab0 VMOVSD %XMM4,(%R14,%RBX,1) |
(1485) 0x48cab6 VSUBSD %XMM0,%XMM5,%XMM0 |
(1485) 0x48caba VMOVSD %XMM6,(%R13,%RDI,1) |
(1485) 0x48cac1 VSUBSD %XMM1,%XMM5,%XMM1 |
(1485) 0x48cac5 VMOVSD %XMM1,(%RSI,%RDI,1) |
(1485) 0x48caca ADD %R15,%RDI |
(1485) 0x48cacd ADD %RDX,%RBX |
(1485) 0x48cad0 DEC %RAX |
(1485) 0x48cad3 JNE 48ca70 |
0x48cad5 VMOVSD %XMM0,(%R12,%R9,8) |
0x48cadb JMP 48c9c0 |
/home/kcamus/qaas_runs/169-391-8990/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/loop/forall.hpp: 59 - 59 |
-------------------------------------------------------------------------------- |
59: for (decltype(distance_it) i = 0; i < distance_it; ++i) { |
/home/kcamus/qaas_runs/169-391-8990/intel/Kripke/build/Kripke/src/Kripke/Kernel/SweepSubdomain.cpp: 87 - 105 |
-------------------------------------------------------------------------------- |
87: double xcos_dxi = 2.0 * xcos(d) / dx(i); |
88: double ycos_dyj = 2.0 * ycos(d) / dy(j); |
[...] |
95: + psi_lf(d, g, j, k) * xcos_dxi |
96: + psi_fr(d, g, i, k) * ycos_dyj |
97: + psi_bo(d, g, i, j) * zcos_dzk) |
98: / (xcos_dxi + ycos_dyj + zcos_dzk + sigt(g, z)); |
99: |
100: psi(d, g, z) = psi_d_g_z; |
101: |
102: /* Apply diamond-difference relationships */ |
103: psi_lf(d, g, j, k) = 2.0 * psi_d_g_z - psi_lf(d, g, j, k); |
104: psi_fr(d, g, i, k) = 2.0 * psi_d_g_z - psi_fr(d, g, i, k); |
105: psi_bo(d, g, i, j) = 2.0 * psi_d_g_z - psi_bo(d, g, i, j); |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_fork_call | libiomp5.so | |
○ | __kmpc_fork_call | libiomp5.so | |
○ | void Kripke::DispatchHelper<Kr[...] | internal.hpp:345 | exec |
○ | Kripke::Kernel::sweepSubdomain[...] | ArchLayout.h:145 | exec |
○ | Kripke::SweepSolver(Kripke::Co[...] | SweepSolver.cpp:78 | exec |
○ | Kripke::SteadyStateSolver(Krip[...] | stl_vector.h:366 | exec |
○ | main | kripke.cpp:482 | exec |
○ | __libc_init_first | libc.so.6 |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.86 |
CQA speedup if FP arith vectorized | 1.68 |
CQA speedup if fully vectorized | 3.01 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.11 |
Bottlenecks | |
Function | void Kripke::DispatchHelper |
Source | forall.hpp:59-59,SweepSubdomain.cpp:87-105 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 6.50 |
CQA cycles if no scalar integer | 3.50 |
CQA cycles if FP arith vectorized | 3.88 |
CQA cycles if fully vectorized | 2.16 |
Front-end cycles | 6.00 |
DIV/SQRT cycles | 3.63 |
P0 cycles | 3.63 |
P1 cycles | 6.25 |
P2 cycles | 6.25 |
P3 cycles | 0.50 |
P4 cycles | 3.63 |
P5 cycles | 3.63 |
P6 cycles | 0.50 |
P7 cycles | 2.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 7.07 - 7.19 |
Stall cycles (UFS) | 0.85 - 0.99 |
Nb insns | 24.00 |
Nb uops | 24.00 |
Nb loads | 12.50 |
Nb stores | 0.50 |
Nb stack references | 9.00 |
FLOP/cycle | 0.38 |
Nb FLOP add-sub | 1.50 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 1.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 14.78 |
Bytes prefetched | 0.00 |
Bytes loaded | 100.00 |
Bytes stored | 4.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 0.00 |
Stride unknown | 4.50 |
Stride indirect | 0.50 |
Vectorization ratio all | 7.89 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 8.33 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | 100.00 |
Vectorization ratio other | 10.00 |
Vector-efficiency ratio all | 13.16 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 13.54 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | 25.00 |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 2.33 |
CQA speedup if FP arith vectorized | 2.00 |
CQA speedup if fully vectorized | 2.63 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.11 |
Bottlenecks | P2, P3, |
Function | void Kripke::DispatchHelper |
Source | forall.hpp:59-59,SweepSubdomain.cpp:87-105 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 10.50 |
CQA cycles if no scalar integer | 4.50 |
CQA cycles if FP arith vectorized | 5.25 |
CQA cycles if fully vectorized | 4.00 |
Front-end cycles | 9.50 |
DIV/SQRT cycles | 5.00 |
P0 cycles | 5.00 |
P1 cycles | 10.50 |
P2 cycles | 10.50 |
P3 cycles | 1.00 |
P4 cycles | 5.00 |
P5 cycles | 5.00 |
P6 cycles | 1.00 |
P7 cycles | 4.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 11.53 - 11.78 |
Stall cycles (UFS) | 1.71 - 1.98 |
Nb insns | 38.00 |
Nb uops | 38.00 |
Nb loads | 21.00 |
Nb stores | 1.00 |
Nb stack references | 14.00 |
FLOP/cycle | 0.48 |
Nb FLOP add-sub | 3.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 2.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 16.76 |
Bytes prefetched | 0.00 |
Bytes loaded | 168.00 |
Bytes stored | 8.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 0.00 |
Stride unknown | 9.00 |
Stride indirect | 1.00 |
Vectorization ratio all | 15.79 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 16.67 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | 100.00 |
Vectorization ratio other | 20.00 |
Vector-efficiency ratio all | 13.82 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 14.58 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | 25.00 |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.11 |
Bottlenecks | micro-operation queue, |
Function | void Kripke::DispatchHelper |
Source | forall.hpp:59-59,SweepSubdomain.cpp:87-105 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 2.50 |
CQA cycles if no scalar integer | 2.50 |
CQA cycles if FP arith vectorized | 2.50 |
CQA cycles if fully vectorized | 0.31 |
Front-end cycles | 2.50 |
DIV/SQRT cycles | 2.25 |
P0 cycles | 2.25 |
P1 cycles | 2.00 |
P2 cycles | 2.00 |
P3 cycles | 0.00 |
P4 cycles | 2.25 |
P5 cycles | 2.25 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 2.60 |
Stall cycles (UFS) | 0.00 |
Nb insns | 10.00 |
Nb uops | 10.00 |
Nb loads | 4.00 |
Nb stores | 0.00 |
Nb stack references | 4.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 12.80 |
Bytes prefetched | 0.00 |
Bytes loaded | 32.00 |
Bytes stored | 0.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | void Kripke::DispatchHelper |
Source file and lines | SweepSubdomain.cpp:87-105 |
Module | exec |
nb instructions | 24 |
nb uops | 24 |
loop length | 117 |
used x86 registers | 9.50 |
used mmx registers | 0 |
used xmm registers | 2.50 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 9 |
micro-operation queue | 6.00 cycles |
front end | 6.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 3.63 | 3.63 | 6.25 | 6.25 | 0.50 | 3.63 | 3.63 | 0.50 |
cycles | 3.63 | 3.63 | 6.25 | 6.25 | 0.50 | 3.63 | 3.63 | 0.50 |
Cycles executing div or sqrt instructions | 2.00 |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 7.06-7.19 |
Stall cycles | 0.85-0.99 |
LB full (events) | 1.71-1.97 |
Front-end | 6.00 |
Dispatch | 6.38 |
DIV/SQRT | 2.00 |
Data deps. | 1.00 |
Overall L1 | 6.50 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 27% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 100% |
other | 100% |
all | 7% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 8% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 100% |
other | 10% |
all | 11% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 10% |
all | 15% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 18% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 25% |
other | 25% |
all | 13% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 13% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 25% |
other | 12% |
Function | void Kripke::DispatchHelper |
Source file and lines | SweepSubdomain.cpp:87-105 |
Module | exec |
nb instructions | 38 |
nb uops | 38 |
loop length | 187 |
used x86 registers | 12 |
used mmx registers | 0 |
used xmm registers | 5 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 14 |
micro-operation queue | 9.50 cycles |
front end | 9.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 5.00 | 5.00 | 10.50 | 10.50 | 1.00 | 5.00 | 5.00 | 1.00 |
cycles | 5.00 | 5.00 | 10.50 | 10.50 | 1.00 | 5.00 | 5.00 | 1.00 |
Cycles executing div or sqrt instructions | 4.00 |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 11.53-11.78 |
Stall cycles | 1.71-1.98 |
LB full (events) | 3.41-3.93 |
Front-end | 9.50 |
Dispatch | 10.50 |
DIV/SQRT | 4.00 |
Data deps. | 1.00 |
Overall L1 | 10.50 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 27% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 100% |
other | 100% |
all | 15% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 16% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 100% |
other | 20% |
all | 10% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 9% |
all | 15% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 18% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 25% |
other | 25% |
all | 13% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 14% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 25% |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
ADD -0xc0(%RBP),%RSI | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %RAX,%R14 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %RAX,%R11 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %RAX,%R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP -0xc8(%RBP),%R8 | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
LEA 0x1(%R8),%R8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 48c540 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE9SweepSdomJRNS_4Core9DataStoreERNS_6SdomIdEEEEvT_RKT0_DpOT1_.extracted+0xa10> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMPQ $0,-0x58(%RBP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JLE 48c9c0 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE9SweepSdomJRNS_4Core9DataStoreERNS_6SdomIdEEEEvT_RKT0_DpOT1_.extracted+0xe90> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%RAX),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0xa8(%RBP),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
IMUL %R8,%R9 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x50(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %R9,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD -0x180(%RBP),%R9 | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
ADD -0x178(%RBP),%R9 | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
VMOVSD (%R12,%R9,8),%XMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x38(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%RCX),%XMM2 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0xe0(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVHPD (%RCX),%XMM2,%XMM2 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 4 | 1 |
MOV -0xd8(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%RCX,%RAX,8),%XMM3 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x198(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVHPD (%RAX),%XMM3,%XMM3 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 4 | 1 |
VADDSD %XMM1,%XMM1,%XMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDPD %XMM2,%XMM2,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVPD %XMM3,%XMM2,%XMM2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-14 | 4 |
VPERMILPD $0x1,%XMM2,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
XOR %EBX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV -0x58(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x188(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVSD %XMM0,(%R12,%R9,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JMP 48c9c0 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE9SweepSdomJRNS_4Core9DataStoreERNS_6SdomIdEEEEvT_RKT0_DpOT1_.extracted+0xe90> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
Function | void Kripke::DispatchHelper |
Source file and lines | SweepSubdomain.cpp:87-105 |
Module | exec |
nb instructions | 10 |
nb uops | 10 |
loop length | 47 |
used x86 registers | 7 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 4 |
micro-operation queue | 2.50 cycles |
front end | 2.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 2.25 | 2.25 | 2.00 | 2.00 | 0.00 | 2.25 | 2.25 | 0.00 |
cycles | 2.25 | 2.25 | 2.00 | 2.00 | 0.00 | 2.25 | 2.25 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 2.60 |
Stall cycles | 0.00 |
Front-end | 2.50 |
Dispatch | 2.25 |
Data deps. | 1.00 |
Overall L1 | 2.50 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
ADD -0xc0(%RBP),%RSI | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %RAX,%R14 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %RAX,%R11 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %RAX,%R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP -0xc8(%RBP),%R8 | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
LEA 0x1(%R8),%R8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 48c540 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE9SweepSdomJRNS_4Core9DataStoreERNS_6SdomIdEEEEvT_RKT0_DpOT1_.extracted+0xa10> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMPQ $0,-0x58(%RBP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JLE 48c9c0 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE9SweepSdomJRNS_4Core9DataStoreERNS_6SdomIdEEEEvT_RKT0_DpOT1_.extracted+0xe90> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |