Loop Id: 1483 | Module: exec | Source: forall.hpp:59-59 [...] | Coverage: 0.05% |
---|
Loop Id: 1483 | Module: exec | Source: forall.hpp:59-59 [...] | Coverage: 0.05% |
---|
0x48c540 MOV -0x48(%RBP),%RAX |
0x48c544 ADD -0x2c0(%RBP),%RAX |
0x48c54b MOV %RAX,-0x48(%RBP) |
0x48c54f MOV -0x2b8(%RBP),%RAX |
0x48c556 MOV -0x368(%RBP),%R15 |
0x48c55d ADD %RAX,%R15 |
0x48c560 MOV -0x360(%RBP),%R14 |
0x48c567 ADD %RAX,%R14 |
0x48c56a MOV -0x358(%RBP),%RBX |
0x48c571 ADD %RAX,%RBX |
0x48c574 MOV -0x350(%RBP),%RDX |
0x48c57b CMP -0x2f8(%RBP),%RDX |
0x48c582 LEA 0x1(%RDX),%RDX |
0x48c586 MOV -0x78(%RBP),%R13 |
0x48c58a MOV -0xb0(%RBP),%RSI |
0x48c591 JE 48c2c0 |
0x48c597 MOV %RSI,-0x430(%RBP) |
0x48c59e MOV %RSI,-0x428(%RBP) |
0x48c5a5 MOV -0x2e0(%RBP),%RAX |
0x48c5ac MOV %RAX,-0x420(%RBP) |
0x48c5b3 MOV -0x2d8(%RBP),%RAX |
0x48c5ba MOV %RAX,-0x418(%RBP) |
0x48c5c1 MOV -0x38(%RBP),%RAX |
0x48c5c5 MOV %RAX,-0x410(%RBP) |
0x48c5cc MOV %RAX,-0x408(%RBP) |
0x48c5d3 MOV -0x2d0(%RBP),%RAX |
0x48c5da MOV %RAX,-0x400(%RBP) |
0x48c5e1 MOV -0x2c8(%RBP),%RAX |
0x48c5e8 MOV %RAX,-0x3f8(%RBP) |
0x48c5ef MOV -0xe0(%RBP),%RAX |
0x48c5f6 MOV %RAX,-0x3f0(%RBP) |
0x48c5fd MOV %RAX,-0x3e8(%RBP) |
0x48c604 MOV -0x170(%RBP),%RCX |
0x48c60b MOV %RDX,-0x350(%RBP) |
0x48c612 IMUL %RDX,%RCX |
0x48c616 MOV -0xa0(%RBP),%RAX |
0x48c61d ADD %RCX,%RAX |
0x48c620 MOV -0x300(%RBP),%RDX |
0x48c627 LEA (%RDX,%RAX,8),%RAX |
0x48c62b MOV %RAX,-0x3e0(%RBP) |
0x48c632 MOV %RAX,-0x198(%RBP) |
0x48c639 MOV %RAX,-0x3d8(%RBP) |
0x48c640 MOV %RCX,%RDX |
0x48c643 IMUL -0x158(%RBP),%RDX |
0x48c64b MOV -0x348(%RBP),%RAX |
0x48c652 ADD %RDX,%RAX |
0x48c655 LEA (%R13,%RAX,8),%RAX |
0x48c65a MOV %RAX,-0x3d0(%RBP) |
0x48c661 MOV -0x330(%RBP),%RAX |
0x48c668 MOV %RDX,-0x180(%RBP) |
0x48c66f ADD %RDX,%RAX |
0x48c672 LEA (,%RAX,8),%RAX |
0x48c67a ADD %R13,%RAX |
0x48c67d MOV %RAX,-0x3c8(%RBP) |
0x48c684 MOV %RCX,%RAX |
0x48c687 IMUL -0x168(%RBP),%RAX |
0x48c68f MOV -0x2e8(%RBP),%RDX |
0x48c696 ADD %RAX,%RDX |
0x48c699 MOV -0x338(%RBP),%R8 |
0x48c6a0 LEA (%RDX,%R8,1),%RSI |
0x48c6a4 MOV -0x160(%RBP),%RDI |
0x48c6ab LEA (%RDI,%RSI,8),%RSI |
0x48c6af MOV %RSI,-0x3c0(%RBP) |
0x48c6b6 ADD -0x2f0(%RBP),%RAX |
0x48c6bd LEA (%RAX,%R8,1),%RSI |
0x48c6c1 LEA (%RDI,%RSI,8),%RSI |
0x48c6c5 MOV %RSI,-0x3b8(%RBP) |
0x48c6cc IMUL -0x150(%RBP),%RCX |
0x48c6d4 MOV -0x320(%RBP),%RSI |
0x48c6db ADD %RCX,%RSI |
0x48c6de MOV -0x148(%RBP),%RDI |
0x48c6e5 LEA (%RDI,%RSI,8),%RSI |
0x48c6e9 MOV %RSI,-0x3b0(%RBP) |
0x48c6f0 ADD -0x328(%RBP),%RCX |
0x48c6f7 LEA (%RDI,%RCX,8),%RCX |
0x48c6fb MOV %RCX,-0x3a8(%RBP) |
0x48c702 MOV -0x318(%RBP),%RCX |
0x48c709 MOV %RCX,-0x3a0(%RBP) |
0x48c710 MOV -0x310(%RBP),%RCX |
0x48c717 MOV %RCX,-0x398(%RBP) |
0x48c71e MOV -0x308(%RBP),%RDI |
0x48c725 LEA (%RDX,%RDI,1),%RCX |
0x48c729 MOV -0x140(%RBP),%RSI |
0x48c730 LEA (%RSI,%RCX,8),%RCX |
0x48c734 MOV %RCX,-0x390(%RBP) |
0x48c73b LEA (%RAX,%RDI,1),%RCX |
0x48c73f LEA (%RSI,%RCX,8),%RCX |
0x48c743 MOV %RCX,-0x388(%RBP) |
0x48c74a MOV -0x340(%RBP),%RDI |
0x48c751 ADD %RDI,%RDX |
0x48c754 MOV -0x138(%RBP),%RSI |
0x48c75b LEA (%RSI,%RDX,8),%RCX |
0x48c75f MOV %RCX,-0x380(%RBP) |
0x48c766 ADD %RDI,%RAX |
0x48c769 LEA (%RSI,%RAX,8),%RAX |
0x48c76d MOV %RAX,-0x378(%RBP) |
0x48c774 MOV $0xc,%ESI |
0x48c779 LEA -0x430(%RBP),%RDI |
0x48c780 CALL 4d8a70 <__intel_rtdd_indep> |
0x48c785 TEST %RAX,%RAX |
0x48c788 MOV %R15,-0x368(%RBP) |
0x48c78f MOV %R14,-0x360(%RBP) |
0x48c796 MOV %RBX,-0x358(%RBP) |
0x48c79d JE 48c980 |
0x48c7a3 MOV -0x2b0(%RBP),%RSI |
0x48c7aa MOVQ $0,-0xd0(%RBP) |
0x48c7b5 MOV -0x190(%RBP),%R8 |
0x48c7bc JMP 48c80b |
(1486) 0x48c7c0 ADD -0xc0(%RBP),%RSI |
(1486) 0x48c7c7 MOV -0xb8(%RBP),%RAX |
(1486) 0x48c7ce MOV -0x40(%RBP),%RDX |
(1486) 0x48c7d2 ADD %RAX,%RDX |
(1486) 0x48c7d5 MOV -0x80(%RBP),%RDI |
(1486) 0x48c7d9 ADD %RAX,%RDI |
(1486) 0x48c7dc MOV -0x60(%RBP),%RCX |
(1486) 0x48c7e0 ADD %RAX,%RCX |
(1486) 0x48c7e3 MOV -0xd0(%RBP),%RAX |
(1486) 0x48c7ea CMP -0xc8(%RBP),%RAX |
(1486) 0x48c7f1 LEA 0x1(%RAX),%RAX |
(1486) 0x48c7f5 MOV %RAX,-0xd0(%RBP) |
(1486) 0x48c7fc MOV %RCX,%RBX |
(1486) 0x48c7ff MOV %RDI,%R14 |
(1486) 0x48c802 MOV %RDX,%R15 |
(1486) 0x48c805 JE 48c540 |
(1486) 0x48c80b MOV %R15,-0x40(%RBP) |
(1486) 0x48c80f MOV %R14,-0x80(%RBP) |
(1486) 0x48c813 MOV %RBX,-0x60(%RBP) |
(1486) 0x48c817 CMPQ $0,-0x58(%RBP) |
(1486) 0x48c81c MOV -0x70(%RBP),%R10 |
(1486) 0x48c820 MOV -0x188(%RBP),%R14 |
(1486) 0x48c827 MOV -0x78(%RBP),%R9 |
(1486) 0x48c82b MOV -0xb0(%RBP),%RBX |
(1486) 0x48c832 MOV -0x38(%RBP),%RDI |
(1486) 0x48c836 JLE 48c7c0 |
(1486) 0x48c838 MOV -0xa8(%RBP),%RCX |
(1486) 0x48c83f IMUL -0xd0(%RBP),%RCX |
(1486) 0x48c847 MOV -0x50(%RBP),%RAX |
(1486) 0x48c84b ADD %RCX,%RAX |
(1486) 0x48c84e MOV %RAX,-0xe8(%RBP) |
(1486) 0x48c855 ADD -0x180(%RBP),%RCX |
(1486) 0x48c85c ADD -0x178(%RBP),%RCX |
(1486) 0x48c863 MOV %RCX,-0xf0(%RBP) |
(1486) 0x48c86a XOR %EAX,%EAX |
(1486) 0x48c86c XOR %ECX,%ECX |
(1486) 0x48c86e MOV -0x58(%RBP),%R12 |
(1486) 0x48c872 MOV -0x40(%RBP),%R13 |
(1486) 0x48c876 NOPW %CS:(%RAX,%RAX,1) |
(1487) 0x48c880 VMOVSD (%RBX),%XMM0 |
(1487) 0x48c884 VADDSD %XMM0,%XMM0,%XMM0 |
(1487) 0x48c888 VDIVSD (%R14,%RCX,1),%XMM0,%XMM0 |
(1487) 0x48c88e VMOVSD (%RDI),%XMM1 |
(1487) 0x48c892 MOV -0xe0(%RBP),%RDI |
(1487) 0x48c899 VMOVHPD (%RDI),%XMM1,%XMM1 |
(1487) 0x48c89d MOV -0xd8(%RBP),%RDI |
(1487) 0x48c8a4 MOV -0xe8(%RBP),%RDX |
(1487) 0x48c8ab VMOVSD (%RDI,%RDX,8),%XMM2 |
(1487) 0x48c8b0 MOV -0x198(%RBP),%RDI |
(1487) 0x48c8b7 VMOVHPD (%RDI),%XMM2,%XMM2 |
(1487) 0x48c8bb VADDPD %XMM1,%XMM1,%XMM1 |
(1487) 0x48c8bf VDIVPD %XMM2,%XMM1,%XMM1 |
(1487) 0x48c8c3 MOV -0xf0(%RBP),%RDX |
(1487) 0x48c8ca VMOVSD (%R9,%RDX,8),%XMM2 |
(1487) 0x48c8d0 MOV %RSI,%R9 |
(1487) 0x48c8d3 MOV %RBX,%RSI |
(1487) 0x48c8d6 MOV %R14,%RBX |
(1487) 0x48c8d9 MOV %R8,%R14 |
(1487) 0x48c8dc MOV %R10,%R11 |
(1487) 0x48c8df MOV -0x60(%RBP),%R15 |
(1487) 0x48c8e3 VFMADD213SD (%R15,%RAX,1),%XMM0,%XMM2 |
(1487) 0x48c8e9 MOV -0x80(%RBP),%R10 |
(1487) 0x48c8ed MOV %RBX,%R14 |
(1487) 0x48c8f0 MOV %RSI,%RBX |
(1487) 0x48c8f3 MOV -0x48(%RBP),%R15 |
(1487) 0x48c8f7 MOV %R9,%RSI |
(1487) 0x48c8fa MOV -0x78(%RBP),%R9 |
(1487) 0x48c8fe MOV -0x38(%RBP),%RDI |
(1487) 0x48c902 VFMADD231SD (%R15,%RCX,1),%XMM1,%XMM2 |
(1487) 0x48c908 VPERMILPD $0x1,%XMM1,%XMM3 |
(1487) 0x48c90e VFMADD231SD (%RSI,%RCX,1),%XMM3,%XMM2 |
(1487) 0x48c914 VADDSD %XMM0,%XMM1,%XMM0 |
(1487) 0x48c918 VADDSD (%R10,%RAX,1),%XMM3,%XMM1 |
(1487) 0x48c91e VADDSD %XMM0,%XMM1,%XMM0 |
(1487) 0x48c922 VDIVSD %XMM0,%XMM2,%XMM0 |
(1487) 0x48c926 VMOVSD %XMM0,(%R13,%RAX,1) |
(1487) 0x48c92d VADDSD %XMM0,%XMM0,%XMM0 |
(1487) 0x48c931 VSUBSD (%R9,%RDX,8),%XMM0,%XMM1 |
(1487) 0x48c937 VMOVSD %XMM1,(%R9,%RDX,8) |
(1487) 0x48c93d VSUBSD (%R15,%RCX,1),%XMM0,%XMM1 |
(1487) 0x48c943 VMOVSD %XMM1,(%R15,%RCX,1) |
(1487) 0x48c949 VSUBSD (%RSI,%RCX,1),%XMM0,%XMM0 |
(1487) 0x48c94e VMOVSD %XMM0,(%RSI,%RCX,1) |
(1487) 0x48c953 MOV %R11,%R10 |
(1487) 0x48c956 ADD %R11,%RCX |
(1487) 0x48c959 ADD %R8,%RAX |
(1487) 0x48c95c DEC %R12 |
(1487) 0x48c95f JNE 48c880 |
(1486) 0x48c965 JMP 48c7c0 |
0x48c980 MOV %RBX,%R10 |
0x48c983 MOV %R14,%R11 |
0x48c986 MOV %R15,%R14 |
0x48c989 MOV -0x2a8(%RBP),%RSI |
0x48c990 XOR %R8D,%R8D |
0x48c993 MOV -0x78(%RBP),%R12 |
0x48c997 MOV -0x70(%RBP),%R15 |
0x48c99b MOV -0x190(%RBP),%RDX |
0x48c9a2 MOV -0x48(%RBP),%R13 |
0x48c9a6 JMP 48c9e8 |
(1484) 0x48c9c0 ADD -0xc0(%RBP),%RSI |
(1484) 0x48c9c7 MOV -0xb8(%RBP),%RAX |
(1484) 0x48c9ce ADD %RAX,%R14 |
(1484) 0x48c9d1 ADD %RAX,%R11 |
(1484) 0x48c9d4 ADD %RAX,%R10 |
(1484) 0x48c9d7 CMP -0xc8(%RBP),%R8 |
(1484) 0x48c9de LEA 0x1(%R8),%R8 |
(1484) 0x48c9e2 JE 48c540 |
(1484) 0x48c9e8 CMPQ $0,-0x58(%RBP) |
(1484) 0x48c9ed JLE 48c9c0 |
(1484) 0x48c9ef MOV -0xb0(%RBP),%RAX |
(1484) 0x48c9f6 VMOVSD (%RAX),%XMM1 |
(1484) 0x48c9fa MOV -0xa8(%RBP),%R9 |
(1484) 0x48ca01 IMUL %R8,%R9 |
(1484) 0x48ca05 MOV -0x50(%RBP),%RAX |
(1484) 0x48ca09 ADD %R9,%RAX |
(1484) 0x48ca0c ADD -0x180(%RBP),%R9 |
(1484) 0x48ca13 ADD -0x178(%RBP),%R9 |
(1484) 0x48ca1a VMOVSD (%R12,%R9,8),%XMM0 |
(1484) 0x48ca20 MOV -0x38(%RBP),%RCX |
(1484) 0x48ca24 VMOVSD (%RCX),%XMM2 |
(1484) 0x48ca28 MOV -0xe0(%RBP),%RCX |
(1484) 0x48ca2f VMOVHPD (%RCX),%XMM2,%XMM2 |
(1484) 0x48ca33 MOV -0xd8(%RBP),%RCX |
(1484) 0x48ca3a VMOVSD (%RCX,%RAX,8),%XMM3 |
(1484) 0x48ca3f MOV -0x198(%RBP),%RAX |
(1484) 0x48ca46 VMOVHPD (%RAX),%XMM3,%XMM3 |
(1484) 0x48ca4a VADDSD %XMM1,%XMM1,%XMM8 |
(1484) 0x48ca4e VADDPD %XMM2,%XMM2,%XMM2 |
(1484) 0x48ca52 VDIVPD %XMM3,%XMM2,%XMM2 |
(1484) 0x48ca56 VPERMILPD $0x1,%XMM2,%XMM3 |
(1484) 0x48ca5c XOR %EBX,%EBX |
(1484) 0x48ca5e XOR %EDI,%EDI |
(1484) 0x48ca60 MOV -0x58(%RBP),%RAX |
(1484) 0x48ca64 MOV -0x188(%RBP),%RCX |
(1484) 0x48ca6b NOPL (%RAX,%RAX,1) |
(1485) 0x48ca70 VDIVSD (%RCX,%RDI,1),%XMM8,%XMM4 |
(1485) 0x48ca75 VMOVSD (%R10,%RBX,1),%XMM5 |
(1485) 0x48ca7b VMOVSD (%R13,%RDI,1),%XMM6 |
(1485) 0x48ca82 VADDSD (%R11,%RBX,1),%XMM3,%XMM7 |
(1485) 0x48ca88 VFMADD231SD %XMM4,%XMM0,%XMM5 |
(1485) 0x48ca8d VMOVSD (%RSI,%RDI,1),%XMM1 |
(1485) 0x48ca92 VADDSD %XMM4,%XMM2,%XMM4 |
(1485) 0x48ca96 VFMADD231SD %XMM2,%XMM6,%XMM5 |
(1485) 0x48ca9b VADDSD %XMM4,%XMM7,%XMM4 |
(1485) 0x48ca9f VFMADD231SD %XMM3,%XMM1,%XMM5 |
(1485) 0x48caa4 VDIVSD %XMM4,%XMM5,%XMM4 |
(1485) 0x48caa8 VADDSD %XMM4,%XMM4,%XMM5 |
(1485) 0x48caac VSUBSD %XMM6,%XMM5,%XMM6 |
(1485) 0x48cab0 VMOVSD %XMM4,(%R14,%RBX,1) |
(1485) 0x48cab6 VSUBSD %XMM0,%XMM5,%XMM0 |
(1485) 0x48caba VMOVSD %XMM6,(%R13,%RDI,1) |
(1485) 0x48cac1 VSUBSD %XMM1,%XMM5,%XMM1 |
(1485) 0x48cac5 VMOVSD %XMM1,(%RSI,%RDI,1) |
(1485) 0x48caca ADD %R15,%RDI |
(1485) 0x48cacd ADD %RDX,%RBX |
(1485) 0x48cad0 DEC %RAX |
(1485) 0x48cad3 JNE 48ca70 |
(1484) 0x48cad5 VMOVSD %XMM0,(%R12,%R9,8) |
(1484) 0x48cadb JMP 48c9c0 |
/home/kcamus/qaas_runs/169-391-8990/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/loop/forall.hpp: 59 - 59 |
-------------------------------------------------------------------------------- |
59: for (decltype(distance_it) i = 0; i < distance_it; ++i) { |
/home/kcamus/qaas_runs/169-391-8990/intel/Kripke/build/Kripke/src/Kripke/Kernel/SweepSubdomain.cpp: 87 - 105 |
-------------------------------------------------------------------------------- |
87: double xcos_dxi = 2.0 * xcos(d) / dx(i); |
88: double ycos_dyj = 2.0 * ycos(d) / dy(j); |
89: double zcos_dzk = 2.0 * zcos(d) / dz(k); |
[...] |
95: + psi_lf(d, g, j, k) * xcos_dxi |
96: + psi_fr(d, g, i, k) * ycos_dyj |
97: + psi_bo(d, g, i, j) * zcos_dzk) |
98: / (xcos_dxi + ycos_dyj + zcos_dzk + sigt(g, z)); |
99: |
100: psi(d, g, z) = psi_d_g_z; |
101: |
102: /* Apply diamond-difference relationships */ |
103: psi_lf(d, g, j, k) = 2.0 * psi_d_g_z - psi_lf(d, g, j, k); |
104: psi_fr(d, g, i, k) = 2.0 * psi_d_g_z - psi_fr(d, g, i, k); |
105: psi_bo(d, g, i, j) = 2.0 * psi_d_g_z - psi_bo(d, g, i, j); |
/home/kcamus/qaas_runs/169-391-8990/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/View.hpp: 110 - 110 |
-------------------------------------------------------------------------------- |
110: return data[idx]; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_fork_call | libiomp5.so | |
○ | __kmpc_fork_call | libiomp5.so | |
○ | void Kripke::DispatchHelper<Kr[...] | internal.hpp:345 | exec |
○ | Kripke::Kernel::sweepSubdomain[...] | ArchLayout.h:145 | exec |
○ | Kripke::SweepSolver(Kripke::Co[...] | SweepSolver.cpp:78 | exec |
○ | Kripke::SteadyStateSolver(Krip[...] | stl_vector.h:366 | exec |
○ | main | kripke.cpp:482 | exec |
○ | __libc_init_first | libc.so.6 |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.13 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.16 |
Bottlenecks | |
Function | void Kripke::DispatchHelper |
Source | forall.hpp:59-59,SweepSubdomain.cpp:87-105,View.hpp:110-110 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 32.50 |
CQA cycles if no scalar integer | 32.50 |
CQA cycles if FP arith vectorized | 32.50 |
CQA cycles if fully vectorized | 4.00 |
Front-end cycles | 28.00 |
DIV/SQRT cycles | 10.50 |
P0 cycles | 16.75 |
P1 cycles | 24.42 |
P2 cycles | 24.25 |
P3 cycles | 32.50 |
P4 cycles | 10.50 |
P5 cycles | 10.50 |
P6 cycles | 24.33 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | 0 |
FE+BE cycles (UFS) | 31.64 |
Stall cycles (UFS) | 3.44 |
Nb insns | 111.00 |
Nb uops | 112.00 |
Nb loads | 40.50 |
Nb stores | 31.50 |
Nb stack references | 66.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 17.73 |
Bytes prefetched | 0.00 |
Bytes loaded | 324.00 |
Bytes stored | 252.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 0.50 |
Stride unknown | 4.50 |
Stride indirect | 0.00 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.42 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.40 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.11 |
Bottlenecks | P4, |
Function | void Kripke::DispatchHelper |
Source | forall.hpp:59-59,SweepSubdomain.cpp:87-105,View.hpp:110-110 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 32.00 |
CQA cycles if no scalar integer | 32.00 |
CQA cycles if FP arith vectorized | 32.00 |
CQA cycles if fully vectorized | 4.00 |
Front-end cycles | 28.75 |
DIV/SQRT cycles | 10.50 |
P0 cycles | 16.75 |
P1 cycles | 24.67 |
P2 cycles | 24.67 |
P3 cycles | 32.00 |
P4 cycles | 10.50 |
P5 cycles | 10.50 |
P6 cycles | 24.67 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | 0 |
FE+BE cycles (UFS) | 31.15 |
Stall cycles (UFS) | 2.21 |
Nb insns | 114.00 |
Nb uops | 115.00 |
Nb loads | 42.00 |
Nb stores | 31.00 |
Nb stack references | 66.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 18.25 |
Bytes prefetched | 0.00 |
Bytes loaded | 336.00 |
Bytes stored | 248.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 9.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.25 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.21 |
Bottlenecks | P4, |
Function | void Kripke::DispatchHelper |
Source | forall.hpp:59-59,SweepSubdomain.cpp:87-105,View.hpp:110-110 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 33.00 |
CQA cycles if no scalar integer | 33.00 |
CQA cycles if FP arith vectorized | 33.00 |
CQA cycles if fully vectorized | 4.00 |
Front-end cycles | 27.25 |
DIV/SQRT cycles | 10.50 |
P0 cycles | 16.75 |
P1 cycles | 24.17 |
P2 cycles | 23.83 |
P3 cycles | 33.00 |
P4 cycles | 10.50 |
P5 cycles | 10.50 |
P6 cycles | 24.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | 0 |
FE+BE cycles (UFS) | 32.13 |
Stall cycles (UFS) | 4.68 |
Nb insns | 108.00 |
Nb uops | 109.00 |
Nb loads | 39.00 |
Nb stores | 32.00 |
Nb stack references | 66.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 17.21 |
Bytes prefetched | 0.00 |
Bytes loaded | 312.00 |
Bytes stored | 256.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.34 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.30 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | void Kripke::DispatchHelper |
Source file and lines | forall.hpp:59-59 |
Module | exec |
nb instructions | 111 |
nb uops | 112 |
loop length | 644.50 |
used x86 registers | 12.50 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 66 |
micro-operation queue | 28.00 cycles |
front end | 28.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 10.50 | 10.50 | 24.42 | 24.25 | 32.50 | 10.50 | 10.50 | 24.33 |
cycles | 10.50 | 16.75 | 24.42 | 24.25 | 32.50 | 10.50 | 10.50 | 24.33 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 0.00 |
FE+BE cycles | 31.64 |
Stall cycles | 3.44 |
LB full (events) | 1.32 |
SB full (events) | 4.21 |
Front-end | 28.00 |
Dispatch | 32.50 |
Data deps. | 0.00 |
Overall L1 | 32.50 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Function | void Kripke::DispatchHelper |
Source file and lines | forall.hpp:59-59 |
Module | exec |
nb instructions | 114 |
nb uops | 115 |
loop length | 651 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 66 |
micro-operation queue | 28.75 cycles |
front end | 28.75 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 10.50 | 10.50 | 24.67 | 24.67 | 32.00 | 10.50 | 10.50 | 24.67 |
cycles | 10.50 | 16.75 | 24.67 | 24.67 | 32.00 | 10.50 | 10.50 | 24.67 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 0.00 |
FE+BE cycles | 31.15 |
Stall cycles | 2.21 |
LB full (events) | 2.65 |
Front-end | 28.75 |
Dispatch | 32.00 |
Data deps. | 0.00 |
Overall L1 | 32.00 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD -0x2c0(%RBP),%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
MOV %RAX,-0x48(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x2b8(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x368(%RBP),%R15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %RAX,%R15 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV -0x360(%RBP),%R14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %RAX,%R14 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV -0x358(%RBP),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %RAX,%RBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV -0x350(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP -0x2f8(%RBP),%RDX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
LEA 0x1(%RDX),%RDX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x78(%RBP),%R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0xb0(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
JE 48c2c0 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE9SweepSdomJRNS_4Core9DataStoreERNS_6SdomIdEEEEvT_RKT0_DpOT1_.extracted+0x790> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %RSI,-0x430(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RSI,-0x428(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x2e0(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x420(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x2d8(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x418(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x38(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x410(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RAX,-0x408(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x2d0(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x400(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x2c8(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x3f8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0xe0(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x3f0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RAX,-0x3e8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x170(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RDX,-0x350(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
IMUL %RDX,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %RCX,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV -0x300(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RDX,%RAX,8),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,-0x3e0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RAX,-0x198(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RAX,-0x3d8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RCX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
IMUL -0x158(%RBP),%RDX | 1 | 0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x348(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %RDX,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
LEA (%R13,%RAX,8),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,-0x3d0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x330(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RDX,-0x180(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
ADD %RDX,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
LEA (,%RAX,8),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R13,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %RAX,-0x3c8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RCX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
IMUL -0x168(%RBP),%RAX | 1 | 0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x2e8(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %RAX,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV -0x338(%RBP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RDX,%R8,1),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x160(%RBP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RDI,%RSI,8),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,-0x3c0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
ADD -0x2f0(%RBP),%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
LEA (%RAX,%R8,1),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RDI,%RSI,8),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,-0x3b8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
IMUL -0x150(%RBP),%RCX | 1 | 0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x320(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %RCX,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV -0x148(%RBP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RDI,%RSI,8),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,-0x3b0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
ADD -0x328(%RBP),%RCX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
LEA (%RDI,%RCX,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x3a8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x318(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RCX,-0x3a0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x310(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RCX,-0x398(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x308(%RBP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RDX,%RDI,1),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x140(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RSI,%RCX,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x390(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA (%RAX,%RDI,1),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RSI,%RCX,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x388(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x340(%RBP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %RDI,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV -0x138(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RSI,%RDX,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x380(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
ADD %RDI,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
LEA (%RSI,%RAX,8),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,-0x378(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV $0xc,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
LEA -0x430(%RBP),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 4d8a70 <__intel_rtdd_indep> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
TEST %RAX,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %R15,-0x368(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R14,-0x360(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RBX,-0x358(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JE 48c980 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE9SweepSdomJRNS_4Core9DataStoreERNS_6SdomIdEEEEvT_RKT0_DpOT1_.extracted+0xe50> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %RBX,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R14,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R15,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV -0x2a8(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV -0x78(%RBP),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x70(%RBP),%R15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x190(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x48(%RBP),%R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
JMP 48c9e8 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE9SweepSdomJRNS_4Core9DataStoreERNS_6SdomIdEEEEvT_RKT0_DpOT1_.extracted+0xeb8> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
Function | void Kripke::DispatchHelper |
Source file and lines | forall.hpp:59-59 |
Module | exec |
nb instructions | 108 |
nb uops | 109 |
loop length | 638 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 66 |
micro-operation queue | 27.25 cycles |
front end | 27.25 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 10.50 | 10.50 | 24.17 | 23.83 | 33.00 | 10.50 | 10.50 | 24.00 |
cycles | 10.50 | 16.75 | 24.17 | 23.83 | 33.00 | 10.50 | 10.50 | 24.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 0.00 |
FE+BE cycles | 32.13 |
Stall cycles | 4.68 |
SB full (events) | 8.42 |
Front-end | 27.25 |
Dispatch | 33.00 |
Data deps. | 0.00 |
Overall L1 | 33.00 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD -0x2c0(%RBP),%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
MOV %RAX,-0x48(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x2b8(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x368(%RBP),%R15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %RAX,%R15 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV -0x360(%RBP),%R14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %RAX,%R14 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV -0x358(%RBP),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %RAX,%RBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV -0x350(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP -0x2f8(%RBP),%RDX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
LEA 0x1(%RDX),%RDX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x78(%RBP),%R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0xb0(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
JE 48c2c0 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE9SweepSdomJRNS_4Core9DataStoreERNS_6SdomIdEEEEvT_RKT0_DpOT1_.extracted+0x790> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %RSI,-0x430(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RSI,-0x428(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x2e0(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x420(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x2d8(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x418(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x38(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x410(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RAX,-0x408(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x2d0(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x400(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x2c8(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x3f8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0xe0(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x3f0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RAX,-0x3e8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x170(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RDX,-0x350(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
IMUL %RDX,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %RCX,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV -0x300(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RDX,%RAX,8),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,-0x3e0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RAX,-0x198(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RAX,-0x3d8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RCX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
IMUL -0x158(%RBP),%RDX | 1 | 0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x348(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %RDX,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
LEA (%R13,%RAX,8),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,-0x3d0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x330(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RDX,-0x180(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
ADD %RDX,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
LEA (,%RAX,8),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R13,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %RAX,-0x3c8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RCX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
IMUL -0x168(%RBP),%RAX | 1 | 0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x2e8(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %RAX,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV -0x338(%RBP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RDX,%R8,1),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x160(%RBP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RDI,%RSI,8),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,-0x3c0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
ADD -0x2f0(%RBP),%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
LEA (%RAX,%R8,1),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RDI,%RSI,8),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,-0x3b8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
IMUL -0x150(%RBP),%RCX | 1 | 0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x320(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %RCX,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV -0x148(%RBP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RDI,%RSI,8),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,-0x3b0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
ADD -0x328(%RBP),%RCX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
LEA (%RDI,%RCX,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x3a8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x318(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RCX,-0x3a0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x310(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RCX,-0x398(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x308(%RBP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RDX,%RDI,1),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x140(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RSI,%RCX,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x390(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA (%RAX,%RDI,1),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RSI,%RCX,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x388(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x340(%RBP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %RDI,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV -0x138(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RSI,%RDX,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x380(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
ADD %RDI,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
LEA (%RSI,%RAX,8),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,-0x378(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV $0xc,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
LEA -0x430(%RBP),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 4d8a70 <__intel_rtdd_indep> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
TEST %RAX,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %R15,-0x368(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R14,-0x360(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RBX,-0x358(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JE 48c980 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE9SweepSdomJRNS_4Core9DataStoreERNS_6SdomIdEEEEvT_RKT0_DpOT1_.extracted+0xe50> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0x2b0(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOVQ $0,-0xd0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 |
MOV -0x190(%RBP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
JMP 48c80b <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE9SweepSdomJRNS_4Core9DataStoreERNS_6SdomIdEEEEvT_RKT0_DpOT1_.extracted+0xcdb> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |