Loop Id: 173 | Module: exec | Source: advec_mom_kernel.f90:81-241 [...] | Coverage: 0.03% |
---|
Loop Id: 173 | Module: exec | Source: advec_mom_kernel.f90:81-241 [...] | Coverage: 0.03% |
---|
0x430740 VPMULLQ %YMM26,%YMM1,%YMM7 |
0x430746 VPADDQ %YMM27,%YMM0,%YMM8 |
0x43074c VPADDQ %YMM7,%YMM8,%YMM7 |
0x430750 VPXOR %XMM8,%XMM8,%XMM8 |
0x430755 KMOVQ %K1,%K4 |
0x43075a VGATHERQPD (,%YMM7,1),%YMM8{%K4} |
0x430765 VANDPD %YMM10,%YMM21,%YMM7 |
0x43076b VMOVAPD %YMM8,%YMM16{%K1} |
0x430771 VMOVAPD %YMM16,0x1e0(%RSP) |
0x430779 VDIVPD %YMM16,%YMM7,%YMM7 |
0x43077f VMOVDQA32 %XMM23,%XMM22{%K2} |
0x430785 VANDPD %YMM10,%YMM28,%YMM8 |
0x43078b VANDPD %YMM10,%YMM24,%YMM16 |
0x430791 VSUBPD %YMM7,%YMM11,%YMM17 |
0x430797 VMULPD %YMM17,%YMM16,%YMM17 |
0x43079d VDIVSD %XMM25,%XMM12,%XMM18 |
0x4307a3 VBROADCASTSD %XMM18,%YMM18 |
0x4307a9 VCMPPD $0x2,%YMM16,%YMM8,%K2 |
0x4307b0 VMOVAPD %YMM8,%YMM16{%K2} |
0x4307b6 VFMADD213PD %YMM8,%YMM7,%YMM8 |
0x4307bb VPMOVSXDQ %XMM22,%YMM22 |
0x4307c1 VPSUBQ %YMM3,%YMM22,%YMM22 |
0x4307c7 VPXORD %XMM23,%XMM23,%XMM23 |
0x4307cd KMOVQ %K3,%K2 |
0x4307d2 VGATHERQPD (%R15,%YMM22,8),%YMM23{%K2} |
0x4307d9 VMOVAPD %YMM23,%YMM30{%K3} |
0x4307df VDIVPD %YMM30,%YMM8,%YMM8 |
0x4307e5 VFMADD231PD %YMM18,%YMM17,%YMM8 |
0x4307eb VMULSD %XMM14,%XMM25,%XMM17 |
0x4307f1 VBROADCASTSD %XMM17,%YMM17 |
0x4307f7 VMULPD %YMM8,%YMM17,%YMM8 |
0x4307fd VCMPPD $0x2,%YMM16,%YMM8,%K2 |
0x430804 VMOVAPD %YMM8,%YMM16{%K2} |
0x43080a VCMPPD $0x2,%YMM9,%YMM24,%K2 |
0x430811 VXORPD %YMM15,%YMM16,%YMM16{%K2} |
0x430817 VMOVAPD %YMM16,%YMM8{%K3}{z} |
0x43081d VSUBPD %YMM7,%YMM13,%YMM7 |
0x430821 VFMADD213PD %YMM19,%YMM8,%YMM7 |
0x430827 VMULPD %YMM21,%YMM7,%YMM7 |
0x43082d IMUL %R8,%RSI |
0x430831 ADD 0x128(%RSP),%RSI |
0x430839 VMOVUPD %YMM7,(%RSI,%RDX,8){%K1} |
0x430840 LEA 0x1(%R12),%RDX |
0x430845 ADD %R8,%R14 |
0x430848 ADD %RCX,%R13 |
0x43084b CMP %RAX,%R12 |
0x43084e MOV %RDX,%R12 |
0x430851 JE 42d936 |
0x430857 TEST %R9,%R9 |
0x43085a JE 430ae0 |
0x430860 VMOVAPS %YMM31,0x1c0(%RSP) |
0x430868 VMOVAPS %YMM20,0x240(%RSP) |
0x430870 VMOVAPD %YMM30,%YMM20 |
0x430876 MOV 0x10(%RSP),%RDX |
0x43087b LEA (%RDX,%R12,1),%RSI |
0x43087f DEC %RSI |
0x430882 VPBROADCASTD %ESI,%XMM25 |
0x430888 SUB %R10,%RSI |
0x43088b MOV %RCX,%R11 |
0x43088e IMUL %RSI,%R11 |
0x430892 LEA (%RBX,%R12,1),%EDX |
0x430896 LEA (%RBX,%R12,1),%R15D |
0x43089a INC %R15D |
0x43089d VPBROADCASTD %R15D,%XMM24 |
0x4308a3 LEA (%RBX,%R12,1),%R15D |
0x4308a7 ADD $-0x2,%R15D |
0x4308ab VPBROADCASTD %R15D,%XMM22 |
0x4308b1 VPBROADCASTD %EDX,%XMM23 |
0x4308b7 XOR %EDX,%EDX |
0x4308b9 MOV 0xd8(%RSP),%R15 |
0x4308c1 JMP 4309bd |
(174) 0x4308d0 VANDPD %YMM10,%YMM26,%YMM7 |
(174) 0x4308d6 VPMULLQ %YMM30,%YMM1,%YMM30 |
(174) 0x4308dc VPADDQ %YMM31,%YMM0,%YMM31 |
(174) 0x4308e2 VPADDQ %YMM30,%YMM31,%YMM30 |
(174) 0x4308e8 VPXORD %XMM31,%XMM31,%XMM31 |
(174) 0x4308ee KXNORW %K0,%K0,%K3 |
(174) 0x4308f2 VGATHERQPD (,%YMM30,1),%YMM31{%K3} |
(174) 0x4308fd VDIVPD %YMM31,%YMM7,%YMM7 |
(174) 0x430903 VPBLENDMD %XMM23,%XMM22,%XMM30{%K1} |
(174) 0x430909 VANDPD %YMM10,%YMM8,%YMM8 |
(174) 0x43090e VANDPD %YMM10,%YMM28,%YMM31 |
(174) 0x430914 VSUBPD %YMM7,%YMM11,%YMM16 |
(174) 0x43091a VMULPD %YMM16,%YMM31,%YMM16 |
(174) 0x430920 VDIVSD %XMM29,%XMM12,%XMM17 |
(174) 0x430926 VBROADCASTSD %XMM17,%YMM17 |
(174) 0x43092c VCMPPD $0x2,%YMM31,%YMM8,%K1 |
(174) 0x430933 VMOVAPD %YMM8,%YMM31{%K1} |
(174) 0x430939 VPMOVSXDQ %XMM30,%YMM30 |
(174) 0x43093f VPSUBQ %YMM3,%YMM30,%YMM30 |
(174) 0x430945 KMOVQ %K2,%K1 |
(174) 0x43094a VXORPD %XMM18,%XMM18,%XMM18 |
(174) 0x430950 VGATHERQPD (%R15,%YMM30,8),%YMM18{%K1} |
(174) 0x430957 VFMADD213PD %YMM8,%YMM7,%YMM8 |
(174) 0x43095c VDIVPD %YMM18,%YMM8,%YMM8 |
(174) 0x430962 VFMADD231PD %YMM17,%YMM16,%YMM8 |
(174) 0x430968 VMULSD %XMM14,%XMM29,%XMM16 |
(174) 0x43096e VBROADCASTSD %XMM16,%YMM16 |
(174) 0x430974 VMULPD %YMM8,%YMM16,%YMM8 |
(174) 0x43097a VCMPPD $0x2,%YMM31,%YMM8,%K1 |
(174) 0x430981 VMOVAPD %YMM8,%YMM31{%K1} |
(174) 0x430987 VCMPPD $0x2,%YMM9,%YMM28,%K1 |
(174) 0x43098e VXORPD %YMM15,%YMM31,%YMM31{%K1} |
(174) 0x430994 VMOVAPD %YMM31,%YMM8{%K2}{z} |
(174) 0x43099a VSUBPD %YMM7,%YMM13,%YMM7 |
(174) 0x43099e VFMADD213PD %YMM27,%YMM8,%YMM7 |
(174) 0x4309a4 VMULPD %YMM26,%YMM7,%YMM7 |
(174) 0x4309aa VMOVUPD %YMM7,(%R14,%RDX,8) |
(174) 0x4309b0 ADD $0x4,%RDX |
(174) 0x4309b4 CMP %R9,%RDX |
(174) 0x4309b7 JGE 430ab0 |
(174) 0x4309bd VMOVUPD (%R13,%RDX,8),%YMM26 |
(174) 0x4309c5 VCMPPD $0x1,%YMM9,%YMM26,%K1 |
(174) 0x4309cc VPBLENDMD %XMM23,%XMM25,%XMM8{%K1} |
(174) 0x4309d2 VPMOVSXDQ %XMM8,%YMM8 |
(174) 0x4309d7 VPSUBQ %YMM3,%YMM8,%YMM30 |
(174) 0x4309dd VPBROADCASTQ %RDX,%YMM8 |
(174) 0x4309e3 VPADDQ %YMM2,%YMM8,%YMM8 |
(174) 0x4309e7 VPSUBQ %YMM4,%YMM8,%YMM8 |
(174) 0x4309eb VPSLLQ $0x3,%YMM8,%YMM31 |
(174) 0x4309f2 VPMULLQ %YMM30,%YMM6,%YMM8 |
(174) 0x4309f8 VPADDQ %YMM31,%YMM5,%YMM28 |
(174) 0x4309fe VPADDQ %YMM8,%YMM28,%YMM8 |
(174) 0x430a04 VXORPD %XMM27,%XMM27,%XMM27 |
(174) 0x430a0a KXNORW %K0,%K0,%K2 |
(174) 0x430a0e VGATHERQPD (,%YMM8,1),%YMM27{%K2} |
(174) 0x430a19 VPBLENDMD %XMM24,%XMM22,%XMM8{%K1} |
(174) 0x430a1f VPBLENDMD %XMM25,%XMM23,%XMM29{%K1} |
(174) 0x430a25 VPMOVSXDQ %XMM8,%YMM8 |
(174) 0x430a2a VPSUBQ %YMM3,%YMM8,%YMM8 |
(174) 0x430a2e VPMULLQ %YMM8,%YMM6,%YMM8 |
(174) 0x430a34 VPADDQ %YMM8,%YMM28,%YMM8 |
(174) 0x430a3a VXORPD %XMM7,%XMM7,%XMM7 |
(174) 0x430a3e KXNORW %K0,%K0,%K2 |
(174) 0x430a42 VGATHERQPD (,%YMM8,1),%YMM7{%K2} |
(174) 0x430a4d VPMOVSXDQ %XMM29,%YMM8 |
(174) 0x430a53 VPSUBQ %YMM3,%YMM8,%YMM8 |
(174) 0x430a57 VPMULLQ %YMM8,%YMM6,%YMM8 |
(174) 0x430a5d VPADDQ %YMM8,%YMM28,%YMM8 |
(174) 0x430a63 VPXORD %XMM28,%XMM28,%XMM28 |
(174) 0x430a69 KXNORW %K0,%K0,%K2 |
(174) 0x430a6d VGATHERQPD (,%YMM8,1),%YMM28{%K2} |
(174) 0x430a78 VSUBPD %YMM7,%YMM27,%YMM8 |
(174) 0x430a7e VSUBPD %YMM27,%YMM28,%YMM28 |
(174) 0x430a84 VMULPD %YMM8,%YMM28,%YMM7 |
(174) 0x430a8a VCMPPD $0x1,%YMM7,%YMM9,%K2 |
(174) 0x430a91 KORTESTB %K2,%K2 |
(174) 0x430a95 JE 4308d0 |
(174) 0x430a9b VMOVSD (%R15,%RSI,8),%XMM29 |
(174) 0x430aa2 JMP 4308d0 |
0x430ab0 MOV %R9,%RDX |
0x430ab3 CMP %R9,0x30(%RSP) |
0x430ab8 VMOVAPD %YMM20,%YMM30 |
0x430abe VMOVAPD 0x240(%RSP),%YMM20 |
0x430ac6 VMOVAPD 0x1c0(%RSP),%YMM31 |
0x430ace JE 430840 |
0x430ad4 JMP 430b2b |
0x430ae0 MOV 0x10(%RSP),%RDX |
0x430ae5 LEA (%RDX,%R12,1),%RSI |
0x430ae9 DEC %RSI |
0x430aec VPBROADCASTD %ESI,%XMM25 |
0x430af2 SUB %R10,%RSI |
0x430af5 MOV %RCX,%R11 |
0x430af8 IMUL %RSI,%R11 |
0x430afc LEA (%RBX,%R12,1),%EDX |
0x430b00 LEA (%RBX,%R12,1),%R15D |
0x430b04 INC %R15D |
0x430b07 VPBROADCASTD %R15D,%XMM24 |
0x430b0d LEA (%RBX,%R12,1),%R15D |
0x430b11 ADD $-0x2,%R15D |
0x430b15 VPBROADCASTD %R15D,%XMM22 |
0x430b1b VPBROADCASTD %EDX,%XMM23 |
0x430b21 XOR %EDX,%EDX |
0x430b23 MOV 0xd8(%RSP),%R15 |
0x430b2b VPBROADCASTQ %RDX,%YMM8 |
0x430b31 VMOVDQA 0x220(%RSP),%YMM7 |
0x430b3a VPSUBQ %YMM8,%YMM7,%YMM26 |
0x430b40 VPCMPNLEUQ 0xc75f5(%RIP),%YMM26,%K1 |
0x430b4b ADD 0x60(%RSP),%R11 |
0x430b50 ADD 0x50(%RSP),%RDX |
0x430b55 SUB %RDI,%RDX |
0x430b58 VMOVUPD (%R11,%RDX,8),%YMM26{%K1}{z} |
0x430b5f VMOVAPD %YMM26,%YMM21{%K1} |
0x430b65 VCMPPD $0x1,%YMM9,%YMM21,%K2 |
0x430b6c VPBLENDMD %XMM25,%XMM23,%XMM28{%K2} |
0x430b72 VMOVDQA32 %XMM23,%XMM25{%K2} |
0x430b78 VPMOVSXDQ %XMM25,%YMM25 |
0x430b7e VPSUBQ %YMM3,%YMM25,%YMM26 |
0x430b84 VPADDQ %YMM2,%YMM8,%YMM8 |
0x430b88 VPSUBQ %YMM4,%YMM8,%YMM8 |
0x430b8c VPSLLQ $0x3,%YMM8,%YMM27 |
0x430b93 VPMULLQ %YMM26,%YMM6,%YMM8 |
0x430b99 VPADDQ %YMM27,%YMM5,%YMM25 |
0x430b9f VPADDQ %YMM8,%YMM25,%YMM8 |
0x430ba5 VXORPD %XMM29,%XMM29,%XMM29 |
0x430bab KMOVQ %K1,%K3 |
0x430bb0 VGATHERQPD (,%YMM8,1),%YMM29{%K3} |
0x430bbb VPBLENDMD %XMM24,%XMM22,%XMM8{%K2} |
0x430bc1 VMOVAPD %YMM29,%YMM19{%K1} |
0x430bc7 VPMOVSXDQ %XMM8,%YMM8 |
0x430bcc VPSUBQ %YMM3,%YMM8,%YMM8 |
0x430bd0 VPMULLQ %YMM8,%YMM6,%YMM8 |
0x430bd6 VPADDQ %YMM8,%YMM25,%YMM8 |
0x430bdc VPXORD %XMM24,%XMM24,%XMM24 |
0x430be2 KMOVQ %K1,%K3 |
0x430be7 VGATHERQPD (,%YMM8,1),%YMM24{%K3} |
0x430bf2 VMOVAPD %YMM24,%YMM31{%K1} |
0x430bf8 VPMOVSXDQ %XMM28,%YMM8 |
0x430bfe VPSUBQ %YMM3,%YMM8,%YMM8 |
0x430c02 VPMULLQ %YMM8,%YMM6,%YMM8 |
0x430c08 VPADDQ %YMM8,%YMM25,%YMM8 |
0x430c0e VXORPD %XMM24,%XMM24,%XMM24 |
0x430c14 KMOVQ %K1,%K3 |
0x430c19 VGATHERQPD (,%YMM8,1),%YMM24{%K3} |
0x430c24 VSUBPD %YMM31,%YMM19,%YMM28 |
0x430c2a VMOVAPD %YMM24,%YMM20{%K1} |
0x430c30 VSUBPD %YMM19,%YMM20,%YMM24 |
0x430c36 VMULPD %YMM28,%YMM24,%YMM8 |
0x430c3c VCMPPD $0x1,%YMM8,%YMM9,%K3{%K1} |
0x430c43 KORTESTB %K3,%K3 |
0x430c47 VMOVAPD 0x1e0(%RSP),%YMM16 |
0x430c4f JE 430740 |
0x430c55 VMOVSD (%R15,%RSI,8),%XMM25 |
0x430c5c JMP 430740 |
/beegfs/hackathon/users/eoseret/qaas_runs/170-861-0321/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/advec_mom_kernel.f90: 81 - 241 |
-------------------------------------------------------------------------------- |
81: IF(mom_sweep.EQ.1)THEN ! x 1 |
[...] |
213: DO k=y_min-1,y_max+1 |
214: DO j=x_min,x_max+1 |
215: IF(node_flux(j,k).LT.0.0)THEN |
[...] |
227: sigma=ABS(node_flux(j,k))/(node_mass_pre(j,donor)) |
228: width=celldy(k) |
229: vdiffuw=vel1(j,donor)-vel1(j,upwind) |
230: vdiffdw=vel1(j,downwind)-vel1(j,donor) |
231: limiter=0.0 |
232: IF(vdiffuw*vdiffdw.GT.0.0)THEN |
233: auw=ABS(vdiffuw) |
234: adw=ABS(vdiffdw) |
235: wind=1.0_8 |
236: IF(vdiffdw.LE.0.0) wind=-1.0_8 |
237: limiter=wind*MIN(width*((2.0_8-sigma)*adw/width+(1.0_8+sigma)*auw/celldy(dif))/6.0_8,auw,adw) |
238: ENDIF |
239: advec_vel_s=vel1(j,donor)+(1.0_8-sigma)*limiter |
240: mom_flux(j,k)=advec_vel_s*node_flux(j,k) |
241: ENDDO |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.19 |
CQA speedup if FP arith vectorized | 1.99 |
CQA speedup if fully vectorized | 3.99 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.85 |
Bottlenecks | micro-operation queue, |
Function | advec_mom_kernel_.DIR.OMP.PARALLEL.2 |
Source | advec_mom_kernel.f90:81-81,advec_mom_kernel.f90:213-215,advec_mom_kernel.f90:227-234,advec_mom_kernel.f90:237-240 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 44.83 |
CQA cycles if no scalar integer | 37.67 |
CQA cycles if FP arith vectorized | 22.53 |
CQA cycles if fully vectorized | 11.25 |
Front-end cycles | 44.83 |
DIV/SQRT cycles | 8.25 |
P0 cycles | 8.25 |
P1 cycles | 8.00 |
P2 cycles | 8.00 |
P3 cycles | 3.50 |
P4 cycles | 6.00 |
P5 cycles | 6.00 |
P6 cycles | 6.00 |
P7 cycles | 24.25 |
P8 cycles | 24.25 |
P9 cycles | 24.25 |
P10 cycles | 24.25 |
P11 cycles | 17.50 |
P12 cycles | 17.50 |
P13 cycles | 15.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 145.00 |
Nb uops | 269.00 |
Nb loads | 20.00 |
Nb stores | 4.00 |
Nb stack references | 10.00 |
FLOP/cycle | 1.47 |
Nb FLOP add-sub | 16.00 |
Nb FLOP mul | 17.00 |
Nb FLOP fma | 12.00 |
Nb FLOP div | 9.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 12.31 |
Bytes prefetched | 0.00 |
Bytes loaded | 424.00 |
Bytes stored | 128.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 80.61 |
Vectorization ratio load | 84.62 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 88.89 |
Vectorization ratio add_sub | 89.47 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 66.67 |
Vectorization ratio other | 74.07 |
Vector-efficiency ratio all | 38.90 |
Vector-efficiency ratio load | 44.23 |
Vector-efficiency ratio store | 50.00 |
Vector-efficiency ratio mul | 45.83 |
Vector-efficiency ratio add_sub | 46.05 |
Vector-efficiency ratio fma | 50.00 |
Vector-efficiency ratio div_sqrt | 37.50 |
Vector-efficiency ratio other | 33.33 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.19 |
CQA speedup if FP arith vectorized | 1.99 |
CQA speedup if fully vectorized | 3.99 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.85 |
Bottlenecks | micro-operation queue, |
Function | advec_mom_kernel_.DIR.OMP.PARALLEL.2 |
Source | advec_mom_kernel.f90:81-81,advec_mom_kernel.f90:213-215,advec_mom_kernel.f90:227-234,advec_mom_kernel.f90:237-240 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 44.83 |
CQA cycles if no scalar integer | 37.67 |
CQA cycles if FP arith vectorized | 22.53 |
CQA cycles if fully vectorized | 11.25 |
Front-end cycles | 44.83 |
DIV/SQRT cycles | 8.25 |
P0 cycles | 8.25 |
P1 cycles | 8.00 |
P2 cycles | 8.00 |
P3 cycles | 3.50 |
P4 cycles | 6.00 |
P5 cycles | 6.00 |
P6 cycles | 6.00 |
P7 cycles | 24.25 |
P8 cycles | 24.25 |
P9 cycles | 24.25 |
P10 cycles | 24.25 |
P11 cycles | 17.50 |
P12 cycles | 17.50 |
P13 cycles | 15.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 145.00 |
Nb uops | 269.00 |
Nb loads | 20.00 |
Nb stores | 4.00 |
Nb stack references | 10.00 |
FLOP/cycle | 1.47 |
Nb FLOP add-sub | 16.00 |
Nb FLOP mul | 17.00 |
Nb FLOP fma | 12.00 |
Nb FLOP div | 9.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 12.31 |
Bytes prefetched | 0.00 |
Bytes loaded | 424.00 |
Bytes stored | 128.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 80.61 |
Vectorization ratio load | 84.62 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 88.89 |
Vectorization ratio add_sub | 89.47 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 66.67 |
Vectorization ratio other | 74.07 |
Vector-efficiency ratio all | 38.90 |
Vector-efficiency ratio load | 44.23 |
Vector-efficiency ratio store | 50.00 |
Vector-efficiency ratio mul | 45.83 |
Vector-efficiency ratio add_sub | 46.05 |
Vector-efficiency ratio fma | 50.00 |
Vector-efficiency ratio div_sqrt | 37.50 |
Vector-efficiency ratio other | 33.33 |
Path / |
Function | advec_mom_kernel_.DIR.OMP.PARALLEL.2 |
Source file and lines | advec_mom_kernel.f90:81-241 |
Module | exec |
nb instructions | 145 |
nb uops | 269 |
loop length | 813 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 11 |
used ymm registers | 30 |
used zmm registers | 0 |
nb stack references | 10 |
ADD-SUB / MUL ratio | 0.80 |
micro-operation queue | 44.83 cycles |
front end | 44.83 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 8.25 | 8.25 | 8.00 | 8.00 | 3.50 | 6.00 | 6.00 | 6.00 | 24.25 | 24.25 | 24.25 | 24.25 | 17.50 | 17.50 |
cycles | 8.25 | 8.25 | 8.00 | 8.00 | 3.50 | 6.00 | 6.00 | 6.00 | 24.25 | 24.25 | 24.25 | 24.25 | 17.50 | 17.50 |
Cycles executing div or sqrt instructions | 15.00 |
Front-end | 44.83 |
Dispatch | 24.25 |
DIV/SQRT | 15.00 |
Overall L1 | 44.83 |
all | 68% |
load | 66% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 86% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 52% |
all | 90% |
load | 90% |
store | 100% |
mul | 80% |
add-sub | 100% |
fma | 100% |
div/sqrt | 66% |
other | 93% |
all | 80% |
load | 84% |
store | 100% |
mul | 88% |
add-sub | 89% |
fma | 100% |
div/sqrt | 66% |
other | 74% |
all | 31% |
load | 37% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 50% |
add-sub | 45% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 19% |
all | 45% |
load | 46% |
store | 50% |
mul | 42% |
add-sub | 50% |
fma | 50% |
div/sqrt | 37% |
other | 45% |
all | 38% |
load | 44% |
store | 50% |
mul | 45% |
add-sub | 46% |
fma | 50% |
div/sqrt | 37% |
other | 33% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VPMULLQ %YMM26,%YMM1,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPADDQ %YMM27,%YMM0,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPADDQ %YMM7,%YMM8,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPXOR %XMM8,%XMM8,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
KMOVQ %K1,%K4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 |
VGATHERQPD (,%YMM7,1),%YMM8{%K4} | 24 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.75 | 1.42 | 1.42 | 1.42 | 3 | 3 | 0-16 | 4 |
VANDPD %YMM10,%YMM21,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VMOVAPD %YMM8,%YMM16{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVAPD %YMM16,0x1e0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 |
VDIVPD %YMM16,%YMM7,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 5 |
VMOVDQA32 %XMM23,%XMM22{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VANDPD %YMM10,%YMM28,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VANDPD %YMM10,%YMM24,%YMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VSUBPD %YMM7,%YMM11,%YMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
VMULPD %YMM17,%YMM16,%YMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VDIVSD %XMM25,%XMM12,%XMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 5 |
VBROADCASTSD %XMM18,%YMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0.50 |
VCMPPD $0x2,%YMM16,%YMM8,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %YMM8,%YMM16{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VFMADD213PD %YMM8,%YMM7,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VPMOVSXDQ %XMM22,%YMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
VPSUBQ %YMM3,%YMM22,%YMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPXORD %XMM23,%XMM23,%XMM23 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
KMOVQ %K3,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 |
VGATHERQPD (%R15,%YMM22,8),%YMM23{%K2} | 24 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.75 | 1.42 | 1.42 | 1.42 | 3 | 3 | 0-16 | 4 |
VMOVAPD %YMM23,%YMM30{%K3} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VDIVPD %YMM30,%YMM8,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 5 |
VFMADD231PD %YMM18,%YMM17,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM14,%XMM25,%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VBROADCASTSD %XMM17,%YMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0.50 |
VMULPD %YMM8,%YMM17,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VCMPPD $0x2,%YMM16,%YMM8,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %YMM8,%YMM16{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VCMPPD $0x2,%YMM9,%YMM24,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VXORPD %YMM15,%YMM16,%YMM16{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VMOVAPD %YMM16,%YMM8{%K3}{z} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VSUBPD %YMM7,%YMM13,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
VFMADD213PD %YMM19,%YMM8,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %YMM21,%YMM7,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
IMUL %R8,%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD 0x128(%RSP),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMOVUPD %YMM7,(%RSI,%RDX,8){%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 |
LEA 0x1(%R12),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %R8,%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %RCX,%R13 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %RAX,%R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RDX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JE 42d936 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0xa56> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
TEST %R9,%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 430ae0 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3c00> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
VMOVAPS %YMM31,0x1c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 |
VMOVAPS %YMM20,0x240(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 |
VMOVAPD %YMM30,%YMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x10(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%RDX,%R12,1),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
DEC %RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VPBROADCASTD %ESI,%XMM25 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 |
SUB %R10,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RCX,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL %RSI,%R11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%RBX,%R12,1),%EDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%RBX,%R12,1),%R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
INC %R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VPBROADCASTD %R15D,%XMM24 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 |
LEA (%RBX,%R12,1),%R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD $-0x2,%R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VPBROADCASTD %R15D,%XMM22 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 |
VPBROADCASTD %EDX,%XMM23 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV 0xd8(%RSP),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
JMP 4309bd <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3add> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV %R9,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R9,0x30(%RSP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMOVAPD %YMM20,%YMM30 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVAPD 0x240(%RSP),%YMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVAPD 0x1c0(%RSP),%YMM31 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
JE 430840 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3960> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
JMP 430b2b <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3c4b> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV 0x10(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%RDX,%R12,1),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
DEC %RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VPBROADCASTD %ESI,%XMM25 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 |
SUB %R10,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RCX,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL %RSI,%R11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%RBX,%R12,1),%EDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%RBX,%R12,1),%R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
INC %R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VPBROADCASTD %R15D,%XMM24 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 |
LEA (%RBX,%R12,1),%R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD $-0x2,%R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VPBROADCASTD %R15D,%XMM22 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 |
VPBROADCASTD %EDX,%XMM23 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV 0xd8(%RSP),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
VPBROADCASTQ %RDX,%YMM8 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 |
VMOVDQA 0x220(%RSP),%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPSUBQ %YMM8,%YMM7,%YMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPCMPNLEUQ 0xc75f5(%RIP),%YMM26,%K1 | |||||||||||||||||
ADD 0x60(%RSP),%R11 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
ADD 0x50(%RSP),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
SUB %RDI,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVUPD (%R11,%RDX,8),%YMM26{%K1}{z} | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVAPD %YMM26,%YMM21{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VCMPPD $0x1,%YMM9,%YMM21,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VPBLENDMD %XMM25,%XMM23,%XMM28{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VMOVDQA32 %XMM23,%XMM25{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPMOVSXDQ %XMM25,%YMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
VPSUBQ %YMM3,%YMM25,%YMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPADDQ %YMM2,%YMM8,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPSUBQ %YMM4,%YMM8,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPSLLQ $0x3,%YMM8,%YMM27 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPMULLQ %YMM26,%YMM6,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPADDQ %YMM27,%YMM5,%YMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPADDQ %YMM8,%YMM25,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VXORPD %XMM29,%XMM29,%XMM29 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KMOVQ %K1,%K3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 |
VGATHERQPD (,%YMM8,1),%YMM29{%K3} | 24 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.75 | 1.42 | 1.42 | 1.42 | 3 | 3 | 0-16 | 4 |
VPBLENDMD %XMM24,%XMM22,%XMM8{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VMOVAPD %YMM29,%YMM19{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPMOVSXDQ %XMM8,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
VPSUBQ %YMM3,%YMM8,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPMULLQ %YMM8,%YMM6,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPADDQ %YMM8,%YMM25,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPXORD %XMM24,%XMM24,%XMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
KMOVQ %K1,%K3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 |
VGATHERQPD (,%YMM8,1),%YMM24{%K3} | 24 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.75 | 1.42 | 1.42 | 1.42 | 3 | 3 | 0-16 | 4 |
VMOVAPD %YMM24,%YMM31{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPMOVSXDQ %XMM28,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
VPSUBQ %YMM3,%YMM8,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPMULLQ %YMM8,%YMM6,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPADDQ %YMM8,%YMM25,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VXORPD %XMM24,%XMM24,%XMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KMOVQ %K1,%K3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 |
VGATHERQPD (,%YMM8,1),%YMM24{%K3} | 24 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.75 | 1.42 | 1.42 | 1.42 | 3 | 3 | 0-16 | 4 |
VSUBPD %YMM31,%YMM19,%YMM28 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
VMOVAPD %YMM24,%YMM20{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VSUBPD %YMM19,%YMM20,%YMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
VMULPD %YMM28,%YMM24,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VCMPPD $0x1,%YMM8,%YMM9,%K3{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
KORTESTB %K3,%K3 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 6 | 1 |
VMOVAPD 0x1e0(%RSP),%YMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
JE 430740 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3860> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
VMOVSD (%R15,%RSI,8),%XMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
JMP 430740 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3860> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
Function | advec_mom_kernel_.DIR.OMP.PARALLEL.2 |
Source file and lines | advec_mom_kernel.f90:81-241 |
Module | exec |
nb instructions | 145 |
nb uops | 269 |
loop length | 813 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 11 |
used ymm registers | 30 |
used zmm registers | 0 |
nb stack references | 10 |
ADD-SUB / MUL ratio | 0.80 |
micro-operation queue | 44.83 cycles |
front end | 44.83 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 8.25 | 8.25 | 8.00 | 8.00 | 3.50 | 6.00 | 6.00 | 6.00 | 24.25 | 24.25 | 24.25 | 24.25 | 17.50 | 17.50 |
cycles | 8.25 | 8.25 | 8.00 | 8.00 | 3.50 | 6.00 | 6.00 | 6.00 | 24.25 | 24.25 | 24.25 | 24.25 | 17.50 | 17.50 |
Cycles executing div or sqrt instructions | 15.00 |
Front-end | 44.83 |
Dispatch | 24.25 |
DIV/SQRT | 15.00 |
Overall L1 | 44.83 |
all | 68% |
load | 66% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 86% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 52% |
all | 90% |
load | 90% |
store | 100% |
mul | 80% |
add-sub | 100% |
fma | 100% |
div/sqrt | 66% |
other | 93% |
all | 80% |
load | 84% |
store | 100% |
mul | 88% |
add-sub | 89% |
fma | 100% |
div/sqrt | 66% |
other | 74% |
all | 31% |
load | 37% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 50% |
add-sub | 45% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 19% |
all | 45% |
load | 46% |
store | 50% |
mul | 42% |
add-sub | 50% |
fma | 50% |
div/sqrt | 37% |
other | 45% |
all | 38% |
load | 44% |
store | 50% |
mul | 45% |
add-sub | 46% |
fma | 50% |
div/sqrt | 37% |
other | 33% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VPMULLQ %YMM26,%YMM1,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPADDQ %YMM27,%YMM0,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPADDQ %YMM7,%YMM8,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPXOR %XMM8,%XMM8,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
KMOVQ %K1,%K4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 |
VGATHERQPD (,%YMM7,1),%YMM8{%K4} | 24 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.75 | 1.42 | 1.42 | 1.42 | 3 | 3 | 0-16 | 4 |
VANDPD %YMM10,%YMM21,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VMOVAPD %YMM8,%YMM16{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVAPD %YMM16,0x1e0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 |
VDIVPD %YMM16,%YMM7,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 5 |
VMOVDQA32 %XMM23,%XMM22{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VANDPD %YMM10,%YMM28,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VANDPD %YMM10,%YMM24,%YMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VSUBPD %YMM7,%YMM11,%YMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
VMULPD %YMM17,%YMM16,%YMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VDIVSD %XMM25,%XMM12,%XMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 5 |
VBROADCASTSD %XMM18,%YMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0.50 |
VCMPPD $0x2,%YMM16,%YMM8,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %YMM8,%YMM16{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VFMADD213PD %YMM8,%YMM7,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VPMOVSXDQ %XMM22,%YMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
VPSUBQ %YMM3,%YMM22,%YMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPXORD %XMM23,%XMM23,%XMM23 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
KMOVQ %K3,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 |
VGATHERQPD (%R15,%YMM22,8),%YMM23{%K2} | 24 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.75 | 1.42 | 1.42 | 1.42 | 3 | 3 | 0-16 | 4 |
VMOVAPD %YMM23,%YMM30{%K3} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VDIVPD %YMM30,%YMM8,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 5 |
VFMADD231PD %YMM18,%YMM17,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM14,%XMM25,%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VBROADCASTSD %XMM17,%YMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0.50 |
VMULPD %YMM8,%YMM17,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VCMPPD $0x2,%YMM16,%YMM8,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %YMM8,%YMM16{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VCMPPD $0x2,%YMM9,%YMM24,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VXORPD %YMM15,%YMM16,%YMM16{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VMOVAPD %YMM16,%YMM8{%K3}{z} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VSUBPD %YMM7,%YMM13,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
VFMADD213PD %YMM19,%YMM8,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %YMM21,%YMM7,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
IMUL %R8,%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD 0x128(%RSP),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMOVUPD %YMM7,(%RSI,%RDX,8){%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 |
LEA 0x1(%R12),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %R8,%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %RCX,%R13 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %RAX,%R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RDX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JE 42d936 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0xa56> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
TEST %R9,%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 430ae0 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3c00> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
VMOVAPS %YMM31,0x1c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 |
VMOVAPS %YMM20,0x240(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 |
VMOVAPD %YMM30,%YMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x10(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%RDX,%R12,1),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
DEC %RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VPBROADCASTD %ESI,%XMM25 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 |
SUB %R10,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RCX,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL %RSI,%R11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%RBX,%R12,1),%EDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%RBX,%R12,1),%R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
INC %R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VPBROADCASTD %R15D,%XMM24 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 |
LEA (%RBX,%R12,1),%R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD $-0x2,%R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VPBROADCASTD %R15D,%XMM22 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 |
VPBROADCASTD %EDX,%XMM23 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV 0xd8(%RSP),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
JMP 4309bd <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3add> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV %R9,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R9,0x30(%RSP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMOVAPD %YMM20,%YMM30 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVAPD 0x240(%RSP),%YMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVAPD 0x1c0(%RSP),%YMM31 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
JE 430840 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3960> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
JMP 430b2b <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3c4b> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV 0x10(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%RDX,%R12,1),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
DEC %RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VPBROADCASTD %ESI,%XMM25 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 |
SUB %R10,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RCX,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL %RSI,%R11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%RBX,%R12,1),%EDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%RBX,%R12,1),%R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
INC %R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VPBROADCASTD %R15D,%XMM24 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 |
LEA (%RBX,%R12,1),%R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD $-0x2,%R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VPBROADCASTD %R15D,%XMM22 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 |
VPBROADCASTD %EDX,%XMM23 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV 0xd8(%RSP),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
VPBROADCASTQ %RDX,%YMM8 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 |
VMOVDQA 0x220(%RSP),%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPSUBQ %YMM8,%YMM7,%YMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPCMPNLEUQ 0xc75f5(%RIP),%YMM26,%K1 | |||||||||||||||||
ADD 0x60(%RSP),%R11 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
ADD 0x50(%RSP),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
SUB %RDI,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVUPD (%R11,%RDX,8),%YMM26{%K1}{z} | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVAPD %YMM26,%YMM21{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VCMPPD $0x1,%YMM9,%YMM21,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VPBLENDMD %XMM25,%XMM23,%XMM28{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VMOVDQA32 %XMM23,%XMM25{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPMOVSXDQ %XMM25,%YMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
VPSUBQ %YMM3,%YMM25,%YMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPADDQ %YMM2,%YMM8,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPSUBQ %YMM4,%YMM8,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPSLLQ $0x3,%YMM8,%YMM27 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPMULLQ %YMM26,%YMM6,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPADDQ %YMM27,%YMM5,%YMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPADDQ %YMM8,%YMM25,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VXORPD %XMM29,%XMM29,%XMM29 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KMOVQ %K1,%K3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 |
VGATHERQPD (,%YMM8,1),%YMM29{%K3} | 24 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.75 | 1.42 | 1.42 | 1.42 | 3 | 3 | 0-16 | 4 |
VPBLENDMD %XMM24,%XMM22,%XMM8{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VMOVAPD %YMM29,%YMM19{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPMOVSXDQ %XMM8,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
VPSUBQ %YMM3,%YMM8,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPMULLQ %YMM8,%YMM6,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPADDQ %YMM8,%YMM25,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPXORD %XMM24,%XMM24,%XMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
KMOVQ %K1,%K3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 |
VGATHERQPD (,%YMM8,1),%YMM24{%K3} | 24 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.75 | 1.42 | 1.42 | 1.42 | 3 | 3 | 0-16 | 4 |
VMOVAPD %YMM24,%YMM31{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPMOVSXDQ %XMM28,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
VPSUBQ %YMM3,%YMM8,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPMULLQ %YMM8,%YMM6,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPADDQ %YMM8,%YMM25,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VXORPD %XMM24,%XMM24,%XMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KMOVQ %K1,%K3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 |
VGATHERQPD (,%YMM8,1),%YMM24{%K3} | 24 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.75 | 1.42 | 1.42 | 1.42 | 3 | 3 | 0-16 | 4 |
VSUBPD %YMM31,%YMM19,%YMM28 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
VMOVAPD %YMM24,%YMM20{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VSUBPD %YMM19,%YMM20,%YMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
VMULPD %YMM28,%YMM24,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VCMPPD $0x1,%YMM8,%YMM9,%K3{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
KORTESTB %K3,%K3 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 6 | 1 |
VMOVAPD 0x1e0(%RSP),%YMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
JE 430740 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3860> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
VMOVSD (%R15,%RSI,8),%XMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
JMP 430740 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3860> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |