Function: __pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0.lto_priv.0 | Module: exec | Source: pack_kernel.f90:202-207 | Coverage: 0.01% |
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Function: __pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0.lto_priv.0 | Module: exec | Source: pack_kernel.f90:202-207 | Coverage: 0.01% |
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/beegfs/hackathon/users/eoseret/qaas_runs/170-861-0321/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/pack_kernel.f90: 202 - 207 |
-------------------------------------------------------------------------------- |
202: !$OMP PARALLEL DO PRIVATE(index) |
203: DO k=y_min-depth,y_max+y_inc+depth |
204: !$OMP SIMD |
205: DO j=1,depth |
206: index= buffer_offset + j+(k+depth-1)*depth |
207: field(x_max+x_inc+j,k)=right_rcv_buffer(index) |
0x42e100 PUSH %RBP |
0x42e101 MOV %RSP,%RBP |
0x42e104 PUSH %R15 |
0x42e106 PUSH %R14 |
0x42e108 PUSH %R13 |
0x42e10a PUSH %R12 |
0x42e10c PUSH %RBX |
0x42e10d SUB $0x88,%RSP |
0x42e114 MOV 0x48(%RDI),%RDX |
0x42e118 MOV 0x54(%RDI),%EAX |
0x42e11b MOV 0x28(%RDI),%RCX |
0x42e11f MOV 0x58(%RDI),%R13D |
0x42e123 MOV 0x40(%RDI),%RBX |
0x42e127 MOV 0x30(%RDI),%R15 |
0x42e12b MOV %RDI,-0x38(%RBP) |
0x42e12f MOV 0x20(%RDI),%R12 |
0x42e133 MOV %RDX,-0x48(%RBP) |
0x42e137 MOV %RCX,-0x70(%RBP) |
0x42e13b MOV %EAX,-0x88(%RBP) |
0x42e141 CALL 402080 <@plt_start@+0x60> |
0x42e146 MOV %EAX,%R14D |
0x42e149 CALL 402180 <@plt_start@+0x160> |
0x42e14e MOV -0x38(%RBP),%R10 |
0x42e152 MOV %EAX,%ESI |
0x42e154 MOV 0x5c(%R10),%EAX |
0x42e158 INC %EAX |
0x42e15a SUB %R13D,%EAX |
0x42e15d CLTD |
0x42e15e IDIV %R14D |
0x42e161 CMP %EDX,%ESI |
0x42e163 JL 42e65c |
0x42e169 IMUL %EAX,%ESI |
0x42e16c ADD %EDX,%ESI |
0x42e16e ADD %ESI,%EAX |
0x42e170 CMP %EAX,%ESI |
0x42e172 JGE 42e630 |
0x42e178 MOV 0x8(%R10),%R8 |
0x42e17c MOV -0x70(%RBP),%RCX |
0x42e180 LEA (%R13,%RSI,1),%EDI |
0x42e185 ADD %R13D,%EAX |
0x42e188 MOVSXD %EDI,%R13 |
0x42e18b MOV %EAX,-0x60(%RBP) |
0x42e18e VMOVQ 0x10(%R10),%XMM10 |
0x42e194 LEA (,%RBX,8),%RAX |
0x42e19c VMOVQ 0x38(%R10),%XMM3 |
0x42e1a2 VMOVQ (%R10),%XMM8 |
0x42e1a7 VMOVQ %RAX,%XMM1 |
0x42e1ac LEA (,%R12,8),%RDX |
0x42e1b4 VMOVQ 0x18(%R10),%XMM2 |
0x42e1ba MOV %EDI,-0x4c(%RBP) |
0x42e1bd MOVB $0,-0x55(%RBP) |
0x42e1c1 MOV %R10,-0xb0(%RBP) |
0x42e1c8 VMOVQ %RDX,%XMM0 |
0x42e1cd XOR %EDX,%EDX |
0x42e1cf MOV (%R8),%R14D |
0x42e1d2 IMUL %RCX,%R13 |
0x42e1d6 MOV %R12,%R8 |
0x42e1d9 MOV %RBX,%RCX |
0x42e1dc SAL $0x5,%R8 |
0x42e1e0 LEA (%R13,%R15,1),%RSI |
0x42e1e5 MOV %R8,-0x98(%RBP) |
0x42e1ec LEA (%RBX,%RBX,2),%R8 |
0x42e1f0 LEA (%R12,%R12,2),%R13 |
0x42e1f4 LEA -0x1(%RDI,%R14,1),%R11D |
0x42e1f9 MOV %R14D,%R15D |
0x42e1fc LEA -0x1(%R14),%R9D |
0x42e200 MOV %R14D,%EAX |
0x42e203 IMUL %R14D,%R11D |
0x42e207 AND $-0x8,%EAX |
0x42e20a MOV %RBX,%RDI |
0x42e20d MOV %R9D,-0x8c(%RBP) |
0x42e214 SHR $0x3,%R15D |
0x42e218 MOV %EAX,-0x90(%RBP) |
0x42e21e MOV %R14D,-0x3c(%RBP) |
0x42e222 MOV %R12,%R9 |
0x42e225 MOV %R11D,-0x38(%RBP) |
0x42e229 MOV %R15D,-0x40(%RBP) |
0x42e22d MOV %R12,%R11 |
0x42e230 MOV %RBX,%R15 |
0x42e233 INC %EAX |
0x42e235 LEA (,%R13,8),%R13 |
0x42e23d SAL $0x6,%R15 |
0x42e241 MOV %EAX,-0xa4(%RBP) |
0x42e247 SAL $0x5,%RDI |
0x42e24b SAL $0x4,%RCX |
0x42e24f MOV %RDI,-0xa0(%RBP) |
0x42e256 SAL $0x6,%R11 |
0x42e25a MOV %RCX,-0x68(%RBP) |
0x42e25e SAL $0x3,%R8 |
0x42e262 SAL $0x4,%R9 |
0x42e266 TEST %R14D,%R14D |
0x42e269 CMOVNS %R14D,%EDX |
0x42e26d MOV %R15,%R14 |
0x42e270 MOV %RSI,%R15 |
0x42e273 INC %EDX |
0x42e275 MOV %EDX,-0x84(%RBP) |
0x42e27b NOPL (%RAX,%RAX,1) |
(186) 0x42e280 MOV -0x3c(%RBP),%R10D |
(186) 0x42e284 TEST %R10D,%R10D |
(186) 0x42e287 JLE 42e5de |
(186) 0x42e28d MOV -0x88(%RBP),%ECX |
(186) 0x42e293 VMOVQ %XMM10,%RSI |
(186) 0x42e298 VMOVQ %XMM8,%RDI |
(186) 0x42e29d ADD (%RDI),%ECX |
(186) 0x42e29f MOVSXD (%RSI),%RAX |
(186) 0x42e2a2 CMPL $0x6,-0x8c(%RBP) |
(186) 0x42e2a9 MOV %EAX,-0x50(%RBP) |
(186) 0x42e2ac MOV %ECX,-0x54(%RBP) |
(186) 0x42e2af JBE 42e650 |
(186) 0x42e2b5 MOVSXD -0x38(%RBP),%RDX |
(186) 0x42e2b9 MOVSXD %ECX,%RCX |
(186) 0x42e2bc VMOVQ %XMM3,%RDI |
(186) 0x42e2c1 INC %RCX |
(186) 0x42e2c4 IMUL %R12,%RCX |
(186) 0x42e2c8 LEA 0x1(%RAX,%RDX,1),%R10 |
(186) 0x42e2cd MOV -0x48(%RBP),%RAX |
(186) 0x42e2d1 VMOVQ %XMM2,%RDX |
(186) 0x42e2d6 ADD %R15,%RCX |
(186) 0x42e2d9 IMUL %RBX,%R10 |
(186) 0x42e2dd LEA (%RDX,%RCX,8),%RCX |
(186) 0x42e2e1 MOV %RCX,-0x80(%RBP) |
(186) 0x42e2e5 ADD %RAX,%R10 |
(186) 0x42e2e8 MOV -0x98(%RBP),%RAX |
(186) 0x42e2ef LEA (%RDI,%R10,8),%RSI |
(186) 0x42e2f3 MOV -0xa0(%RBP),%R10 |
(186) 0x42e2fa MOV %RSI,-0x78(%RBP) |
(186) 0x42e2fe ADD %RCX,%RAX |
(186) 0x42e301 LEA (%RSI,%R10,1),%RDX |
(186) 0x42e305 XOR %R10D,%R10D |
(186) 0x42e308 TESTB $0x1,-0x40(%RBP) |
(186) 0x42e30c JE 42e38c |
(186) 0x42e30e MOV -0x78(%RBP),%RDI |
(186) 0x42e312 MOV -0x68(%RBP),%R10 |
(186) 0x42e316 VMOVSD (%RDX),%XMM7 |
(186) 0x42e31a VMOVSD (%RDX,%RBX,8),%XMM6 |
(186) 0x42e31f VMOVSD (%RDX,%R8,1),%XMM4 |
(186) 0x42e325 ADD %R14,%RSI |
(186) 0x42e328 ADD %R11,%RCX |
(186) 0x42e32b VMOVSD (%RDI,%R10,1),%XMM11 |
(186) 0x42e331 VMOVSD (%RDI),%XMM13 |
(186) 0x42e335 VMOVSD (%RDI,%RBX,8),%XMM12 |
(186) 0x42e33a VMOVSD (%RDI,%R8,1),%XMM9 |
(186) 0x42e340 MOV -0x80(%RBP),%RDI |
(186) 0x42e344 VMOVSD (%RDX,%R10,1),%XMM5 |
(186) 0x42e34a ADD %R14,%RDX |
(186) 0x42e34d MOV $0x1,%R10D |
(186) 0x42e353 VMOVSD %XMM13,(%RDI) |
(186) 0x42e357 VMOVSD %XMM12,(%RDI,%R12,8) |
(186) 0x42e35d VMOVSD %XMM11,(%RDI,%R9,1) |
(186) 0x42e363 VMOVSD %XMM9,(%RDI,%R13,1) |
(186) 0x42e369 VMOVSD %XMM7,(%RAX) |
(186) 0x42e36d VMOVSD %XMM6,(%RAX,%R12,8) |
(186) 0x42e373 VMOVSD %XMM5,(%RAX,%R9,1) |
(186) 0x42e379 VMOVSD %XMM4,(%RAX,%R13,1) |
(186) 0x42e37f ADD %R11,%RAX |
(186) 0x42e382 CMPL $0x1,-0x40(%RBP) |
(186) 0x42e386 JE 42e462 |
(186) 0x42e38c MOV -0x68(%RBP),%RDI |
(187) 0x42e390 VMOVSD (%RSI),%XMM14 |
(187) 0x42e394 VMOVSD (%RSI,%RBX,8),%XMM15 |
(187) 0x42e399 VMOVSD (%RSI,%RDI,1),%XMM13 |
(187) 0x42e39e VMOVSD (%RSI,%R8,1),%XMM12 |
(187) 0x42e3a4 VMOVSD (%RDX),%XMM11 |
(187) 0x42e3a8 VMOVSD (%RDX,%RBX,8),%XMM9 |
(187) 0x42e3ad VMOVSD (%RDX,%RDI,1),%XMM7 |
(187) 0x42e3b2 VMOVSD (%RDX,%R8,1),%XMM6 |
(187) 0x42e3b8 ADD %R14,%RSI |
(187) 0x42e3bb VMOVSD %XMM14,(%RCX) |
(187) 0x42e3bf ADD %R14,%RDX |
(187) 0x42e3c2 VMOVSD %XMM15,(%RCX,%R12,8) |
(187) 0x42e3c8 VMOVSD %XMM13,(%RCX,%R9,1) |
(187) 0x42e3ce VMOVSD %XMM12,(%RCX,%R13,1) |
(187) 0x42e3d4 VMOVSD %XMM11,(%RAX) |
(187) 0x42e3d8 ADD %R11,%RCX |
(187) 0x42e3db VMOVSD %XMM9,(%RAX,%R12,8) |
(187) 0x42e3e1 VMOVSD %XMM7,(%RAX,%R9,1) |
(187) 0x42e3e7 VMOVSD %XMM6,(%RAX,%R13,1) |
(187) 0x42e3ed ADD %R11,%RAX |
(187) 0x42e3f0 VMOVSD (%RSI),%XMM14 |
(187) 0x42e3f4 VMOVSD (%RSI,%RBX,8),%XMM15 |
(187) 0x42e3f9 VMOVSD (%RSI,%RDI,1),%XMM13 |
(187) 0x42e3fe VMOVSD (%RSI,%R8,1),%XMM12 |
(187) 0x42e404 VMOVSD (%RDX),%XMM11 |
(187) 0x42e408 VMOVSD (%RDX,%RBX,8),%XMM9 |
(187) 0x42e40d VMOVSD (%RDX,%RDI,1),%XMM5 |
(187) 0x42e412 VMOVSD (%RDX,%R8,1),%XMM4 |
(187) 0x42e418 ADD $0x2,%R10D |
(187) 0x42e41c VMOVSD %XMM14,(%RCX) |
(187) 0x42e420 ADD %R14,%RSI |
(187) 0x42e423 VMOVSD %XMM15,(%RCX,%R12,8) |
(187) 0x42e429 ADD %R14,%RDX |
(187) 0x42e42c VMOVSD %XMM13,(%RCX,%R9,1) |
(187) 0x42e432 VMOVSD %XMM12,(%RCX,%R13,1) |
(187) 0x42e438 VMOVSD %XMM11,(%RAX) |
(187) 0x42e43c ADD %R11,%RCX |
(187) 0x42e43f VMOVSD %XMM9,(%RAX,%R12,8) |
(187) 0x42e445 VMOVSD %XMM5,(%RAX,%R9,1) |
(187) 0x42e44b VMOVSD %XMM4,(%RAX,%R13,1) |
(187) 0x42e451 ADD %R11,%RAX |
(187) 0x42e454 CMP %R10D,-0x40(%RBP) |
(187) 0x42e458 JNE 42e390 |
(186) 0x42e45e MOV %RDI,-0x68(%RBP) |
(186) 0x42e462 MOV -0x90(%RBP),%ESI |
(186) 0x42e468 MOV -0x3c(%RBP),%ECX |
(186) 0x42e46b CMP %ECX,%ESI |
(186) 0x42e46d JE 42e5de |
(186) 0x42e473 MOV -0xa4(%RBP),%ECX |
(186) 0x42e479 MOV %ESI,%ESI |
(186) 0x42e47b MOV -0x3c(%RBP),%R10D |
(186) 0x42e47f SUB %ESI,%R10D |
(186) 0x42e482 LEA -0x1(%R10),%EDX |
(186) 0x42e486 CMP $0x2,%EDX |
(186) 0x42e489 JBE 42e521 |
(186) 0x42e48f MOVSXD -0x38(%RBP),%RDI |
(186) 0x42e493 MOVSXD -0x50(%RBP),%RAX |
(186) 0x42e497 MOV -0x48(%RBP),%RDX |
(186) 0x42e49b LEA 0x1(%RAX,%RDI,1),%RAX |
(186) 0x42e4a0 MOV %RBX,%RDI |
(186) 0x42e4a3 IMUL %RBX,%RAX |
(186) 0x42e4a7 IMUL %RSI,%RDI |
(186) 0x42e4ab IMUL %R12,%RSI |
(186) 0x42e4af ADD %RDX,%RAX |
(186) 0x42e4b2 VMOVQ %XMM3,%RDX |
(186) 0x42e4b7 ADD %RDI,%RAX |
(186) 0x42e4ba LEA (%RDX,%RAX,8),%RDI |
(186) 0x42e4be MOVSXD -0x54(%RBP),%RAX |
(186) 0x42e4c2 VMOVSD (%RDI),%XMM7 |
(186) 0x42e4c6 INC %RAX |
(186) 0x42e4c9 IMUL %R12,%RAX |
(186) 0x42e4cd ADD %R15,%RAX |
(186) 0x42e4d0 ADD %RSI,%RAX |
(186) 0x42e4d3 VMOVQ %XMM2,%RSI |
(186) 0x42e4d8 LEA (%RSI,%RAX,8),%RDX |
(186) 0x42e4dc VMOVQ %XMM1,%RAX |
(186) 0x42e4e1 ADD %RAX,%RDI |
(186) 0x42e4e4 VMOVSD (%RDI),%XMM6 |
(186) 0x42e4e8 ADD %RAX,%RDI |
(186) 0x42e4eb VMOVSD (%RDI),%XMM14 |
(186) 0x42e4ef VMOVSD (%RDI,%RAX,1),%XMM15 |
(186) 0x42e4f4 VMOVQ %XMM0,%RDI |
(186) 0x42e4f9 VMOVSD %XMM7,(%RDX) |
(186) 0x42e4fd ADD %RDI,%RDX |
(186) 0x42e500 VMOVSD %XMM6,(%RDX) |
(186) 0x42e504 ADD %RDI,%RDX |
(186) 0x42e507 VMOVSD %XMM14,(%RDX) |
(186) 0x42e50b VMOVSD %XMM15,(%RDX,%RDI,1) |
(186) 0x42e510 TEST $0x3,%R10B |
(186) 0x42e514 JE 42e5de |
(186) 0x42e51a AND $-0x4,%R10D |
(186) 0x42e51e ADD %R10D,%ECX |
(186) 0x42e521 MOV -0x50(%RBP),%ESI |
(186) 0x42e524 MOV -0x38(%RBP),%EDI |
(186) 0x42e527 MOV -0x48(%RBP),%RDX |
(186) 0x42e52b VMOVQ %XMM3,%R10 |
(186) 0x42e530 LEA (%RSI,%RCX,1),%EAX |
(186) 0x42e533 ADD %EDI,%EAX |
(186) 0x42e535 CLTQ |
(186) 0x42e537 IMUL %RBX,%RAX |
(186) 0x42e53b ADD %RDX,%RAX |
(186) 0x42e53e VMOVQ %XMM2,%RDX |
(186) 0x42e543 VMOVSD (%R10,%RAX,8),%XMM13 |
(186) 0x42e549 MOV -0x54(%RBP),%R10D |
(186) 0x42e54d LEA (%R10,%RCX,1),%EAX |
(186) 0x42e551 CLTQ |
(186) 0x42e553 IMUL %R12,%RAX |
(186) 0x42e557 ADD %R15,%RAX |
(186) 0x42e55a VMOVSD %XMM13,(%RDX,%RAX,8) |
(186) 0x42e55f LEA 0x1(%RCX),%EAX |
(186) 0x42e562 CMP %EAX,-0x3c(%RBP) |
(186) 0x42e565 JL 42e5de |
(186) 0x42e567 LEA (%RSI,%RAX,1),%EDX |
(186) 0x42e56a ADD %R10D,%EAX |
(186) 0x42e56d ADD $0x2,%ECX |
(186) 0x42e570 ADD %EDI,%EDX |
(186) 0x42e572 MOV -0x48(%RBP),%RDI |
(186) 0x42e576 CLTQ |
(186) 0x42e578 IMUL %R12,%RAX |
(186) 0x42e57c MOVSXD %EDX,%RDX |
(186) 0x42e57f IMUL %RBX,%RDX |
(186) 0x42e583 ADD %R15,%RAX |
(186) 0x42e586 ADD %RDI,%RDX |
(186) 0x42e589 VMOVQ %XMM3,%RDI |
(186) 0x42e58e VMOVSD (%RDI,%RDX,8),%XMM12 |
(186) 0x42e593 MOV %R10D,%EDX |
(186) 0x42e596 VMOVQ %XMM2,%R10 |
(186) 0x42e59b VMOVSD %XMM12,(%R10,%RAX,8) |
(186) 0x42e5a1 CMP %ECX,-0x3c(%RBP) |
(186) 0x42e5a4 JL 42e5de |
(186) 0x42e5a6 MOV %ESI,%EAX |
(186) 0x42e5a8 MOV -0x38(%RBP),%ESI |
(186) 0x42e5ab MOV -0x48(%RBP),%RDI |
(186) 0x42e5af VMOVQ %XMM3,%R10 |
(186) 0x42e5b4 ADD %ECX,%EAX |
(186) 0x42e5b6 ADD %ESI,%EAX |
(186) 0x42e5b8 CLTQ |
(186) 0x42e5ba IMUL %RBX,%RAX |
(186) 0x42e5be ADD %RDI,%RAX |
(186) 0x42e5c1 VMOVSD (%R10,%RAX,8),%XMM11 |
(186) 0x42e5c7 MOV %EDX,%EAX |
(186) 0x42e5c9 ADD %ECX,%EAX |
(186) 0x42e5cb VMOVQ %XMM2,%RCX |
(186) 0x42e5d0 CLTQ |
(186) 0x42e5d2 IMUL %R12,%RAX |
(186) 0x42e5d6 ADD %R15,%RAX |
(186) 0x42e5d9 VMOVSD %XMM11,(%RCX,%RAX,8) |
(186) 0x42e5de MOV -0x3c(%RBP),%EDX |
(186) 0x42e5e1 MOV -0x5c(%RBP),%ESI |
(186) 0x42e5e4 MOVZX -0x55(%RBP),%R10D |
(186) 0x42e5e9 MOV $0x1,%EDI |
(186) 0x42e5ee MOV -0x70(%RBP),%RCX |
(186) 0x42e5f2 TEST %EDX,%EDX |
(186) 0x42e5f4 CMOVNS -0x84(%RBP),%ESI |
(186) 0x42e5fb CMOVNS %EDI,%R10D |
(186) 0x42e5ff INCL -0x4c(%RBP) |
(186) 0x42e602 MOV -0x4c(%RBP),%EAX |
(186) 0x42e605 ADD %RCX,%R15 |
(186) 0x42e608 MOV %R10B,-0x55(%RBP) |
(186) 0x42e60c ADD %EDX,-0x38(%RBP) |
(186) 0x42e60f MOV %ESI,-0x5c(%RBP) |
(186) 0x42e612 CMP %EAX,-0x60(%RBP) |
(186) 0x42e615 JG 42e280 |
0x42e61b CMPB $0,-0x55(%RBP) |
0x42e61f MOV -0xb0(%RBP),%RBX |
0x42e626 JE 42e630 |
0x42e628 MOV -0x5c(%RBP),%R12D |
0x42e62c MOV %R12D,0x50(%RBX) |
0x42e630 ADD $0x88,%RSP |
0x42e637 POP %RBX |
0x42e638 POP %R12 |
0x42e63a POP %R13 |
0x42e63c POP %R14 |
0x42e63e POP %R15 |
0x42e640 POP %RBP |
0x42e641 RET |
0x42e642 NOPW %CS:(%RAX,%RAX,1) |
0x42e64d NOPL (%RAX) |
(186) 0x42e650 XOR %ESI,%ESI |
(186) 0x42e652 MOV $0x1,%ECX |
(186) 0x42e657 JMP 42e47b |
0x42e65c INC %EAX |
0x42e65e XOR %EDX,%EDX |
0x42e660 JMP 42e169 |
0x42e665 NOPW %CS:(%RAX,%RAX,1) |
Path / |
Source file and lines | pack_kernel.f90:202-207 |
Module | exec |
nb instructions | 116 |
nb uops | 115 |
loop length | 457 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 6 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 18 |
micro-operation queue | 19.17 cycles |
front end | 19.17 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 11.00 | 11.00 | 10.75 | 10.75 | 4.50 | 13.67 | 13.67 | 13.67 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
cycles | 11.00 | 11.00 | 10.75 | 10.75 | 4.50 | 13.67 | 13.67 | 13.67 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | 6.00 |
Front-end | 19.17 |
Dispatch | 13.67 |
DIV/SQRT | 6.00 |
Overall L1 | 19.17 |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 9% |
load | 11% |
store | 8% |
mul | 6% |
add-sub | 10% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 9% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SUB $0x88,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV 0x48(%RDI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x54(%RDI),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x28(%RDI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x58(%RDI),%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x40(%RDI),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x30(%RDI),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RDI,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x20(%RDI),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RDX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RCX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %EAX,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CALL 402080 <@plt_start@+0x60> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EAX,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 402180 <@plt_start@+0x160> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x5c(%R10),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
INC %EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %R13D,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CLTD | |||||||||||||||||
IDIV %R14D | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-14 | 6 |
CMP %EDX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JL 42e65c <__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0.lto_priv.0+0x55c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
IMUL %EAX,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %ESI,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %EAX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 42e630 <__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0.lto_priv.0+0x530> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV 0x8(%R10),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x70(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%R13,%RSI,1),%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %R13D,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVSXD %EDI,%R13 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %EAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVQ 0x10(%R10),%XMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (,%RBX,8),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ 0x38(%R10),%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ (%R10),%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ %RAX,%XMM1 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
LEA (,%R12,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ 0x18(%R10),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %EDI,-0x4c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVB $0,-0x55(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R10,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVQ %RDX,%XMM0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV (%R8),%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
IMUL %RCX,%R13 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R12,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x5,%R8 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (%R13,%R15,1),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LEA (%RBX,%RBX,2),%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%R12,%R12,2),%R13 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x1(%RDI,%R14,1),%R11D | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MOV %R14D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x1(%R14),%R9D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R14D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL %R14D,%R11D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
AND $-0x8,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R9D,-0x8c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SHR $0x3,%R15D | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %EAX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R14D,-0x3c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R12,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R11D,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R15D,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R12,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (,%R13,8),%R13 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SAL $0x6,%R15 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %EAX,-0xa4(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SAL $0x5,%RDI | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SAL $0x4,%RCX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SAL $0x6,%R11 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SAL $0x3,%R8 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SAL $0x4,%R9 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
TEST %R14D,%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMOVNS %R14D,%EDX | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R15,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RSI,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %EDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %EDX,-0x84(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
CMPB $0,-0x55(%RBP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV -0xb0(%RBP),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
JE 42e630 <__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0.lto_priv.0+0x530> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x5c(%RBP),%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %R12D,0x50(%RBX) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD $0x88,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
RET | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
INC %EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 42e169 <__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0.lto_priv.0+0x69> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
Source file and lines | pack_kernel.f90:202-207 |
Module | exec |
nb instructions | 116 |
nb uops | 115 |
loop length | 457 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 6 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 18 |
micro-operation queue | 19.17 cycles |
front end | 19.17 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 11.00 | 11.00 | 10.75 | 10.75 | 4.50 | 13.67 | 13.67 | 13.67 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
cycles | 11.00 | 11.00 | 10.75 | 10.75 | 4.50 | 13.67 | 13.67 | 13.67 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | 6.00 |
Front-end | 19.17 |
Dispatch | 13.67 |
DIV/SQRT | 6.00 |
Overall L1 | 19.17 |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 9% |
load | 11% |
store | 8% |
mul | 6% |
add-sub | 10% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 9% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SUB $0x88,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV 0x48(%RDI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x54(%RDI),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x28(%RDI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x58(%RDI),%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x40(%RDI),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x30(%RDI),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RDI,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x20(%RDI),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RDX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RCX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %EAX,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CALL 402080 <@plt_start@+0x60> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EAX,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 402180 <@plt_start@+0x160> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x5c(%R10),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
INC %EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %R13D,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CLTD | |||||||||||||||||
IDIV %R14D | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-14 | 6 |
CMP %EDX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JL 42e65c <__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0.lto_priv.0+0x55c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
IMUL %EAX,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %ESI,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %EAX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 42e630 <__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0.lto_priv.0+0x530> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV 0x8(%R10),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x70(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%R13,%RSI,1),%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %R13D,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVSXD %EDI,%R13 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %EAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVQ 0x10(%R10),%XMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (,%RBX,8),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ 0x38(%R10),%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ (%R10),%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ %RAX,%XMM1 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
LEA (,%R12,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ 0x18(%R10),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %EDI,-0x4c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVB $0,-0x55(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R10,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVQ %RDX,%XMM0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV (%R8),%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
IMUL %RCX,%R13 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R12,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x5,%R8 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (%R13,%R15,1),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LEA (%RBX,%RBX,2),%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%R12,%R12,2),%R13 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x1(%RDI,%R14,1),%R11D | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MOV %R14D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x1(%R14),%R9D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R14D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL %R14D,%R11D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
AND $-0x8,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R9D,-0x8c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SHR $0x3,%R15D | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %EAX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R14D,-0x3c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R12,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R11D,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R15D,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R12,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (,%R13,8),%R13 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SAL $0x6,%R15 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %EAX,-0xa4(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SAL $0x5,%RDI | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SAL $0x4,%RCX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SAL $0x6,%R11 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SAL $0x3,%R8 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SAL $0x4,%R9 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
TEST %R14D,%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMOVNS %R14D,%EDX | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R15,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RSI,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %EDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %EDX,-0x84(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
CMPB $0,-0x55(%RBP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV -0xb0(%RBP),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
JE 42e630 <__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0.lto_priv.0+0x530> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x5c(%RBP),%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %R12D,0x50(%RBX) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD $0x88,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
RET | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
INC %EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 42e169 <__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0.lto_priv.0+0x69> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0.lto_priv.0– | 0.01 | 0.01 |
▼Loop 186 - pack_kernel.f90:204-207 - exec– | 0.01 | 0.01 |
○Loop 187 - pack_kernel.f90:207-207 - exec | 0 | 0 |