Function: __generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0 | Module: exec | Source: generate_chunk_kernel.f90:85-161 | Coverage: 0.05% |
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Function: __generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0 | Module: exec | Source: generate_chunk_kernel.f90:85-161 | Coverage: 0.05% |
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/beegfs/hackathon/users/eoseret/qaas_runs/170-861-0321/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/generate_chunk_kernel.f90: 85 - 161 |
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85: !$OMP PARALLEL SHARED(x_cent,y_cent) |
86: !$OMP DO |
87: DO k=y_min-2,y_max+2 |
88: !$OMP SIMD |
89: DO j=x_min-2,x_max+2 |
90: energy0(j,k)=state_energy(1) |
91: ENDDO |
92: ENDDO |
93: !$OMP END DO |
94: !$OMP DO |
95: DO k=y_min-2,y_max+2 |
96: !$OMP SIMD |
97: DO j=x_min-2,x_max+2 |
98: density0(j,k)=state_density(1) |
99: ENDDO |
100: ENDDO |
101: !$OMP END DO |
102: !$OMP DO |
103: DO k=y_min-2,y_max+2 |
104: !$OMP SIMD |
105: DO j=x_min-2,x_max+2 |
106: xvel0(j,k)=state_xvel(1) |
107: ENDDO |
108: ENDDO |
109: !$OMP END DO |
110: !$OMP DO |
111: DO k=y_min-2,y_max+2 |
112: !$OMP SIMD |
113: DO j=x_min-2,x_max+2 |
114: yvel0(j,k)=state_yvel(1) |
115: ENDDO |
116: ENDDO |
117: !$OMP END DO |
118: |
119: DO state=2,number_of_states |
120: |
121: ! Could the velocity setting be thread unsafe? |
122: x_cent=state_xmin(state) |
123: y_cent=state_ymin(state) |
124: |
125: !$OMP DO PRIVATE(radius,jt,kt) |
126: DO k=y_min-2,y_max+2 |
127: !$OMP SIMD |
128: DO j=x_min-2,x_max+2 |
129: IF(state_geometry(state).EQ.g_rect ) THEN |
130: IF(vertexx(j+1).GE.state_xmin(state).AND.vertexx(j).LT.state_xmax(state)) THEN |
131: IF(vertexy(k+1).GE.state_ymin(state).AND.vertexy(k).LT.state_ymax(state)) THEN |
132: energy0(j,k)=state_energy(state) |
133: density0(j,k)=state_density(state) |
134: DO kt=k,k+1 |
135: DO jt=j,j+1 |
136: xvel0(jt,kt)=state_xvel(state) |
137: yvel0(jt,kt)=state_yvel(state) |
138: ENDDO |
139: ENDDO |
140: ENDIF |
141: ENDIF |
142: ELSEIF(state_geometry(state).EQ.g_circ ) THEN |
143: radius=SQRT((cellx(j)-x_cent)*(cellx(j)-x_cent)+(celly(k)-y_cent)*(celly(k)-y_cent)) |
144: IF(radius.LE.state_radius(state))THEN |
145: energy0(j,k)=state_energy(state) |
146: density0(j,k)=state_density(state) |
147: DO kt=k,k+1 |
148: DO jt=j,j+1 |
149: xvel0(jt,kt)=state_xvel(state) |
150: yvel0(jt,kt)=state_yvel(state) |
151: ENDDO |
152: ENDDO |
153: ENDIF |
154: ELSEIF(state_geometry(state).EQ.g_point) THEN |
155: IF(vertexx(j).EQ.x_cent .AND. vertexy(k).EQ.y_cent) THEN |
156: energy0(j,k)=state_energy(state) |
157: density0(j,k)=state_density(state) |
158: DO kt=k,k+1 |
159: DO jt=j,j+1 |
160: xvel0(jt,kt)=state_xvel(state) |
161: yvel0(jt,kt)=state_yvel(state) |
0x4340b0 PUSH %RBP |
0x4340b1 MOV %RSP,%RBP |
0x4340b4 PUSH %R15 |
0x4340b6 PUSH %R14 |
0x4340b8 PUSH %R13 |
0x4340ba PUSH %R12 |
0x4340bc PUSH %RBX |
0x4340bd MOV %RDI,%R13 |
0x4340c0 AND $-0x40,%RSP |
0x4340c4 SUB $0x100,%RSP |
0x4340cb MOV 0x128(%RDI),%RAX |
0x4340d2 MOV 0x120(%RDI),%RDX |
0x4340d9 MOV 0x118(%RDI),%RCX |
0x4340e0 MOV 0x108(%RDI),%RSI |
0x4340e7 MOV 0x100(%RDI),%R8 |
0x4340ee MOV 0xf8(%RDI),%R9 |
0x4340f5 MOV 0xf0(%RDI),%R10 |
0x4340fc MOV 0xe8(%RDI),%R11 |
0x434103 MOV 0xe0(%RDI),%R12 |
0x43410a MOV 0x110(%RDI),%RBX |
0x434111 MOV 0xd8(%RDI),%R14 |
0x434118 MOV %RAX,0x60(%RSP) |
0x43411d MOV 0xd0(%RDI),%RAX |
0x434124 MOV 0x10(%RDI),%RDI |
0x434128 MOV %RDX,0xe0(%RSP) |
0x434130 MOV %RCX,0x58(%RSP) |
0x434135 MOV %RSI,0x48(%RSP) |
0x43413a MOV %R8,0x88(%RSP) |
0x434142 MOV %R9,0x40(%RSP) |
0x434147 MOV %R10,0xa0(%RSP) |
0x43414f MOV %R11,0x90(%RSP) |
0x434157 MOV %R12,0xa8(%RSP) |
0x43415f MOV %RBX,0xd8(%RSP) |
0x434167 MOV %R14,0x80(%RSP) |
0x43416f MOV %RAX,0x38(%RSP) |
0x434174 MOV (%RDI),%EBX |
0x434176 CALL 402080 <@plt_start@+0x60> |
0x43417b MOV %EAX,%R12D |
0x43417e MOV %EAX,0x74(%RSP) |
0x434182 CALL 402180 <@plt_start@+0x160> |
0x434187 MOV 0x18(%R13),%RDX |
0x43418b MOV %EAX,%ECX |
0x43418d MOV %EAX,0xf8(%RSP) |
0x434194 SUB $0x2,%EBX |
0x434197 MOV (%RDX),%EAX |
0x434199 ADD $0x3,%EAX |
0x43419c SUB %EBX,%EAX |
0x43419e CLTD |
0x43419f IDIV %R12D |
0x4341a2 CMP %EDX,%ECX |
0x4341a4 JL 4357ee |
0x4341aa MOV 0xf8(%RSP),%ESI |
0x4341b1 IMUL %EAX,%ESI |
0x4341b4 ADD %EDX,%ESI |
0x4341b6 ADD %ESI,%EAX |
0x4341b8 CMP %EAX,%ESI |
0x4341ba JGE 4344dd |
0x4341c0 MOV (%R13),%R8 |
0x4341c4 MOV 0x8(%R13),%R9 |
0x4341c8 ADD %EBX,%EAX |
0x4341ca MOV 0xa0(%RSP),%R10 |
0x4341d2 MOV %EAX,0xe8(%RSP) |
0x4341d9 ADD %EBX,%ESI |
0x4341db MOV 0x48(%R13),%R12 |
0x4341df MOV 0x70(%R13),%R11 |
0x4341e3 MOV %R13,0x50(%RSP) |
0x4341e8 VMOVD %R15D,%XMM6 |
0x4341ed MOV (%R8),%EDX |
0x4341f0 MOV (%R9),%EAX |
0x4341f3 MOV 0x40(%RSP),%R9 |
0x4341f8 LEA (,%R10,8),%RBX |
0x434200 VMOVQ %RBX,%XMM5 |
0x434205 MOVSXD %EDX,%RCX |
0x434208 LEA 0x3(%RAX),%EDI |
0x43420b SUB %EDX,%EAX |
0x43420d LEA -0x2(%RDX),%R14D |
0x434211 VMOVQ %RCX,%XMM3 |
0x434216 MOVSXD %ESI,%RCX |
0x434219 MOV %EAX,%EBX |
0x43421b MOV %EAX,0xd4(%RSP) |
0x434222 IMUL %R10,%RCX |
0x434226 VMOVQ %XMM3,%R8 |
0x43422b LEA 0x5(%RAX),%EAX |
0x43422e MOV %R14D,0xf4(%RSP) |
0x434236 LEA (%R8,%R9,1),%R10 |
0x43423a VMOVQ %XMM3,%R13 |
0x43423f ADD %RCX,%R10 |
0x434242 ADD %R9,%RCX |
0x434245 MOV %EAX,%R9D |
0x434248 SHR $0x3,%R9D |
0x43424c LEA -0x10(%R12,%R10,8),%R8 |
0x434251 MOV %EAX,%R10D |
0x434254 SAL $0x6,%R9 |
0x434258 AND $-0x8,%R10D |
0x43425c MOV %R9,0xc8(%RSP) |
0x434264 CMP %EDI,%R14D |
0x434267 LEA -0x2(%RDX,%R10,1),%R9D |
0x43426c LEA 0x3(%RDX,%RBX,1),%EDX |
0x434270 MOV %R10D,0xb8(%RSP) |
0x434278 CMOVGE %R14D,%EDX |
0x43427c LEA 0x4(%RBX),%R14D |
0x434280 MOV 0x98(%RSP),%EBX |
0x434287 AND $0x7,%EAX |
0x43428a MOV %R14D,0xf0(%RSP) |
0x434292 VMOVD %EDX,%XMM0 |
0x434296 XOR %R10D,%R10D |
0x434299 MOV $0x1,%R14D |
0x43429f MOV %R9D,0xb0(%RSP) |
0x4342a7 MOV %EAX,0xc0(%RSP) |
0x4342ae XCHG %AX,%AX |
(242) 0x4342b0 CMP %EDI,0xf4(%RSP) |
(242) 0x4342b7 JGE 43448a |
(242) 0x4342bd CMPL $0x6,0xf0(%RSP) |
(242) 0x4342c5 JBE 4357d7 |
(242) 0x4342cb MOV 0xc8(%RSP),%R15 |
(242) 0x4342d3 MOV %R8,%RAX |
(242) 0x4342d6 LEA (%R15,%R8,1),%R9 |
(242) 0x4342da SUB $0x40,%R15 |
(242) 0x4342de SHR $0x6,%R15 |
(242) 0x4342e2 INC %R15 |
(242) 0x4342e5 AND $0x7,%R15D |
(242) 0x4342e9 JE 434382 |
(242) 0x4342ef CMP $0x1,%R15 |
(242) 0x4342f3 JE 43436c |
(242) 0x4342f5 CMP $0x2,%R15 |
(242) 0x4342f9 JE 43435b |
(242) 0x4342fb CMP $0x3,%R15 |
(242) 0x4342ff JE 43434a |
(242) 0x434301 CMP $0x4,%R15 |
(242) 0x434305 JE 434339 |
(242) 0x434307 CMP $0x5,%R15 |
(242) 0x43430b JE 434328 |
(242) 0x43430d CMP $0x6,%R15 |
(242) 0x434311 JNE 435798 |
(242) 0x434317 VBROADCASTSD (%R11),%ZMM1 |
(242) 0x43431d ADD $0x40,%RAX |
(242) 0x434321 VMOVUPD %ZMM1,-0x40(%RAX) |
(242) 0x434328 VBROADCASTSD (%R11),%ZMM4 |
(242) 0x43432e ADD $0x40,%RAX |
(242) 0x434332 VMOVUPD %ZMM4,-0x40(%RAX) |
(242) 0x434339 VBROADCASTSD (%R11),%ZMM7 |
(242) 0x43433f ADD $0x40,%RAX |
(242) 0x434343 VMOVUPD %ZMM7,-0x40(%RAX) |
(242) 0x43434a VBROADCASTSD (%R11),%ZMM8 |
(242) 0x434350 ADD $0x40,%RAX |
(242) 0x434354 VMOVUPD %ZMM8,-0x40(%RAX) |
(242) 0x43435b VBROADCASTSD (%R11),%ZMM9 |
(242) 0x434361 ADD $0x40,%RAX |
(242) 0x434365 VMOVUPD %ZMM9,-0x40(%RAX) |
(242) 0x43436c VBROADCASTSD (%R11),%ZMM10 |
(242) 0x434372 ADD $0x40,%RAX |
(242) 0x434376 VMOVUPD %ZMM10,-0x40(%RAX) |
(242) 0x43437d CMP %R9,%RAX |
(242) 0x434380 JE 4343f5 |
(243) 0x434382 VBROADCASTSD (%R11),%ZMM11 |
(243) 0x434388 ADD $0x200,%RAX |
(243) 0x43438e VMOVUPD %ZMM11,-0x200(%RAX) |
(243) 0x434395 VBROADCASTSD (%R11),%ZMM12 |
(243) 0x43439b VMOVUPD %ZMM12,-0x1c0(%RAX) |
(243) 0x4343a2 VBROADCASTSD (%R11),%ZMM13 |
(243) 0x4343a8 VMOVUPD %ZMM13,-0x180(%RAX) |
(243) 0x4343af VBROADCASTSD (%R11),%ZMM14 |
(243) 0x4343b5 VMOVUPD %ZMM14,-0x140(%RAX) |
(243) 0x4343bc VBROADCASTSD (%R11),%ZMM15 |
(243) 0x4343c2 VMOVUPD %ZMM15,-0x100(%RAX) |
(243) 0x4343c9 VBROADCASTSD (%R11),%ZMM3 |
(243) 0x4343cf VMOVUPD %ZMM3,-0xc0(%RAX) |
(243) 0x4343d6 VBROADCASTSD (%R11),%ZMM2 |
(243) 0x4343dc VMOVUPD %ZMM2,-0x80(%RAX) |
(243) 0x4343e3 VBROADCASTSD (%R11),%ZMM1 |
(243) 0x4343e9 VMOVUPD %ZMM1,-0x40(%RAX) |
(243) 0x4343f0 CMP %R9,%RAX |
(243) 0x4343f3 JNE 434382 |
(242) 0x4343f5 MOV 0xc0(%RSP),%EDX |
(242) 0x4343fc TEST %EDX,%EDX |
(242) 0x4343fe JE 43448a |
(242) 0x434404 MOV 0xb8(%RSP),%EDX |
(242) 0x43440b MOV 0xb0(%RSP),%EAX |
(242) 0x434412 MOV 0xd4(%RSP),%R15D |
(242) 0x43441a SUB %EDX,%R15D |
(242) 0x43441d LEA 0x5(%R15),%R9D |
(242) 0x434421 ADD $0x4,%R15D |
(242) 0x434425 CMP $0x2,%R15D |
(242) 0x434429 JBE 43444d |
(242) 0x43442b VBROADCASTSD (%R11),%YMM4 |
(242) 0x434430 LEA (%R13,%RCX,1),%R15 |
(242) 0x434435 ADD %R15,%RDX |
(242) 0x434438 VMOVUPD %YMM4,-0x10(%R12,%RDX,8) |
(242) 0x43443f MOV %R9D,%EDX |
(242) 0x434442 AND $-0x4,%EDX |
(242) 0x434445 ADD %EDX,%EAX |
(242) 0x434447 AND $0x3,%R9D |
(242) 0x43444b JE 43448a |
(242) 0x43444d MOVSXD %EAX,%R9 |
(242) 0x434450 LEA 0x1(%RAX),%R15D |
(242) 0x434454 VMOVSD (%R11),%XMM7 |
(242) 0x434459 ADD %RCX,%R9 |
(242) 0x43445c VMOVSD %XMM7,(%R12,%R9,8) |
(242) 0x434462 CMP %R15D,%EDI |
(242) 0x434465 JLE 43448a |
(242) 0x434467 MOVSXD %R15D,%RDX |
(242) 0x43446a ADD $0x2,%EAX |
(242) 0x43446d ADD %RCX,%RDX |
(242) 0x434470 VMOVSD %XMM7,(%R12,%RDX,8) |
(242) 0x434476 CMP %EAX,%EDI |
(242) 0x434478 JLE 43448a |
(242) 0x43447a CLTQ |
(242) 0x43447c VMOVSD (%R11),%XMM8 |
(242) 0x434481 ADD %RCX,%RAX |
(242) 0x434484 VMOVSD %XMM8,(%R12,%RAX,8) |
(242) 0x43448a MOV 0xa0(%RSP),%R15 |
(242) 0x434492 VMOVD %XMM0,%EAX |
(242) 0x434496 VMOVQ %XMM5,%R9 |
(242) 0x43449b CMP %EAX,%EDI |
(242) 0x43449d CMOVE %EDI,%EBX |
(242) 0x4344a0 CMOVE %R14D,%R10D |
(242) 0x4344a4 INC %ESI |
(242) 0x4344a6 ADD %R9,%R8 |
(242) 0x4344a9 ADD %R15,%RCX |
(242) 0x4344ac CMP %ESI,0xe8(%RSP) |
(242) 0x4344b3 JG 4342b0 |
0x4344b9 MOV 0x50(%RSP),%R13 |
0x4344be VMOVD %XMM6,%R15D |
0x4344c3 MOV %EBX,0x98(%RSP) |
0x4344ca TEST %R10B,%R10B |
0x4344cd JE 435819 |
0x4344d3 MOV %EBX,0x140(%R13) |
0x4344da VZEROUPPER |
0x4344dd CALL 402220 <@plt_start@+0x200> |
0x4344e2 MOV 0x10(%R13),%RSI |
0x4344e6 MOV 0x18(%R13),%R11 |
0x4344ea MOV (%RSI),%EDI |
0x4344ec MOV (%R11),%EAX |
0x4344ef SUB $0x2,%EDI |
0x4344f2 ADD $0x3,%EAX |
0x4344f5 SUB %EDI,%EAX |
0x4344f7 CLTD |
0x4344f8 IDIVL 0x74(%RSP) |
0x4344fc CMP %EDX,0xf8(%RSP) |
0x434503 JL 4357f7 |
0x434509 MOV 0xf8(%RSP),%ESI |
0x434510 IMUL %EAX,%ESI |
0x434513 ADD %EDX,%ESI |
0x434515 ADD %ESI,%EAX |
0x434517 CMP %EAX,%ESI |
0x434519 JGE 43484d |
0x43451f MOV (%R13),%R12 |
0x434523 MOV 0x8(%R13),%RCX |
0x434527 MOV 0xa8(%RSP),%R8 |
0x43452f ADD %EDI,%EAX |
0x434531 ADD %EDI,%ESI |
0x434533 MOV %EAX,0xe8(%RSP) |
0x43453a MOV 0x68(%R13),%R11 |
0x43453e MOV %R13,0x98(%RSP) |
0x434546 VMOVD %R15D,%XMM6 |
0x43454b MOV (%R12),%EDX |
0x43454f MOV (%RCX),%R9D |
0x434552 LEA (,%R8,8),%R10 |
0x43455a MOVSXD %ESI,%RCX |
0x43455d VMOVQ %R10,%XMM5 |
0x434562 MOV 0x90(%RSP),%R10 |
0x43456a MOV 0x40(%R13),%R12 |
0x43456e IMUL %R8,%RCX |
0x434572 LEA 0x3(%R9),%EDI |
0x434576 SUB %EDX,%R9D |
0x434579 MOVSXD %EDX,%RBX |
0x43457c LEA -0x2(%RDX),%R14D |
0x434580 LEA 0x5(%R9),%EAX |
0x434584 LEA (%RBX,%R10,1),%R8 |
0x434588 VMOVQ %RBX,%XMM9 |
0x43458d MOV %R9D,0xd4(%RSP) |
0x434595 MOV %R9D,%EBX |
0x434598 MOV %EAX,%R9D |
0x43459b ADD %RCX,%R8 |
0x43459e ADD %R10,%RCX |
0x4345a1 SHR $0x3,%R9D |
0x4345a5 MOV %R14D,0xf4(%RSP) |
0x4345ad VMOVQ %XMM9,%R13 |
0x4345b2 SAL $0x6,%R9 |
0x4345b6 MOV %EAX,%R10D |
0x4345b9 MOV %R9,0xc8(%RSP) |
0x4345c1 LEA -0x10(%R12,%R8,8),%R8 |
0x4345c6 AND $-0x8,%R10D |
0x4345ca CMP %EDI,%R14D |
0x4345cd LEA -0x2(%RDX,%R10,1),%R9D |
0x4345d2 LEA 0x3(%RDX,%RBX,1),%EDX |
0x4345d6 MOV %R10D,0xb8(%RSP) |
0x4345de CMOVGE %R14D,%EDX |
0x4345e2 LEA 0x4(%RBX),%R14D |
0x4345e6 MOV 0x78(%RSP),%EBX |
0x4345ea AND $0x7,%EAX |
0x4345ed MOV %R14D,0xf0(%RSP) |
0x4345f5 VMOVD %EDX,%XMM0 |
0x4345f9 XOR %R10D,%R10D |
0x4345fc MOV $0x1,%R14D |
0x434602 MOV %R9D,0xb0(%RSP) |
0x43460a MOV %EAX,0xc0(%RSP) |
0x434611 NOPW %CS:(%RAX,%RAX,1) |
0x43461c NOPL (%RAX) |
(240) 0x434620 CMP %EDI,0xf4(%RSP) |
(240) 0x434627 JGE 4347fa |
(240) 0x43462d CMPL $0x6,0xf0(%RSP) |
(240) 0x434635 JBE 4357ad |
(240) 0x43463b MOV 0xc8(%RSP),%R15 |
(240) 0x434643 MOV %R8,%RAX |
(240) 0x434646 LEA (%R15,%R8,1),%R9 |
(240) 0x43464a SUB $0x40,%R15 |
(240) 0x43464e SHR $0x6,%R15 |
(240) 0x434652 INC %R15 |
(240) 0x434655 AND $0x7,%R15D |
(240) 0x434659 JE 4346f2 |
(240) 0x43465f CMP $0x1,%R15 |
(240) 0x434663 JE 4346dc |
(240) 0x434665 CMP $0x2,%R15 |
(240) 0x434669 JE 4346cb |
(240) 0x43466b CMP $0x3,%R15 |
(240) 0x43466f JE 4346ba |
(240) 0x434671 CMP $0x4,%R15 |
(240) 0x434675 JE 4346a9 |
(240) 0x434677 CMP $0x5,%R15 |
(240) 0x43467b JE 434698 |
(240) 0x43467d CMP $0x6,%R15 |
(240) 0x434681 JNE 435783 |
(240) 0x434687 VBROADCASTSD (%R11),%ZMM11 |
(240) 0x43468d ADD $0x40,%RAX |
(240) 0x434691 VMOVUPD %ZMM11,-0x40(%RAX) |
(240) 0x434698 VBROADCASTSD (%R11),%ZMM12 |
(240) 0x43469e ADD $0x40,%RAX |
(240) 0x4346a2 VMOVUPD %ZMM12,-0x40(%RAX) |
(240) 0x4346a9 VBROADCASTSD (%R11),%ZMM13 |
(240) 0x4346af ADD $0x40,%RAX |
(240) 0x4346b3 VMOVUPD %ZMM13,-0x40(%RAX) |
(240) 0x4346ba VBROADCASTSD (%R11),%ZMM14 |
(240) 0x4346c0 ADD $0x40,%RAX |
(240) 0x4346c4 VMOVUPD %ZMM14,-0x40(%RAX) |
(240) 0x4346cb VBROADCASTSD (%R11),%ZMM15 |
(240) 0x4346d1 ADD $0x40,%RAX |
(240) 0x4346d5 VMOVUPD %ZMM15,-0x40(%RAX) |
(240) 0x4346dc VBROADCASTSD (%R11),%ZMM3 |
(240) 0x4346e2 ADD $0x40,%RAX |
(240) 0x4346e6 VMOVUPD %ZMM3,-0x40(%RAX) |
(240) 0x4346ed CMP %R9,%RAX |
(240) 0x4346f0 JE 434765 |
(241) 0x4346f2 VBROADCASTSD (%R11),%ZMM2 |
(241) 0x4346f8 ADD $0x200,%RAX |
(241) 0x4346fe VMOVUPD %ZMM2,-0x200(%RAX) |
(241) 0x434705 VBROADCASTSD (%R11),%ZMM1 |
(241) 0x43470b VMOVUPD %ZMM1,-0x1c0(%RAX) |
(241) 0x434712 VBROADCASTSD (%R11),%ZMM4 |
(241) 0x434718 VMOVUPD %ZMM4,-0x180(%RAX) |
(241) 0x43471f VBROADCASTSD (%R11),%ZMM7 |
(241) 0x434725 VMOVUPD %ZMM7,-0x140(%RAX) |
(241) 0x43472c VBROADCASTSD (%R11),%ZMM8 |
(241) 0x434732 VMOVUPD %ZMM8,-0x100(%RAX) |
(241) 0x434739 VBROADCASTSD (%R11),%ZMM9 |
(241) 0x43473f VMOVUPD %ZMM9,-0xc0(%RAX) |
(241) 0x434746 VBROADCASTSD (%R11),%ZMM10 |
(241) 0x43474c VMOVUPD %ZMM10,-0x80(%RAX) |
(241) 0x434753 VBROADCASTSD (%R11),%ZMM11 |
(241) 0x434759 VMOVUPD %ZMM11,-0x40(%RAX) |
(241) 0x434760 CMP %R9,%RAX |
(241) 0x434763 JNE 4346f2 |
(240) 0x434765 MOV 0xc0(%RSP),%EDX |
(240) 0x43476c TEST %EDX,%EDX |
(240) 0x43476e JE 4347fa |
(240) 0x434774 MOV 0xb8(%RSP),%EDX |
(240) 0x43477b MOV 0xb0(%RSP),%EAX |
(240) 0x434782 MOV 0xd4(%RSP),%R15D |
(240) 0x43478a SUB %EDX,%R15D |
(240) 0x43478d LEA 0x5(%R15),%R9D |
(240) 0x434791 ADD $0x4,%R15D |
(240) 0x434795 CMP $0x2,%R15D |
(240) 0x434799 JBE 4347bd |
(240) 0x43479b VBROADCASTSD (%R11),%YMM12 |
(240) 0x4347a0 LEA (%R13,%RCX,1),%R15 |
(240) 0x4347a5 ADD %R15,%RDX |
(240) 0x4347a8 VMOVUPD %YMM12,-0x10(%R12,%RDX,8) |
(240) 0x4347af MOV %R9D,%EDX |
(240) 0x4347b2 AND $-0x4,%EDX |
(240) 0x4347b5 ADD %EDX,%EAX |
(240) 0x4347b7 AND $0x3,%R9D |
(240) 0x4347bb JE 4347fa |
(240) 0x4347bd MOVSXD %EAX,%R9 |
(240) 0x4347c0 LEA 0x1(%RAX),%R15D |
(240) 0x4347c4 VMOVSD (%R11),%XMM13 |
(240) 0x4347c9 ADD %RCX,%R9 |
(240) 0x4347cc VMOVSD %XMM13,(%R12,%R9,8) |
(240) 0x4347d2 CMP %R15D,%EDI |
(240) 0x4347d5 JLE 4347fa |
(240) 0x4347d7 MOVSXD %R15D,%RDX |
(240) 0x4347da ADD $0x2,%EAX |
(240) 0x4347dd ADD %RCX,%RDX |
(240) 0x4347e0 VMOVSD %XMM13,(%R12,%RDX,8) |
(240) 0x4347e6 CMP %EAX,%EDI |
(240) 0x4347e8 JLE 4347fa |
(240) 0x4347ea CLTQ |
(240) 0x4347ec VMOVSD (%R11),%XMM14 |
(240) 0x4347f1 ADD %RCX,%RAX |
(240) 0x4347f4 VMOVSD %XMM14,(%R12,%RAX,8) |
(240) 0x4347fa MOV 0xa8(%RSP),%R15 |
(240) 0x434802 VMOVD %XMM0,%EAX |
(240) 0x434806 VMOVQ %XMM5,%R9 |
(240) 0x43480b CMP %EAX,%EDI |
(240) 0x43480d CMOVE %EDI,%EBX |
(240) 0x434810 CMOVE %R14D,%R10D |
(240) 0x434814 INC %ESI |
(240) 0x434816 ADD %R9,%R8 |
(240) 0x434819 ADD %R15,%RCX |
(240) 0x43481c CMP %ESI,0xe8(%RSP) |
(240) 0x434823 JG 434620 |
0x434829 MOV 0x98(%RSP),%R13 |
0x434831 VMOVD %XMM6,%R15D |
0x434836 MOV %EBX,0x78(%RSP) |
0x43483a TEST %R10B,%R10B |
0x43483d JE 435821 |
0x434843 MOV %EBX,0x140(%R13) |
0x43484a VZEROUPPER |
0x43484d CALL 402220 <@plt_start@+0x200> |
0x434852 MOV 0x10(%R13),%RSI |
0x434856 MOV 0x18(%R13),%R11 |
0x43485a MOV (%RSI),%EDI |
0x43485c MOV (%R11),%EAX |
0x43485f SUB $0x2,%EDI |
0x434862 ADD $0x3,%EAX |
0x434865 SUB %EDI,%EAX |
0x434867 CLTD |
0x434868 IDIVL 0x74(%RSP) |
0x43486c CMP %EDX,0xf8(%RSP) |
0x434873 JL 4357e5 |
0x434879 MOV 0xf8(%RSP),%ESI |
0x434880 IMUL %EAX,%ESI |
0x434883 ADD %EDX,%ESI |
0x434885 ADD %ESI,%EAX |
0x434887 CMP %EAX,%ESI |
0x434889 JGE 434bac |
0x43488f MOV (%R13),%R12 |
0x434893 MOV 0x8(%R13),%RCX |
0x434897 MOV 0xd8(%RSP),%R8 |
0x43489f ADD %EDI,%ESI |
0x4348a1 ADD %EDI,%EAX |
0x4348a3 MOV 0x50(%R13),%R11 |
0x4348a7 VMOVD %R15D,%XMM6 |
0x4348ac MOV %R13,0xb0(%RSP) |
0x4348b4 MOV %EAX,0xe8(%RSP) |
0x4348bb MOV (%R12),%EDX |
0x4348bf MOV (%RCX),%R9D |
0x4348c2 LEA (,%R8,8),%R10 |
0x4348ca MOVSXD %ESI,%RCX |
0x4348cd VMOVQ %R10,%XMM5 |
0x4348d2 MOV 0x58(%RSP),%R10 |
0x4348d7 MOV 0x78(%R13),%R12 |
0x4348db MOV %R11,%R15 |
0x4348de IMUL %R8,%RCX |
0x4348e2 MOVSXD %EDX,%RBX |
0x4348e5 LEA 0x3(%R9),%EDI |
0x4348e9 SUB %EDX,%R9D |
0x4348ec LEA -0x2(%RDX),%R14D |
0x4348f0 LEA (%RBX,%R10,1),%R8 |
0x4348f4 LEA 0x5(%R9),%EAX |
0x4348f8 VMOVQ %RBX,%XMM0 |
0x4348fd MOV %R9D,%EBX |
0x434900 ADD %RCX,%R8 |
0x434903 ADD %R10,%RCX |
0x434906 MOV %EAX,%R10D |
0x434909 MOV %R9D,0xd4(%RSP) |
0x434911 AND $-0x8,%R10D |
0x434915 MOV %EAX,%R9D |
0x434918 LEA -0x10(%R11,%R8,8),%R8 |
0x43491d MOV %R14D,0xf4(%RSP) |
0x434925 MOV %R10D,0xc0(%RSP) |
0x43492d LEA -0x2(%RDX,%R10,1),%R10D |
0x434932 LEA 0x3(%RDX,%RBX,1),%EDX |
0x434936 LEA 0x4(%RBX),%EBX |
0x434939 SHR $0x3,%R9D |
0x43493d MOV %EBX,0xf0(%RSP) |
0x434944 MOV %R10D,0xb8(%RSP) |
0x43494c VMOVQ %XMM0,%R13 |
0x434951 MOV 0x68(%RSP),%EBX |
0x434955 MOV %R12,%R11 |
0x434958 SAL $0x6,%R9 |
0x43495c CMP %EDI,%R14D |
0x43495f CMOVGE %R14D,%EDX |
0x434963 AND $0x7,%EAX |
0x434966 XOR %R10D,%R10D |
0x434969 MOV %R9,%R14 |
0x43496c VMOVD %EDX,%XMM15 |
0x434970 MOV %EAX,0xc8(%RSP) |
0x434977 NOPW (%RAX,%RAX,1) |
(238) 0x434980 CMP %EDI,0xf4(%RSP) |
(238) 0x434987 JGE 434b53 |
(238) 0x43498d CMPL $0x6,0xf0(%RSP) |
(238) 0x434995 JBE 4357c9 |
(238) 0x43499b LEA -0x40(%R14),%R9 |
(238) 0x43499f LEA (%R14,%R8,1),%R12 |
(238) 0x4349a3 MOV %R8,%RAX |
(238) 0x4349a6 SHR $0x6,%R9 |
(238) 0x4349aa INC %R9 |
(238) 0x4349ad AND $0x7,%R9D |
(238) 0x4349b1 JE 434a4a |
(238) 0x4349b7 CMP $0x1,%R9 |
(238) 0x4349bb JE 434a34 |
(238) 0x4349bd CMP $0x2,%R9 |
(238) 0x4349c1 JE 434a23 |
(238) 0x4349c3 CMP $0x3,%R9 |
(238) 0x4349c7 JE 434a12 |
(238) 0x4349c9 CMP $0x4,%R9 |
(238) 0x4349cd JE 434a01 |
(238) 0x4349cf CMP $0x5,%R9 |
(238) 0x4349d3 JE 4349f0 |
(238) 0x4349d5 CMP $0x6,%R9 |
(238) 0x4349d9 JNE 43576e |
(238) 0x4349df VBROADCASTSD (%R11),%ZMM2 |
(238) 0x4349e5 ADD $0x40,%RAX |
(238) 0x4349e9 VMOVUPD %ZMM2,-0x40(%RAX) |
(238) 0x4349f0 VBROADCASTSD (%R11),%ZMM1 |
(238) 0x4349f6 ADD $0x40,%RAX |
(238) 0x4349fa VMOVUPD %ZMM1,-0x40(%RAX) |
(238) 0x434a01 VBROADCASTSD (%R11),%ZMM4 |
(238) 0x434a07 ADD $0x40,%RAX |
(238) 0x434a0b VMOVUPD %ZMM4,-0x40(%RAX) |
(238) 0x434a12 VBROADCASTSD (%R11),%ZMM7 |
(238) 0x434a18 ADD $0x40,%RAX |
(238) 0x434a1c VMOVUPD %ZMM7,-0x40(%RAX) |
(238) 0x434a23 VBROADCASTSD (%R11),%ZMM8 |
(238) 0x434a29 ADD $0x40,%RAX |
(238) 0x434a2d VMOVUPD %ZMM8,-0x40(%RAX) |
(238) 0x434a34 VBROADCASTSD (%R11),%ZMM9 |
(238) 0x434a3a ADD $0x40,%RAX |
(238) 0x434a3e VMOVUPD %ZMM9,-0x40(%RAX) |
(238) 0x434a45 CMP %R12,%RAX |
(238) 0x434a48 JE 434abd |
(239) 0x434a4a VBROADCASTSD (%R11),%ZMM10 |
(239) 0x434a50 ADD $0x200,%RAX |
(239) 0x434a56 VMOVUPD %ZMM10,-0x200(%RAX) |
(239) 0x434a5d VBROADCASTSD (%R11),%ZMM11 |
(239) 0x434a63 VMOVUPD %ZMM11,-0x1c0(%RAX) |
(239) 0x434a6a VBROADCASTSD (%R11),%ZMM12 |
(239) 0x434a70 VMOVUPD %ZMM12,-0x180(%RAX) |
(239) 0x434a77 VBROADCASTSD (%R11),%ZMM13 |
(239) 0x434a7d VMOVUPD %ZMM13,-0x140(%RAX) |
(239) 0x434a84 VBROADCASTSD (%R11),%ZMM14 |
(239) 0x434a8a VMOVUPD %ZMM14,-0x100(%RAX) |
(239) 0x434a91 VBROADCASTSD (%R11),%ZMM0 |
(239) 0x434a97 VMOVUPD %ZMM0,-0xc0(%RAX) |
(239) 0x434a9e VBROADCASTSD (%R11),%ZMM3 |
(239) 0x434aa4 VMOVUPD %ZMM3,-0x80(%RAX) |
(239) 0x434aab VBROADCASTSD (%R11),%ZMM2 |
(239) 0x434ab1 VMOVUPD %ZMM2,-0x40(%RAX) |
(239) 0x434ab8 CMP %R12,%RAX |
(239) 0x434abb JNE 434a4a |
(238) 0x434abd MOV 0xc8(%RSP),%EDX |
(238) 0x434ac4 TEST %EDX,%EDX |
(238) 0x434ac6 JE 434b53 |
(238) 0x434acc MOV 0xc0(%RSP),%EDX |
(238) 0x434ad3 MOV 0xb8(%RSP),%EAX |
(238) 0x434ada MOV 0xd4(%RSP),%R12D |
(238) 0x434ae2 SUB %EDX,%R12D |
(238) 0x434ae5 LEA 0x5(%R12),%R9D |
(238) 0x434aea ADD $0x4,%R12D |
(238) 0x434aee CMP $0x2,%R12D |
(238) 0x434af2 JBE 434b16 |
(238) 0x434af4 VBROADCASTSD (%R11),%YMM1 |
(238) 0x434af9 LEA (%R13,%RCX,1),%R12 |
(238) 0x434afe ADD %R12,%RDX |
(238) 0x434b01 VMOVUPD %YMM1,-0x10(%R15,%RDX,8) |
(238) 0x434b08 MOV %R9D,%EDX |
(238) 0x434b0b AND $-0x4,%EDX |
(238) 0x434b0e ADD %EDX,%EAX |
(238) 0x434b10 AND $0x3,%R9D |
(238) 0x434b14 JE 434b53 |
(238) 0x434b16 MOVSXD %EAX,%R9 |
(238) 0x434b19 LEA 0x1(%RAX),%R12D |
(238) 0x434b1d VMOVSD (%R11),%XMM4 |
(238) 0x434b22 ADD %RCX,%R9 |
(238) 0x434b25 VMOVSD %XMM4,(%R15,%R9,8) |
(238) 0x434b2b CMP %R12D,%EDI |
(238) 0x434b2e JLE 434b53 |
(238) 0x434b30 MOVSXD %R12D,%RDX |
(238) 0x434b33 ADD $0x2,%EAX |
(238) 0x434b36 ADD %RCX,%RDX |
(238) 0x434b39 VMOVSD %XMM4,(%R15,%RDX,8) |
(238) 0x434b3f CMP %EAX,%EDI |
(238) 0x434b41 JLE 434b53 |
(238) 0x434b43 CLTQ |
(238) 0x434b45 VMOVSD (%R11),%XMM7 |
(238) 0x434b4a ADD %RCX,%RAX |
(238) 0x434b4d VMOVSD %XMM7,(%R15,%RAX,8) |
(238) 0x434b53 MOV 0xd8(%RSP),%RDX |
(238) 0x434b5b VMOVD %XMM15,%EAX |
(238) 0x434b5f MOV $0x1,%R9D |
(238) 0x434b65 VMOVQ %XMM5,%R12 |
(238) 0x434b6a CMP %EAX,%EDI |
(238) 0x434b6c CMOVE %EDI,%EBX |
(238) 0x434b6f CMOVE %R9D,%R10D |
(238) 0x434b73 INC %ESI |
(238) 0x434b75 ADD %R12,%R8 |
(238) 0x434b78 ADD %RDX,%RCX |
(238) 0x434b7b CMP %ESI,0xe8(%RSP) |
(238) 0x434b82 JG 434980 |
0x434b88 MOV 0xb0(%RSP),%R13 |
0x434b90 VMOVD %XMM6,%R15D |
0x434b95 MOV %EBX,0x68(%RSP) |
0x434b99 TEST %R10B,%R10B |
0x434b9c JE 435811 |
0x434ba2 MOV %EBX,0x140(%R13) |
0x434ba9 VZEROUPPER |
0x434bac CALL 402220 <@plt_start@+0x200> |
0x434bb1 MOV 0x10(%R13),%RSI |
0x434bb5 MOV 0x18(%R13),%RCX |
0x434bb9 MOV (%RSI),%EDI |
0x434bbb MOV (%RCX),%EAX |
0x434bbd SUB $0x2,%EDI |
0x434bc0 ADD $0x3,%EAX |
0x434bc3 SUB %EDI,%EAX |
0x434bc5 CLTD |
0x434bc6 IDIVL 0x74(%RSP) |
0x434bca CMP %EDX,0xf8(%RSP) |
0x434bd1 JL 435800 |
0x434bd7 MOV 0xf8(%RSP),%ESI |
0x434bde IMUL %EAX,%ESI |
0x434be1 ADD %EDX,%ESI |
0x434be3 ADD %ESI,%EAX |
0x434be5 CMP %EAX,%ESI |
0x434be7 JGE 434f16 |
0x434bed MOV (%R13),%R8 |
0x434bf1 MOV 0x8(%R13),%R10 |
0x434bf5 MOV 0xe0(%RSP),%RBX |
0x434bfd ADD %EDI,%ESI |
0x434bff MOV 0x58(%R13),%R12 |
0x434c03 ADD %EDI,%EAX |
0x434c05 MOV 0x80(%R13),%R11 |
0x434c0c MOV %R13,0x98(%RSP) |
0x434c14 MOV %EAX,0xe8(%RSP) |
0x434c1b MOV (%R8),%EDX |
0x434c1e MOV (%R10),%R9D |
0x434c21 MOV 0x60(%RSP),%R10 |
0x434c26 LEA (,%RBX,8),%RCX |
0x434c2e VMOVQ %RCX,%XMM5 |
0x434c33 MOVSXD %ESI,%RCX |
0x434c36 IMUL %RBX,%RCX |
0x434c3a MOV %R11,%R13 |
0x434c3d MOV %R15D,%R11D |
0x434c40 MOV %R12,%R15 |
0x434c43 MOVSXD %EDX,%RAX |
0x434c46 LEA 0x3(%R9),%EDI |
0x434c4a SUB %EDX,%R9D |
0x434c4d LEA -0x2(%RDX),%R14D |
0x434c51 LEA (%RAX,%R10,1),%RBX |
0x434c55 VMOVQ %RAX,%XMM15 |
0x434c5a LEA 0x5(%R9),%EAX |
0x434c5e MOV %R9D,0xd4(%RSP) |
0x434c66 ADD %RCX,%RBX |
0x434c69 ADD %R10,%RCX |
0x434c6c MOV %EAX,%R10D |
0x434c6f MOV %R14D,0xf4(%RSP) |
0x434c77 LEA -0x10(%R12,%RBX,8),%R8 |
0x434c7c MOV %R9D,%EBX |
0x434c7f MOV %EAX,%R9D |
0x434c82 AND $-0x8,%R10D |
0x434c86 SHR $0x3,%R9D |
0x434c8a MOV %R10D,0xb0(%RSP) |
0x434c92 SAL $0x6,%R9 |
0x434c96 CMP %EDI,%R14D |
0x434c99 MOV %R9,0xc8(%RSP) |
0x434ca1 LEA -0x2(%RDX,%R10,1),%R9D |
0x434ca6 LEA 0x3(%RDX,%RBX,1),%EDX |
0x434caa CMOVGE %R14D,%EDX |
0x434cae LEA 0x4(%RBX),%R14D |
0x434cb2 AND $0x7,%EAX |
0x434cb5 XOR %R10D,%R10D |
0x434cb8 MOV %R14D,0xf0(%RSP) |
0x434cc0 VMOVD %EDX,%XMM6 |
0x434cc4 MOV $0x1,%R14D |
0x434cca VMOVQ %XMM15,%RBX |
0x434ccf MOV %R9D,0xb8(%RSP) |
0x434cd7 MOV %EAX,0xc0(%RSP) |
0x434cde XCHG %AX,%AX |
(236) 0x434ce0 CMP %EDI,0xf4(%RSP) |
(236) 0x434ce7 JGE 434ecb |
(236) 0x434ced CMPL $0x6,0xf0(%RSP) |
(236) 0x434cf5 JBE 4357bb |
(236) 0x434cfb MOV 0xc8(%RSP),%R12 |
(236) 0x434d03 MOV %R8,%RAX |
(236) 0x434d06 LEA (%R12,%R8,1),%R9 |
(236) 0x434d0a SUB $0x40,%R12 |
(236) 0x434d0e SHR $0x6,%R12 |
(236) 0x434d12 INC %R12 |
(236) 0x434d15 AND $0x7,%R12D |
(236) 0x434d19 JE 434db8 |
(236) 0x434d1f CMP $0x1,%R12 |
(236) 0x434d23 JE 434da1 |
(236) 0x434d25 CMP $0x2,%R12 |
(236) 0x434d29 JE 434d8f |
(236) 0x434d2b CMP $0x3,%R12 |
(236) 0x434d2f JE 434d7d |
(236) 0x434d31 CMP $0x4,%R12 |
(236) 0x434d35 JE 434d6b |
(236) 0x434d37 CMP $0x5,%R12 |
(236) 0x434d3b JE 434d59 |
(236) 0x434d3d CMP $0x6,%R12 |
(236) 0x434d41 JNE 435758 |
(236) 0x434d47 VBROADCASTSD (%R13),%ZMM9 |
(236) 0x434d4e ADD $0x40,%RAX |
(236) 0x434d52 VMOVUPD %ZMM9,-0x40(%RAX) |
(236) 0x434d59 VBROADCASTSD (%R13),%ZMM10 |
(236) 0x434d60 ADD $0x40,%RAX |
(236) 0x434d64 VMOVUPD %ZMM10,-0x40(%RAX) |
(236) 0x434d6b VBROADCASTSD (%R13),%ZMM11 |
(236) 0x434d72 ADD $0x40,%RAX |
(236) 0x434d76 VMOVUPD %ZMM11,-0x40(%RAX) |
(236) 0x434d7d VBROADCASTSD (%R13),%ZMM12 |
(236) 0x434d84 ADD $0x40,%RAX |
(236) 0x434d88 VMOVUPD %ZMM12,-0x40(%RAX) |
(236) 0x434d8f VBROADCASTSD (%R13),%ZMM13 |
(236) 0x434d96 ADD $0x40,%RAX |
(236) 0x434d9a VMOVUPD %ZMM13,-0x40(%RAX) |
(236) 0x434da1 VBROADCASTSD (%R13),%ZMM14 |
(236) 0x434da8 ADD $0x40,%RAX |
(236) 0x434dac VMOVUPD %ZMM14,-0x40(%RAX) |
(236) 0x434db3 CMP %R9,%RAX |
(236) 0x434db6 JE 434e33 |
(237) 0x434db8 VBROADCASTSD (%R13),%ZMM0 |
(237) 0x434dbf ADD $0x200,%RAX |
(237) 0x434dc5 VMOVUPD %ZMM0,-0x200(%RAX) |
(237) 0x434dcc VBROADCASTSD (%R13),%ZMM3 |
(237) 0x434dd3 VMOVUPD %ZMM3,-0x1c0(%RAX) |
(237) 0x434dda VBROADCASTSD (%R13),%ZMM2 |
(237) 0x434de1 VMOVUPD %ZMM2,-0x180(%RAX) |
(237) 0x434de8 VBROADCASTSD (%R13),%ZMM1 |
(237) 0x434def VMOVUPD %ZMM1,-0x140(%RAX) |
(237) 0x434df6 VBROADCASTSD (%R13),%ZMM4 |
(237) 0x434dfd VMOVUPD %ZMM4,-0x100(%RAX) |
(237) 0x434e04 VBROADCASTSD (%R13),%ZMM7 |
(237) 0x434e0b VMOVUPD %ZMM7,-0xc0(%RAX) |
(237) 0x434e12 VBROADCASTSD (%R13),%ZMM15 |
(237) 0x434e19 VMOVUPD %ZMM15,-0x80(%RAX) |
(237) 0x434e20 VBROADCASTSD (%R13),%ZMM8 |
(237) 0x434e27 VMOVUPD %ZMM8,-0x40(%RAX) |
(237) 0x434e2e CMP %R9,%RAX |
(237) 0x434e31 JNE 434db8 |
(236) 0x434e33 MOV 0xc0(%RSP),%EDX |
(236) 0x434e3a TEST %EDX,%EDX |
(236) 0x434e3c JE 434ecb |
(236) 0x434e42 MOV 0xb0(%RSP),%EDX |
(236) 0x434e49 MOV 0xb8(%RSP),%EAX |
(236) 0x434e50 MOV 0xd4(%RSP),%R12D |
(236) 0x434e58 SUB %EDX,%R12D |
(236) 0x434e5b LEA 0x5(%R12),%R9D |
(236) 0x434e60 ADD $0x4,%R12D |
(236) 0x434e64 CMP $0x2,%R12D |
(236) 0x434e68 JBE 434e8c |
(236) 0x434e6a VBROADCASTSD (%R13),%YMM9 |
(236) 0x434e70 LEA (%RBX,%RCX,1),%R12 |
(236) 0x434e74 ADD %R12,%RDX |
(236) 0x434e77 VMOVUPD %YMM9,-0x10(%R15,%RDX,8) |
(236) 0x434e7e MOV %R9D,%EDX |
(236) 0x434e81 AND $-0x4,%EDX |
(236) 0x434e84 ADD %EDX,%EAX |
(236) 0x434e86 AND $0x3,%R9D |
(236) 0x434e8a JE 434ecb |
(236) 0x434e8c MOVSXD %EAX,%R9 |
(236) 0x434e8f LEA 0x1(%RAX),%R12D |
(236) 0x434e93 VMOVSD (%R13),%XMM10 |
(236) 0x434e99 ADD %RCX,%R9 |
(236) 0x434e9c VMOVSD %XMM10,(%R15,%R9,8) |
(236) 0x434ea2 CMP %EDI,%R12D |
(236) 0x434ea5 JGE 434ecb |
(236) 0x434ea7 MOVSXD %R12D,%RDX |
(236) 0x434eaa ADD $0x2,%EAX |
(236) 0x434ead ADD %RCX,%RDX |
(236) 0x434eb0 VMOVSD %XMM10,(%R15,%RDX,8) |
(236) 0x434eb6 CMP %EDI,%EAX |
(236) 0x434eb8 JGE 434ecb |
(236) 0x434eba CLTQ |
(236) 0x434ebc VMOVSD (%R13),%XMM11 |
(236) 0x434ec2 ADD %RCX,%RAX |
(236) 0x434ec5 VMOVSD %XMM11,(%R15,%RAX,8) |
(236) 0x434ecb MOV 0xe0(%RSP),%R12 |
(236) 0x434ed3 VMOVD %XMM6,%EAX |
(236) 0x434ed7 VMOVQ %XMM5,%R9 |
(236) 0x434edc CMP %EAX,%EDI |
(236) 0x434ede CMOVE %EDI,%R11D |
(236) 0x434ee2 CMOVE %R14D,%R10D |
(236) 0x434ee6 INC %ESI |
(236) 0x434ee8 ADD %R9,%R8 |
(236) 0x434eeb ADD %R12,%RCX |
(236) 0x434eee CMP %ESI,0xe8(%RSP) |
(236) 0x434ef5 JG 434ce0 |
0x434efb MOV 0x98(%RSP),%R13 |
0x434f03 TEST %R10B,%R10B |
0x434f06 JE 435809 |
0x434f0c MOV %R11D,0x140(%R13) |
0x434f13 VZEROUPPER |
0x434f16 CALL 402220 <@plt_start@+0x200> |
0x434f1b MOV 0x60(%R13),%RSI |
0x434f1f MOV (%RSI),%EDI |
0x434f21 CMP $0x1,%EDI |
0x434f24 JLE 435749 |
0x434f2a MOV 0xa8(%RSP),%RCX |
0x434f32 MOV 0x90(%RSP),%R10 |
0x434f3a MOV 0x48(%RSP),%R15 |
0x434f3f MOV %RDI,0x68(%RSP) |
0x434f44 MOV 0x88(%RSP),%R8 |
0x434f4c MOV 0x80(%RSP),%RBX |
0x434f54 MOV 0xf8(%RSP),%R12D |
0x434f5c NEG %RCX |
0x434f5f LEA -0x1(%R10),%RAX |
0x434f63 SUB %R15,%RBX |
0x434f66 SUB %R10,%R8 |
0x434f69 MOV $0x1,%R15D |
0x434f6f MOV %RAX,0x20(%RSP) |
0x434f74 SAL $0x3,%RCX |
0x434f78 LEA (,%R8,8),%R14 |
0x434f80 LEA (,%RBX,8),%RDX |
0x434f88 MOV %RCX,0x98(%RSP) |
0x434f90 MOV %R14,0x30(%RSP) |
0x434f95 MOV %RDX,0x28(%RSP) |
0x434f9a JMP 434fb6 |
0x434f9c NOPL (%RAX) |
(233) 0x434fa0 CALL 402220 <@plt_start@+0x200> |
(233) 0x434fa5 MOV 0x68(%RSP),%R11 |
(233) 0x434faa INC %R15 |
(233) 0x434fad CMP %R11,%R15 |
(233) 0x434fb0 JE 435749 |
(233) 0x434fb6 MOV 0x10(%R13),%RSI |
(233) 0x434fba MOV 0x18(%R13),%RCX |
(233) 0x434fbe VMOVQ 0x88(%R13),%XMM5 |
(233) 0x434fc7 VMOVQ 0x98(%R13),%XMM12 |
(233) 0x434fd0 MOV (%RSI),%EDI |
(233) 0x434fd2 MOV (%RCX),%EAX |
(233) 0x434fd4 VMOVQ %XMM5,%R9 |
(233) 0x434fd9 VMOVQ %XMM12,%R11 |
(233) 0x434fde VMOVSD (%R9,%R15,8),%XMM4 |
(233) 0x434fe4 VMOVSD (%R11,%R15,8),%XMM7 |
(233) 0x434fea VUNPCKLPD %XMM4,%XMM7,%XMM6 |
(233) 0x434fee VMOVUPD %XMM6,0x130(%R13) |
(233) 0x434ff7 SUB $0x2,%EDI |
(233) 0x434ffa ADD $0x3,%EAX |
(233) 0x434ffd SUB %EDI,%EAX |
(233) 0x434fff CLTD |
(233) 0x435000 IDIVL 0x74(%RSP) |
(233) 0x435004 CMP %EDX,%R12D |
(233) 0x435007 JL 435740 |
(233) 0x43500d MOV %EAX,%R8D |
(233) 0x435010 IMUL %R12D,%R8D |
(233) 0x435014 ADD %R8D,%EDX |
(233) 0x435017 ADD %EDX,%EAX |
(233) 0x435019 CMP %EAX,%EDX |
(233) 0x43501b JGE 434fa0 |
(233) 0x43501d MOV 0x8(%R13),%R9 |
(233) 0x435021 MOV (%R13),%R10 |
(233) 0x435025 LEA (%RDI,%RDX,1),%R14D |
(233) 0x435029 ADD %EDI,%EAX |
(233) 0x43502b MOV 0x20(%RSP),%RSI |
(233) 0x435030 MOV 0xa8(%RSP),%RDX |
(233) 0x435038 MOV %EAX,0x90(%RSP) |
(233) 0x43503f MOVSXD %R14D,%RCX |
(233) 0x435042 VMOVQ 0x78(%R13),%XMM25 |
(233) 0x435049 VMOVQ 0x50(%R13),%XMM15 |
(233) 0x43504f VMOVQ 0x58(%R13),%XMM14 |
(233) 0x435055 VMOVQ 0xb0(%R13),%XMM21 |
(233) 0x43505c VMOVQ 0xb8(%R13),%XMM20 |
(233) 0x435063 VMOVQ 0xc0(%R13),%XMM8 |
(233) 0x43506c MOV (%R9),%EDI |
(233) 0x43506f MOV (%R10),%EBX |
(233) 0x435072 MOV 0x58(%RSP),%R9 |
(233) 0x435077 VMOVQ 0xc8(%R13),%XMM6 |
(233) 0x435080 VMOVQ 0x80(%R13),%XMM23 |
(233) 0x435087 IMUL %RCX,%RDX |
(233) 0x43508b VMOVQ 0xa8(%R13),%XMM11 |
(233) 0x435094 VMOVQ 0x90(%R13),%XMM13 |
(233) 0x43509d LEA 0x3(%RDI),%R11D |
(233) 0x4350a1 ADD $0x4,%EDI |
(233) 0x4350a4 MOVSXD %EBX,%RAX |
(233) 0x4350a7 LEA -0x2(%RBX),%R8D |
(233) 0x4350ab SUB %EBX,%EDI |
(233) 0x4350ad MOV %R11D,0xf0(%RSP) |
(233) 0x4350b5 MOV 0x98(%RSP),%R11 |
(233) 0x4350bd MOV 0x30(%RSP),%RBX |
(233) 0x4350c2 LEA (%RAX,%RDI,1),%R10 |
(233) 0x4350c6 MOV %R8D,0xc8(%RSP) |
(233) 0x4350ce ADD %RSI,%R10 |
(233) 0x4350d1 MOV 0xd8(%RSP),%RSI |
(233) 0x4350d9 ADD %RDX,%R10 |
(233) 0x4350dc MOV 0xe0(%RSP),%RDX |
(233) 0x4350e4 IMUL %RCX,%R11 |
(233) 0x4350e8 IMUL %RCX,%RSI |
(233) 0x4350ec IMUL %RCX,%RDX |
(233) 0x4350f0 ADD %RBX,%R11 |
(233) 0x4350f3 MOV 0x48(%RSP),%RBX |
(233) 0x4350f8 ADD 0x20(%R13),%R11 |
(233) 0x4350fc ADD %R9,%RSI |
(233) 0x4350ff MOV %RSI,0xc0(%RSP) |
(233) 0x435107 MOV 0x60(%RSP),%RSI |
(233) 0x43510c ADD %RCX,%RBX |
(233) 0x43510f ADD %RSI,%RDX |
(233) 0x435112 MOV %RDX,0xf8(%RSP) |
(233) 0x43511a MOVSXD %R8D,%RDX |
(233) 0x43511d MOV 0x40(%RSP),%R8 |
(233) 0x435122 MOV %RDX,%R9 |
(233) 0x435125 LEA (%R8,%RDX,1),%RSI |
(233) 0x435129 MOV 0xa0(%RSP),%R8 |
(233) 0x435131 IMUL %R8,%RCX |
(233) 0x435135 LEA (,%RAX,8),%R8 |
(233) 0x43513d ADD %RSI,%RCX |
(233) 0x435140 MOV %RCX,0xb8(%RSP) |
(233) 0x435148 MOV 0x38(%RSP),%RCX |
(233) 0x43514d MOV 0x30(%R13),%RSI |
(233) 0x435151 MOV %R12D,0x50(%RSP) |
(233) 0x435156 MOV 0xf8(%RSP),%R12 |
(233) 0x43515e MOVB $0,0xd4(%RSP) |
(233) 0x435166 MOV %R14D,0xf4(%RSP) |
(233) 0x43516e ADD %RAX,%RCX |
(233) 0x435171 ADD %RDI,%RCX |
(233) 0x435174 LEA (%RSI,%RCX,8),%RCX |
(233) 0x435178 MOV 0x28(%RSP),%RSI |
(233) 0x43517d VMOVQ %RCX,%XMM19 |
(233) 0x435183 MOV 0xf0(%RSP),%ECX |
(233) 0x43518a ADD 0x38(%R13),%RSI |
(233) 0x43518e CMP %EDX,%ECX |
(233) 0x435190 VMOVQ %RSI,%XMM10 |
(233) 0x435195 CMOVGE %ECX,%R9D |
(233) 0x435199 SUB %RDI,%RDX |
(233) 0x43519c VMOVQ %XMM14,%RCX |
(233) 0x4351a1 MOV %R9D,0x88(%RSP) |
(233) 0x4351a9 MOV $0x1,%R9D |
(233) 0x4351af SUB %RAX,%R9 |
(233) 0x4351b2 LEA (%R9,%RDX,1),%RDI |
(233) 0x4351b6 VMOVQ %XMM15,%RDX |
(233) 0x4351bb MOV 0x58(%RSP),%R9 |
(233) 0x4351c0 LEA -0x10(%RDX,%R8,1),%RSI |
(233) 0x4351c5 MOV 0x60(%RSP),%RDX |
(233) 0x4351ca MOV %RDI,0x80(%RSP) |
(233) 0x4351d2 LEA -0x10(%RCX,%R8,1),%R8 |
(233) 0x4351d7 VMOVQ %RSI,%XMM18 |
(233) 0x4351dd VMOVQ %XMM25,%RSI |
(233) 0x4351e3 VMOVQ %R8,%XMM17 |
(233) 0x4351e9 LEA (%RAX,%R9,1),%RDI |
(233) 0x4351ed ADD %RDX,%RAX |
(233) 0x4351f0 VMOVQ %RDI,%XMM16 |
(233) 0x4351f6 MOV %RAX,0x78(%RSP) |
(233) 0x4351fb LEA (,%R15,8),%RAX |
(233) 0x435203 ADD %RAX,%RSI |
(233) 0x435206 VMOVQ %RAX,%XMM22 |
(233) 0x43520c VMOVQ %RSI,%XMM2 |
(233) 0x435211 NOPW %CS:(%RAX,%RAX,1) |
(233) 0x43521c NOPL (%RAX) |
(234) 0x435220 MOV 0xc8(%RSP),%R14D |
(234) 0x435228 INCL 0xf4(%RSP) |
(234) 0x43522f CMP %R14D,0xf0(%RSP) |
(234) 0x435237 JLE 435720 |
(234) 0x43523d MOV 0x80(%RSP),%RDI |
(234) 0x435245 MOV 0xc0(%RSP),%RAX |
(234) 0x43524d VMOVQ %XMM18,%RDX |
(234) 0x435253 MOV 0xd8(%RSP),%RCX |
(234) 0x43525b VMOVQ %XMM20,%R9 |
(234) 0x435261 VMOVQ %XMM21,%R8 |
(234) 0x435267 MOV %R12,0xb0(%RSP) |
(234) 0x43526f MOV (%R9),%R14D |
(234) 0x435272 VMOVQ %XMM16,%R9 |
(234) 0x435278 VMOVQ %XMM17,%RSI |
(234) 0x43527e MOV (%R8,%R15,4),%R8D |
(234) 0x435282 LEA (%RSI,%R12,8),%RSI |
(234) 0x435286 VMOVDQA %XMM8,%XMM3 |
(234) 0x43528a ADD %R10,%RDI |
(234) 0x43528d MOV %RDI,0xf8(%RSP) |
(234) 0x435295 LEA (%RDX,%RAX,8),%RDI |
(234) 0x435299 MOVSXD 0xf4(%RSP),%RDX |
(234) 0x4352a1 VMOVQ %XMM15,%RAX |
(234) 0x4352a6 IMUL %RDX,%RCX |
(234) 0x4352aa ADD %R9,%RCX |
(234) 0x4352ad MOV 0xe0(%RSP),%R9 |
(234) 0x4352b5 LEA -0x10(%RAX,%RCX,8),%RCX |
(234) 0x4352ba MOV 0x78(%RSP),%RAX |
(234) 0x4352bf IMUL %R9,%RDX |
(234) 0x4352c3 VMOVQ %XMM14,%R9 |
(234) 0x4352c8 ADD %RAX,%RDX |
(234) 0x4352cb VMOVQ %XMM19,%RAX |
(234) 0x4352d1 LEA -0x10(%R9,%RDX,8),%RDX |
(234) 0x4352d6 MOV %R10,%R9 |
(234) 0x4352d9 NEG %R9 |
(234) 0x4352dc LEA -0x8(%RAX,%R9,8),%R9 |
(234) 0x4352e1 LEA 0x1(%RBX),%RAX |
(234) 0x4352e5 VMOVQ %R9,%XMM9 |
(234) 0x4352ea MOV %RAX,0xe8(%RSP) |
(234) 0x4352f2 MOV 0xb8(%RSP),%R9 |
(234) 0x4352fa MOV 0xf8(%RSP),%RAX |
(234) 0x435302 MOV %RBX,0xf8(%RSP) |
(234) 0x43530a JMP 43534c |
0x43530c NOPL (%RAX) |
(235) 0x435310 VMOVQ %XMM3,%R12 |
(235) 0x435315 CMP (%R12),%R8D |
(235) 0x435319 JE 435480 |
(235) 0x43531f VMOVQ %XMM6,%RBX |
(235) 0x435324 CMP (%RBX),%R8D |
(235) 0x435327 JE 435570 |
(235) 0x43532d INC %RAX |
(235) 0x435330 INC %R9 |
(235) 0x435333 ADD $0x8,%RDI |
(235) 0x435337 ADD $0x8,%RSI |
(235) 0x43533b ADD $0x8,%RCX |
(235) 0x43533f ADD $0x8,%RDX |
(235) 0x435343 CMP %R10,%RAX |
(235) 0x435346 JE 435650 |
(235) 0x43534c CMP %R14D,%R8D |
(235) 0x43534f JNE 435310 |
(235) 0x435351 VMOVQ %XMM5,%RBX |
(235) 0x435356 VMOVSD 0x8(%R11,%RAX,8),%XMM1 |
(235) 0x43535d VCOMISD (%RBX,%R15,8),%XMM1 |
(235) 0x435363 JB 43532d |
(235) 0x435365 VMOVQ %XMM13,%R12 |
(235) 0x43536a VMOVSD (%R12,%R15,8),%XMM0 |
(235) 0x435370 VCOMISD (%R11,%RAX,8),%XMM0 |
(235) 0x435376 JBE 43532d |
(235) 0x435378 VMOVQ 0x28(%R13),%XMM0 |
(235) 0x43537e MOV 0xe8(%RSP),%R12 |
(235) 0x435386 VMOVQ %XMM0,%RBX |
(235) 0x43538b VMOVSD (%RBX,%R12,8),%XMM1 |
(235) 0x435391 VMOVQ %XMM12,%RBX |
(235) 0x435396 VCOMISD (%RBX,%R15,8),%XMM1 |
(235) 0x43539c JB 43532d |
(235) 0x43539e MOV 0xa0(%R13),%R12 |
(235) 0x4353a5 VMOVQ %XMM0,%RBX |
(235) 0x4353aa VMOVSD (%R12,%R15,8),%XMM1 |
(235) 0x4353b0 MOV 0xf8(%RSP),%R12 |
(235) 0x4353b8 VCOMISD (%RBX,%R12,8),%XMM1 |
(235) 0x4353be JBE 43532d |
(235) 0x4353c4 MOV 0x70(%R13),%RBX |
(235) 0x4353c8 MOV 0x48(%R13),%R12 |
(235) 0x4353cc VMOVSD (%RBX,%R15,8),%XMM0 |
(235) 0x4353d2 MOV 0x68(%R13),%RBX |
(235) 0x4353d6 VMOVSD %XMM0,(%R12,%R9,8) |
(235) 0x4353dc MOV 0x40(%R13),%R12 |
(235) 0x4353e0 VMOVSD (%RBX,%R15,8),%XMM1 |
(235) 0x4353e6 LEA (,%R15,8),%RBX |
(235) 0x4353ee VMOVSD %XMM1,(%R12,%RAX,8) |
(235) 0x4353f4 VMOVQ %XMM25,%R12 |
(235) 0x4353fa ADD %RBX,%R12 |
(235) 0x4353fd VMOVSD (%R12),%XMM31 |
(235) 0x435404 VMOVQ %R12,%XMM0 |
(235) 0x435409 VMOVQ %XMM23,%R12 |
(235) 0x43540f VMOVSD %XMM31,(%RDI) |
(235) 0x435415 ADD %R12,%RBX |
(235) 0x435418 VMOVQ %XMM0,%R12 |
(235) 0x43541d VMOVSD (%RBX),%XMM24 |
(235) 0x435423 VMOVSD %XMM24,(%RSI) |
(235) 0x435429 VMOVSD (%R12),%XMM26 |
(235) 0x435430 VMOVSD %XMM26,0x8(%RDI) |
(235) 0x435437 VMOVSD (%RBX),%XMM27 |
(235) 0x43543d VMOVSD %XMM27,0x8(%RSI) |
(235) 0x435444 VMOVSD (%R12),%XMM28 |
(235) 0x43544b VMOVSD %XMM28,(%RCX) |
(235) 0x435451 VMOVSD (%RBX),%XMM29 |
(235) 0x435457 VMOVSD %XMM29,(%RDX) |
(235) 0x43545d VMOVSD (%R12),%XMM1 |
(235) 0x435463 VMOVSD %XMM1,0x8(%RCX) |
(235) 0x435468 VMOVSD (%RBX),%XMM0 |
(235) 0x43546c VMOVSD %XMM0,0x8(%RDX) |
(235) 0x435471 JMP 43532d |
0x435476 NOPW %CS:(%RAX,%RAX,1) |
(235) 0x435480 MOV 0xf8(%RSP),%R12 |
(235) 0x435488 VMOVQ %XMM9,%RBX |
(235) 0x43548d VMOVSD (%RBX,%RAX,8),%XMM1 |
(235) 0x435492 VMOVQ %XMM10,%RBX |
(235) 0x435497 VSUBSD %XMM4,%XMM1,%XMM0 |
(235) 0x43549b VMOVSD (%RBX,%R12,8),%XMM1 |
(235) 0x4354a1 VSUBSD %XMM7,%XMM1,%XMM1 |
(235) 0x4354a5 VUNPCKLPD %XMM1,%XMM0,%XMM0 |
(235) 0x4354a9 VMOVQ %XMM11,%RBX |
(235) 0x4354ae VMULPD %XMM0,%XMM0,%XMM0 |
(235) 0x4354b2 VUNPCKHPD %XMM0,%XMM0,%XMM1 |
(235) 0x4354b6 VADDPD %XMM0,%XMM1,%XMM0 |
(235) 0x4354ba VSQRTSD %XMM0,%XMM0,%XMM0 |
(235) 0x4354be VCOMISD (%RBX,%R15,8),%XMM0 |
(235) 0x4354c4 JA 43532d |
(235) 0x4354ca MOV 0x70(%R13),%R12 |
(235) 0x4354ce MOV 0x48(%R13),%RBX |
(235) 0x4354d2 VMOVSD (%R12,%R15,8),%XMM1 |
(235) 0x4354d8 MOV 0x68(%R13),%R12 |
(235) 0x4354dc VMOVSD %XMM1,(%RBX,%R9,8) |
(235) 0x4354e2 MOV 0x40(%R13),%RBX |
(235) 0x4354e6 VMOVSD (%R12,%R15,8),%XMM0 |
(235) 0x4354ec VMOVQ %XMM2,%R12 |
(235) 0x4354f1 VMOVSD %XMM0,(%RBX,%RAX,8) |
(235) 0x4354f6 VMOVQ %XMM23,%RBX |
(235) 0x4354fc VMOVSD (%R12),%XMM1 |
(235) 0x435502 VMOVQ %XMM22,%R12 |
(235) 0x435508 VMOVSD %XMM1,(%RDI) |
(235) 0x43550c ADD %R12,%RBX |
(235) 0x43550f VMOVQ %RBX,%XMM0 |
(235) 0x435514 VMOVSD (%RBX),%XMM1 |
(235) 0x435518 VMOVQ %XMM2,%RBX |
(235) 0x43551d VMOVSD %XMM1,(%RSI) |
(235) 0x435521 VMOVQ %XMM0,%R12 |
(235) 0x435526 VMOVSD (%RBX),%XMM1 |
(235) 0x43552a VMOVSD %XMM1,0x8(%RDI) |
(235) 0x43552f VMOVSD (%R12),%XMM1 |
(235) 0x435535 VMOVSD %XMM1,0x8(%RSI) |
(235) 0x43553a VMOVSD (%RBX),%XMM1 |
(235) 0x43553e VMOVSD %XMM1,(%RCX) |
(235) 0x435542 VMOVSD (%R12),%XMM1 |
(235) 0x435548 VMOVSD %XMM1,(%RDX) |
(235) 0x43554c VMOVSD (%RBX),%XMM1 |
(235) 0x435550 VMOVSD %XMM1,0x8(%RCX) |
(235) 0x435555 VMOVSD (%R12),%XMM0 |
(235) 0x43555b VMOVSD %XMM0,0x8(%RDX) |
(235) 0x435560 JMP 43532d |
0x435565 NOPW %CS:(%RAX,%RAX,1) |
(235) 0x435570 VCOMISD (%R11,%RAX,8),%XMM4 |
(235) 0x435576 JNE 43532d |
(235) 0x43557c MOV 0x28(%R13),%RBX |
(235) 0x435580 MOV 0xf8(%RSP),%R12 |
(235) 0x435588 VCOMISD (%RBX,%R12,8),%XMM7 |
(235) 0x43558e JNE 43532d |
(235) 0x435594 MOV 0x70(%R13),%RBX |
(235) 0x435598 MOV 0x48(%R13),%R12 |
(235) 0x43559c VMOVSD (%RBX,%R15,8),%XMM0 |
(235) 0x4355a2 MOV 0x68(%R13),%RBX |
(235) 0x4355a6 VMOVSD %XMM0,(%R12,%R9,8) |
(235) 0x4355ac MOV 0x40(%R13),%R12 |
(235) 0x4355b0 VMOVSD (%RBX,%R15,8),%XMM1 |
(235) 0x4355b6 VMOVQ %XMM2,%RBX |
(235) 0x4355bb VMOVSD %XMM1,(%R12,%RAX,8) |
(235) 0x4355c1 VMOVQ %XMM22,%R12 |
(235) 0x4355c7 VMOVSD (%RBX),%XMM0 |
(235) 0x4355cb VMOVQ %XMM23,%RBX |
(235) 0x4355d1 VMOVSD %XMM0,(%RDI) |
(235) 0x4355d5 ADD %R12,%RBX |
(235) 0x4355d8 VMOVQ %RBX,%XMM1 |
(235) 0x4355dd VMOVSD (%RBX),%XMM24 |
(235) 0x4355e3 VMOVQ %XMM2,%RBX |
(235) 0x4355e8 VMOVSD %XMM24,(%RSI) |
(235) 0x4355ee VMOVQ %XMM1,%R12 |
(235) 0x4355f3 VMOVSD (%RBX),%XMM26 |
(235) 0x4355f9 VMOVSD %XMM26,0x8(%RDI) |
(235) 0x435600 VMOVSD (%R12),%XMM27 |
(235) 0x435607 VMOVSD %XMM27,0x8(%RSI) |
(235) 0x43560e VMOVSD (%RBX),%XMM28 |
(235) 0x435614 VMOVSD %XMM28,(%RCX) |
(235) 0x43561a VMOVSD (%R12),%XMM29 |
(235) 0x435621 VMOVSD %XMM29,(%RDX) |
(235) 0x435627 VMOVSD (%RBX),%XMM30 |
(235) 0x43562d VMOVSD %XMM30,0x8(%RCX) |
(235) 0x435634 VMOVSD (%R12),%XMM0 |
(235) 0x43563a VMOVSD %XMM0,0x8(%RDX) |
(235) 0x43563f JMP 43532d |
0x435644 NOPW %CS:(%RAX,%RAX,1) |
0x43564f NOP |
(234) 0x435650 MOV 0xb0(%RSP),%R12 |
(234) 0x435658 MOV 0xc8(%RSP),%EBX |
(234) 0x43565f MOV 0xd0(%RSP),%EAX |
(234) 0x435666 MOVZX 0xd4(%RSP),%ECX |
(234) 0x43566e MOV $0x1,%EDX |
(234) 0x435673 CMP %EBX,0xf0(%RSP) |
(234) 0x43567a MOV 0xa8(%RSP),%RSI |
(234) 0x435682 MOV 0x98(%RSP),%RDI |
(234) 0x43568a CMOVGE 0x88(%RSP),%EAX |
(234) 0x435692 MOV 0xe0(%RSP),%R9 |
(234) 0x43569a MOV 0xd8(%RSP),%R8 |
(234) 0x4356a2 MOV 0xa0(%RSP),%R14 |
(234) 0x4356aa MOV 0xe8(%RSP),%RBX |
(234) 0x4356b2 CMOVGE %EDX,%ECX |
(234) 0x4356b5 ADD %RSI,%R10 |
(234) 0x4356b8 ADD %RDI,%R11 |
(234) 0x4356bb ADD %R8,0xc0(%RSP) |
(234) 0x4356c3 MOV %EAX,0xd0(%RSP) |
(234) 0x4356ca MOV 0xf4(%RSP),%EAX |
(234) 0x4356d1 ADD %R9,%R12 |
(234) 0x4356d4 MOV %CL,0xd4(%RSP) |
(234) 0x4356db ADD %R14,0xb8(%RSP) |
(234) 0x4356e3 CMP %EAX,0x90(%RSP) |
(234) 0x4356ea JG 435220 |
(233) 0x4356f0 CMPB $0,0xd4(%RSP) |
(233) 0x4356f8 MOV 0x50(%RSP),%R12D |
(233) 0x4356fd JE 434fa0 |
(233) 0x435703 MOV 0xd0(%RSP),%R10D |
(233) 0x43570b MOV %R10D,0x140(%R13) |
(233) 0x435712 JMP 434fa0 |
0x435717 NOPW (%RAX,%RAX,1) |
(234) 0x435720 LEA 0x1(%RBX),%RBX |
(234) 0x435724 MOV %RBX,0xe8(%RSP) |
(234) 0x43572c JMP 435658 |
0x435731 NOPW %CS:(%RAX,%RAX,1) |
0x43573c NOPL (%RAX) |
(233) 0x435740 INC %EAX |
(233) 0x435742 XOR %EDX,%EDX |
(233) 0x435744 JMP 43500d |
0x435749 LEA -0x28(%RBP),%RSP |
0x43574d POP %RBX |
0x43574e POP %R12 |
0x435750 POP %R13 |
0x435752 POP %R14 |
0x435754 POP %R15 |
0x435756 POP %RBP |
0x435757 RET |
(236) 0x435758 VBROADCASTSD (%R13),%ZMM8 |
(236) 0x43575f LEA 0x40(%R8),%RAX |
(236) 0x435763 VMOVUPD %ZMM8,(%R8) |
(236) 0x435769 JMP 434d47 |
(238) 0x43576e VBROADCASTSD (%R11),%ZMM3 |
(238) 0x435774 LEA 0x40(%R8),%RAX |
(238) 0x435778 VMOVUPD %ZMM3,(%R8) |
(238) 0x43577e JMP 4349df |
(240) 0x435783 VBROADCASTSD (%R11),%ZMM10 |
(240) 0x435789 LEA 0x40(%R8),%RAX |
(240) 0x43578d VMOVUPD %ZMM10,(%R8) |
(240) 0x435793 JMP 434687 |
(242) 0x435798 VBROADCASTSD (%R11),%ZMM2 |
(242) 0x43579e LEA 0x40(%R8),%RAX |
(242) 0x4357a2 VMOVUPD %ZMM2,(%R8) |
(242) 0x4357a8 JMP 434317 |
(240) 0x4357ad MOV 0xf4(%RSP),%EAX |
(240) 0x4357b4 XOR %EDX,%EDX |
(240) 0x4357b6 JMP 434782 |
(236) 0x4357bb MOV 0xf4(%RSP),%EAX |
(236) 0x4357c2 XOR %EDX,%EDX |
(236) 0x4357c4 JMP 434e50 |
(238) 0x4357c9 MOV 0xf4(%RSP),%EAX |
(238) 0x4357d0 XOR %EDX,%EDX |
(238) 0x4357d2 JMP 434ada |
(242) 0x4357d7 MOV 0xf4(%RSP),%EAX |
(242) 0x4357de XOR %EDX,%EDX |
(242) 0x4357e0 JMP 434412 |
0x4357e5 INC %EAX |
0x4357e7 XOR %EDX,%EDX |
0x4357e9 JMP 434879 |
0x4357ee INC %EAX |
0x4357f0 XOR %EDX,%EDX |
0x4357f2 JMP 4341aa |
0x4357f7 INC %EAX |
0x4357f9 XOR %EDX,%EDX |
0x4357fb JMP 434509 |
0x435800 INC %EAX |
0x435802 XOR %EDX,%EDX |
0x435804 JMP 434bd7 |
0x435809 VZEROUPPER |
0x43580c JMP 434f16 |
0x435811 VZEROUPPER |
0x435814 JMP 434bac |
0x435819 VZEROUPPER |
0x43581c JMP 4344dd |
0x435821 VZEROUPPER |
0x435824 JMP 43484d |
0x435829 NOPL (%RAX) |
Path / |
Source file and lines | generate_chunk_kernel.f90:85-161 |
Module | exec |
nb instructions | 412 |
nb uops | 418 |
loop length | 1874 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 6 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 30 |
micro-operation queue | 69.67 cycles |
front end | 69.67 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 45.00 | 45.00 | 44.75 | 44.75 | 19.50 | 54.67 | 54.67 | 54.67 | 0.00 | 0.00 | 0.00 | 0.00 | 4.00 | 4.00 |
cycles | 45.00 | 45.00 | 44.75 | 44.75 | 19.50 | 54.67 | 54.67 | 54.67 | 0.00 | 0.00 | 0.00 | 0.00 | 4.00 | 4.00 |
Cycles executing div or sqrt instructions | 24.00 |
Front-end | 69.67 |
Dispatch | 54.67 |
DIV/SQRT | 24.00 |
Overall L1 | 69.67 |
all | 6% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 14% |
all | 9% |
load | 7% |
store | 8% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 10% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDI,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $-0x40,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB $0x100,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV 0x128(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x120(%RDI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x118(%RDI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x108(%RDI),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x100(%RDI),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0xf8(%RDI),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0xf0(%RDI),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0xe8(%RDI),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0xe0(%RDI),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x110(%RDI),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0xd8(%RDI),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0xd0(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x10(%RDI),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RDX,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RCX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RSI,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R8,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R9,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R10,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R11,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R12,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RBX,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R14,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RAX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RDI),%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CALL 402080 <@plt_start@+0x60> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EAX,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,0x74(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CALL 402180 <@plt_start@+0x160> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x18(%R13),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %EAX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SUB $0x2,%EBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV (%RDX),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD $0x3,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %EBX,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CLTD | |||||||||||||||||
IDIV %R12D | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-14 | 6 |
CMP %EDX,%ECX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JL 4357ee <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x173e> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV 0xf8(%RSP),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
IMUL %EAX,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %ESI,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %EAX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 4344dd <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x42d> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV (%R13),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%R13),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD %EBX,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV 0xa0(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %EAX,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD %EBX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV 0x48(%R13),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x70(%R13),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %R13,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVD %R15D,%XMM6 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 |
MOV (%R8),%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%R9),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x40(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (,%R10,8),%RBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ %RBX,%XMM5 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
MOVSXD %EDX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA 0x3(%RAX),%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %EDX,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x2(%RDX),%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ %RCX,%XMM3 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
MOVSXD %ESI,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %EAX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,0xd4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
IMUL %R10,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVQ %XMM3,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
LEA 0x5(%RAX),%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R14D,0xf4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LEA (%R8,%R9,1),%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ %XMM3,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
ADD %RCX,%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %R9,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %EAX,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SHR $0x3,%R9D | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA -0x10(%R12,%R10,8),%R8 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MOV %EAX,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x6,%R9 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
AND $-0x8,%R10D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R9,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %EDI,%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x2(%RDX,%R10,1),%R9D | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
LEA 0x3(%RDX,%RBX,1),%EDX | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MOV %R10D,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMOVGE %R14D,%EDX | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA 0x4(%RBX),%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV 0x98(%RSP),%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
AND $0x7,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R14D,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVD %EDX,%XMM0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 |
XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV $0x1,%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R9D,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %EAX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
XCHG %AX,%AX | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
MOV 0x50(%RSP),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
VMOVD %XMM6,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 5 | 1 |
MOV %EBX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
TEST %R10B,%R10B | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 435819 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1769> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %EBX,0x140(%R13) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x10(%R13),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x18(%R13),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI),%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%R11),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
SUB $0x2,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD $0x3,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %EDI,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CLTD | |||||||||||||||||
IDIVL 0x74(%RSP) | 3 | 2 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 10-17 | 6 |
CMP %EDX,0xf8(%RSP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JL 4357f7 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1747> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV 0xf8(%RSP),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
IMUL %EAX,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %ESI,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %EAX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 43484d <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x79d> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV (%R13),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%R13),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0xa8(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD %EDI,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %EDI,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %EAX,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x68(%R13),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %R13,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVD %R15D,%XMM6 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 |
MOV (%R12),%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RCX),%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (,%R8,8),%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVSXD %ESI,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ %R10,%XMM5 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
MOV 0x90(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x40(%R13),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
IMUL %R8,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA 0x3(%R9),%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %EDX,%R9D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVSXD %EDX,%RBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x2(%RDX),%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA 0x5(%R9),%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%RBX,%R10,1),%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ %RBX,%XMM9 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
MOV %R9D,0xd4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R9D,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RCX,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %R10,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SHR $0x3,%R9D | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R14D,0xf4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVQ %XMM9,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
SAL $0x6,%R9 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %EAX,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R9,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LEA -0x10(%R12,%R8,8),%R8 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
AND $-0x8,%R10D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %EDI,%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x2(%RDX,%R10,1),%R9D | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
LEA 0x3(%RDX,%RBX,1),%EDX | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MOV %R10D,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMOVGE %R14D,%EDX | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA 0x4(%RBX),%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV 0x78(%RSP),%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
AND $0x7,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R14D,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVD %EDX,%XMM0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 |
XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV $0x1,%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R9D,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %EAX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
MOV 0x98(%RSP),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
VMOVD %XMM6,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 5 | 1 |
MOV %EBX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
TEST %R10B,%R10B | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 435821 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1771> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %EBX,0x140(%R13) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x10(%R13),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x18(%R13),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI),%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%R11),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
SUB $0x2,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD $0x3,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %EDI,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CLTD | |||||||||||||||||
IDIVL 0x74(%RSP) | 3 | 2 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 10-17 | 6 |
CMP %EDX,0xf8(%RSP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JL 4357e5 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1735> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV 0xf8(%RSP),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
IMUL %EAX,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %ESI,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %EAX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 434bac <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xafc> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV (%R13),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%R13),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0xd8(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD %EDI,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %EDI,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV 0x50(%R13),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
VMOVD %R15D,%XMM6 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 |
MOV %R13,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %EAX,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%R12),%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RCX),%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (,%R8,8),%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVSXD %ESI,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ %R10,%XMM5 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
MOV 0x58(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x78(%R13),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %R11,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL %R8,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOVSXD %EDX,%RBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA 0x3(%R9),%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %EDX,%R9D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x2(%RDX),%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%RBX,%R10,1),%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA 0x5(%R9),%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ %RBX,%XMM0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
MOV %R9D,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RCX,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %R10,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %EAX,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R9D,0xd4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
AND $-0x8,%R10D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %EAX,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x10(%R11,%R8,8),%R8 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MOV %R14D,0xf4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R10D,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LEA -0x2(%RDX,%R10,1),%R10D | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
LEA 0x3(%RDX,%RBX,1),%EDX | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
LEA 0x4(%RBX),%EBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SHR $0x3,%R9D | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %EBX,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R10D,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVQ %XMM0,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
MOV 0x68(%RSP),%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %R12,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x6,%R9 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %EDI,%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMOVGE %R14D,%EDX | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
AND $0x7,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R9,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVD %EDX,%XMM15 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 |
MOV %EAX,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
MOV 0xb0(%RSP),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
VMOVD %XMM6,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 5 | 1 |
MOV %EBX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
TEST %R10B,%R10B | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 435811 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1761> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %EBX,0x140(%R13) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x10(%R13),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x18(%R13),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI),%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RCX),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
SUB $0x2,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD $0x3,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %EDI,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CLTD | |||||||||||||||||
IDIVL 0x74(%RSP) | 3 | 2 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 10-17 | 6 |
CMP %EDX,0xf8(%RSP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JL 435800 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1750> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV 0xf8(%RSP),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
IMUL %EAX,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %ESI,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %EAX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 434f16 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xe66> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV (%R13),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%R13),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0xe0(%RSP),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD %EDI,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV 0x58(%R13),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD %EDI,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV 0x80(%R13),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %R13,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %EAX,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%R8),%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%R10),%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x60(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (,%RBX,8),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ %RCX,%XMM5 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
MOVSXD %ESI,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
IMUL %RBX,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R11,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R15D,%R11D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R12,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOVSXD %EDX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA 0x3(%R9),%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %EDX,%R9D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x2(%RDX),%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%RAX,%R10,1),%RBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ %RAX,%XMM15 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
LEA 0x5(%R9),%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R9D,0xd4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD %RCX,%RBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %R10,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %EAX,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14D,0xf4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LEA -0x10(%R12,%RBX,8),%R8 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MOV %R9D,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $-0x8,%R10D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SHR $0x3,%R9D | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R10D,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SAL $0x6,%R9 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %EDI,%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R9,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LEA -0x2(%RDX,%R10,1),%R9D | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
LEA 0x3(%RDX,%RBX,1),%EDX | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
CMOVGE %R14D,%EDX | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA 0x4(%RBX),%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
AND $0x7,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R14D,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVD %EDX,%XMM6 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 |
MOV $0x1,%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ %XMM15,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
MOV %R9D,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %EAX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
XCHG %AX,%AX | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
MOV 0x98(%RSP),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
TEST %R10B,%R10B | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 435809 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1759> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %R11D,0x140(%R13) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x60(%R13),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI),%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP $0x1,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JLE 435749 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1699> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV 0xa8(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x90(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x48(%RSP),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RDI,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x88(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x80(%RSP),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0xf8(%RSP),%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
NEG %RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x1(%R10),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %R15,%RBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %R10,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV $0x1,%R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RAX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SAL $0x3,%RCX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (,%R8,8),%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (,%RBX,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RCX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R14,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RDX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
JMP 434fb6 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xf06> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
LEA -0x28(%RBP),%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
RET | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
INC %EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 434879 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x7c9> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
INC %EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 4341aa <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xfa> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
INC %EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 434509 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x459> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
INC %EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 434bd7 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xb27> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 434f16 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xe66> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 434bac <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xafc> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 4344dd <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x42d> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 43484d <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x79d> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
Source file and lines | generate_chunk_kernel.f90:85-161 |
Module | exec |
nb instructions | 412 |
nb uops | 418 |
loop length | 1874 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 6 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 30 |
micro-operation queue | 69.67 cycles |
front end | 69.67 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 45.00 | 45.00 | 44.75 | 44.75 | 19.50 | 54.67 | 54.67 | 54.67 | 0.00 | 0.00 | 0.00 | 0.00 | 4.00 | 4.00 |
cycles | 45.00 | 45.00 | 44.75 | 44.75 | 19.50 | 54.67 | 54.67 | 54.67 | 0.00 | 0.00 | 0.00 | 0.00 | 4.00 | 4.00 |
Cycles executing div or sqrt instructions | 24.00 |
Front-end | 69.67 |
Dispatch | 54.67 |
DIV/SQRT | 24.00 |
Overall L1 | 69.67 |
all | 6% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 14% |
all | 9% |
load | 7% |
store | 8% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 10% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDI,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $-0x40,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB $0x100,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV 0x128(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x120(%RDI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x118(%RDI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x108(%RDI),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x100(%RDI),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0xf8(%RDI),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0xf0(%RDI),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0xe8(%RDI),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0xe0(%RDI),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x110(%RDI),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0xd8(%RDI),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0xd0(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x10(%RDI),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RDX,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RCX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RSI,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R8,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R9,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R10,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R11,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R12,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RBX,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R14,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RAX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RDI),%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CALL 402080 <@plt_start@+0x60> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EAX,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,0x74(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CALL 402180 <@plt_start@+0x160> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x18(%R13),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %EAX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SUB $0x2,%EBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV (%RDX),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD $0x3,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %EBX,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CLTD | |||||||||||||||||
IDIV %R12D | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-14 | 6 |
CMP %EDX,%ECX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JL 4357ee <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x173e> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV 0xf8(%RSP),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
IMUL %EAX,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %ESI,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %EAX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 4344dd <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x42d> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV (%R13),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%R13),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD %EBX,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV 0xa0(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %EAX,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD %EBX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV 0x48(%R13),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x70(%R13),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %R13,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVD %R15D,%XMM6 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 |
MOV (%R8),%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%R9),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x40(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (,%R10,8),%RBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ %RBX,%XMM5 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
MOVSXD %EDX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA 0x3(%RAX),%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %EDX,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x2(%RDX),%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ %RCX,%XMM3 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
MOVSXD %ESI,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %EAX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,0xd4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
IMUL %R10,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVQ %XMM3,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
LEA 0x5(%RAX),%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R14D,0xf4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LEA (%R8,%R9,1),%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ %XMM3,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
ADD %RCX,%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %R9,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %EAX,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SHR $0x3,%R9D | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA -0x10(%R12,%R10,8),%R8 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MOV %EAX,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x6,%R9 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
AND $-0x8,%R10D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R9,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %EDI,%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x2(%RDX,%R10,1),%R9D | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
LEA 0x3(%RDX,%RBX,1),%EDX | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MOV %R10D,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMOVGE %R14D,%EDX | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA 0x4(%RBX),%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV 0x98(%RSP),%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
AND $0x7,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R14D,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVD %EDX,%XMM0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 |
XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV $0x1,%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R9D,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %EAX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
XCHG %AX,%AX | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
MOV 0x50(%RSP),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
VMOVD %XMM6,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 5 | 1 |
MOV %EBX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
TEST %R10B,%R10B | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 435819 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1769> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %EBX,0x140(%R13) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x10(%R13),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x18(%R13),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI),%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%R11),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
SUB $0x2,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD $0x3,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %EDI,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CLTD | |||||||||||||||||
IDIVL 0x74(%RSP) | 3 | 2 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 10-17 | 6 |
CMP %EDX,0xf8(%RSP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JL 4357f7 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1747> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV 0xf8(%RSP),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
IMUL %EAX,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %ESI,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %EAX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 43484d <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x79d> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV (%R13),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%R13),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0xa8(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD %EDI,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %EDI,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %EAX,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x68(%R13),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %R13,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVD %R15D,%XMM6 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 |
MOV (%R12),%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RCX),%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (,%R8,8),%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVSXD %ESI,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ %R10,%XMM5 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
MOV 0x90(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x40(%R13),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
IMUL %R8,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA 0x3(%R9),%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %EDX,%R9D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVSXD %EDX,%RBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x2(%RDX),%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA 0x5(%R9),%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%RBX,%R10,1),%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ %RBX,%XMM9 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
MOV %R9D,0xd4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R9D,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RCX,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %R10,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SHR $0x3,%R9D | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R14D,0xf4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVQ %XMM9,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
SAL $0x6,%R9 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %EAX,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R9,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LEA -0x10(%R12,%R8,8),%R8 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
AND $-0x8,%R10D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %EDI,%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x2(%RDX,%R10,1),%R9D | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
LEA 0x3(%RDX,%RBX,1),%EDX | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MOV %R10D,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMOVGE %R14D,%EDX | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA 0x4(%RBX),%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV 0x78(%RSP),%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
AND $0x7,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R14D,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVD %EDX,%XMM0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 |
XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV $0x1,%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R9D,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %EAX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
MOV 0x98(%RSP),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
VMOVD %XMM6,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 5 | 1 |
MOV %EBX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
TEST %R10B,%R10B | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 435821 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1771> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %EBX,0x140(%R13) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x10(%R13),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x18(%R13),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI),%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%R11),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
SUB $0x2,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD $0x3,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %EDI,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CLTD | |||||||||||||||||
IDIVL 0x74(%RSP) | 3 | 2 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 10-17 | 6 |
CMP %EDX,0xf8(%RSP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JL 4357e5 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1735> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV 0xf8(%RSP),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
IMUL %EAX,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %ESI,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %EAX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 434bac <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xafc> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV (%R13),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%R13),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0xd8(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD %EDI,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %EDI,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV 0x50(%R13),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
VMOVD %R15D,%XMM6 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 |
MOV %R13,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %EAX,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%R12),%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RCX),%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (,%R8,8),%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVSXD %ESI,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ %R10,%XMM5 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
MOV 0x58(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x78(%R13),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %R11,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL %R8,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOVSXD %EDX,%RBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA 0x3(%R9),%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %EDX,%R9D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x2(%RDX),%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%RBX,%R10,1),%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA 0x5(%R9),%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ %RBX,%XMM0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
MOV %R9D,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RCX,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %R10,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %EAX,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R9D,0xd4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
AND $-0x8,%R10D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %EAX,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x10(%R11,%R8,8),%R8 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MOV %R14D,0xf4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R10D,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LEA -0x2(%RDX,%R10,1),%R10D | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
LEA 0x3(%RDX,%RBX,1),%EDX | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
LEA 0x4(%RBX),%EBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SHR $0x3,%R9D | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %EBX,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R10D,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVQ %XMM0,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
MOV 0x68(%RSP),%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %R12,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x6,%R9 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %EDI,%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMOVGE %R14D,%EDX | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
AND $0x7,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R9,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVD %EDX,%XMM15 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 |
MOV %EAX,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
MOV 0xb0(%RSP),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
VMOVD %XMM6,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 5 | 1 |
MOV %EBX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
TEST %R10B,%R10B | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 435811 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1761> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %EBX,0x140(%R13) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x10(%R13),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x18(%R13),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI),%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RCX),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
SUB $0x2,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD $0x3,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %EDI,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CLTD | |||||||||||||||||
IDIVL 0x74(%RSP) | 3 | 2 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 10-17 | 6 |
CMP %EDX,0xf8(%RSP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JL 435800 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1750> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV 0xf8(%RSP),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
IMUL %EAX,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %ESI,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %EAX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 434f16 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xe66> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV (%R13),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%R13),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0xe0(%RSP),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD %EDI,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV 0x58(%R13),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD %EDI,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV 0x80(%R13),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %R13,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %EAX,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%R8),%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%R10),%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x60(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (,%RBX,8),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ %RCX,%XMM5 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
MOVSXD %ESI,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
IMUL %RBX,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R11,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R15D,%R11D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R12,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOVSXD %EDX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA 0x3(%R9),%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %EDX,%R9D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x2(%RDX),%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%RAX,%R10,1),%RBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ %RAX,%XMM15 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
LEA 0x5(%R9),%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R9D,0xd4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD %RCX,%RBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %R10,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %EAX,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14D,0xf4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LEA -0x10(%R12,%RBX,8),%R8 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MOV %R9D,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $-0x8,%R10D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SHR $0x3,%R9D | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R10D,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SAL $0x6,%R9 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %EDI,%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R9,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LEA -0x2(%RDX,%R10,1),%R9D | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
LEA 0x3(%RDX,%RBX,1),%EDX | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
CMOVGE %R14D,%EDX | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA 0x4(%RBX),%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
AND $0x7,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R14D,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVD %EDX,%XMM6 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 |
MOV $0x1,%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ %XMM15,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
MOV %R9D,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %EAX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
XCHG %AX,%AX | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
MOV 0x98(%RSP),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
TEST %R10B,%R10B | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 435809 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1759> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %R11D,0x140(%R13) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x60(%R13),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RSI),%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP $0x1,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JLE 435749 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1699> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV 0xa8(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x90(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x48(%RSP),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RDI,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x88(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x80(%RSP),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0xf8(%RSP),%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
NEG %RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x1(%R10),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %R15,%RBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %R10,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV $0x1,%R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RAX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SAL $0x3,%RCX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (,%R8,8),%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (,%RBX,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RCX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R14,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RDX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
JMP 434fb6 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xf06> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
LEA -0x28(%RBP),%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
RET | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
INC %EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 434879 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x7c9> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
INC %EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 4341aa <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xfa> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
INC %EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 434509 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x459> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
INC %EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 434bd7 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xb27> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 434f16 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xe66> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 434bac <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xafc> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 4344dd <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x42d> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 43484d <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x79d> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0– | 0.05 | 0.03 |
▼Loop 240 - generate_chunk_kernel.f90:98-98 - exec– | 0 | 0 |
○Loop 241 - generate_chunk_kernel.f90:98-98 - exec | 0.01 | 0.01 |
▼Loop 238 - generate_chunk_kernel.f90:106-106 - exec– | 0 | 0 |
○Loop 239 - generate_chunk_kernel.f90:106-106 - exec | 0.01 | 0.01 |
▼Loop 236 - generate_chunk_kernel.f90:114-114 - exec– | 0 | 0 |
○Loop 237 - generate_chunk_kernel.f90:114-114 - exec | 0.01 | 0.01 |
▼Loop 233 - generate_chunk_kernel.f90:119-161 - exec– | 0 | 0 |
▼Loop 234 - generate_chunk_kernel.f90:129-161 - exec– | 0 | 0 |
○Loop 235 - generate_chunk_kernel.f90:129-161 - exec | 0.01 | 0.01 |
▼Loop 242 - generate_chunk_kernel.f90:90-90 - exec– | 0 | 0 |
○Loop 243 - generate_chunk_kernel.f90:90-90 - exec | 0.01 | 0 |