Function: __pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0 | Module: exec | Source: pack_kernel.f90:61-66 | Coverage: 0.01% |
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Function: __pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0 | Module: exec | Source: pack_kernel.f90:61-66 | Coverage: 0.01% |
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/beegfs/hackathon/users/eoseret/qaas_runs/170-861-0321/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/pack_kernel.f90: 61 - 66 |
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61: !$OMP PARALLEL DO PRIVATE(index) |
62: DO k=y_min-depth,y_max+y_inc+depth |
63: !$OMP SIMD |
64: DO j=1,depth |
65: index= buffer_offset + j+(k+depth-1)*depth |
66: left_snd_buffer(index)=field(x_min+x_inc-1+j,k) |
0x42f1a0 PUSH %RBP |
0x42f1a1 MOV %RSP,%RBP |
0x42f1a4 PUSH %R15 |
0x42f1a6 PUSH %R14 |
0x42f1a8 PUSH %R13 |
0x42f1aa PUSH %R12 |
0x42f1ac PUSH %RBX |
0x42f1ad SUB $0x88,%RSP |
0x42f1b4 MOV 0x48(%RDI),%RDX |
0x42f1b8 MOV 0x54(%RDI),%EAX |
0x42f1bb MOV 0x28(%RDI),%RCX |
0x42f1bf MOV 0x58(%RDI),%R13D |
0x42f1c3 MOV 0x40(%RDI),%RBX |
0x42f1c7 MOV 0x30(%RDI),%R15 |
0x42f1cb MOV %RDI,-0x38(%RBP) |
0x42f1cf MOV 0x20(%RDI),%R12 |
0x42f1d3 MOV %RDX,-0x48(%RBP) |
0x42f1d7 MOV %RCX,-0x78(%RBP) |
0x42f1db MOV %EAX,-0x88(%RBP) |
0x42f1e1 CALL 402080 <@plt_start@+0x60> |
0x42f1e6 MOV %EAX,%R14D |
0x42f1e9 CALL 402180 <@plt_start@+0x160> |
0x42f1ee MOV -0x38(%RBP),%R9 |
0x42f1f2 MOV %EAX,%ESI |
0x42f1f4 MOV 0x5c(%R9),%EAX |
0x42f1f8 INC %EAX |
0x42f1fa SUB %R13D,%EAX |
0x42f1fd CLTD |
0x42f1fe IDIV %R14D |
0x42f201 CMP %EDX,%ESI |
0x42f203 JL 42f71c |
0x42f209 IMUL %EAX,%ESI |
0x42f20c ADD %EDX,%ESI |
0x42f20e ADD %ESI,%EAX |
0x42f210 CMP %EAX,%ESI |
0x42f212 JGE 42f668 |
0x42f218 MOV 0x8(%R9),%R8 |
0x42f21c MOV -0x78(%RBP),%R11 |
0x42f220 LEA (%R13,%RSI,1),%EDI |
0x42f225 VMOVQ 0x10(%R9),%XMM10 |
0x42f22b MOVSXD %EDI,%R10 |
0x42f22e LEA (,%R12,8),%RSI |
0x42f236 VMOVQ (%R9),%XMM8 |
0x42f23b VMOVQ 0x18(%R9),%XMM3 |
0x42f241 VMOVQ 0x38(%R9),%XMM2 |
0x42f247 ADD %R13D,%EAX |
0x42f24a MOV %R12,%RDX |
0x42f24d MOV %EDI,-0x40(%RBP) |
0x42f250 VMOVQ %RSI,%XMM1 |
0x42f255 MOV %EAX,-0x68(%RBP) |
0x42f258 LEA (,%RBX,8),%RAX |
0x42f260 MOVB $0,-0x59(%RBP) |
0x42f264 SAL $0x5,%RDX |
0x42f268 MOV %R9,-0xb0(%RBP) |
0x42f26f VMOVQ %RAX,%XMM0 |
0x42f274 MOV (%R8),%ECX |
0x42f277 IMUL %R11,%R10 |
0x42f27b MOV %R12,%R8 |
0x42f27e LEA (%R12,%R12,2),%R11 |
0x42f282 XOR %EAX,%EAX |
0x42f284 MOV %RDX,-0xa0(%RBP) |
0x42f28b SAL $0x3,%R11 |
0x42f28f ADD %R15,%R10 |
0x42f292 MOV %R11,-0x70(%RBP) |
0x42f296 LEA -0x1(%RDI,%RCX,1),%R15D |
0x42f29b MOV %ECX,%R14D |
0x42f29e LEA -0x1(%RCX),%R13D |
0x42f2a2 MOV %ECX,%ESI |
0x42f2a4 IMUL %ECX,%R15D |
0x42f2a8 AND $-0x8,%ESI |
0x42f2ab MOV %RBX,%RDI |
0x42f2ae MOV %R13D,-0x8c(%RBP) |
0x42f2b5 SHR $0x3,%R14D |
0x42f2b9 MOV %ESI,-0x90(%RBP) |
0x42f2bf MOV %R10,-0x50(%RBP) |
0x42f2c3 MOV %ECX,-0x38(%RBP) |
0x42f2c6 MOV %RBX,%R13 |
0x42f2c9 MOV %R15D,-0x3c(%RBP) |
0x42f2cd MOV %R14D,-0x64(%RBP) |
0x42f2d1 MOV %RBX,%R15 |
0x42f2d4 MOV %R12,%R14 |
0x42f2d7 INC %ESI |
0x42f2d9 LEA (%RBX,%RBX,2),%R10 |
0x42f2dd SAL $0x5,%RDI |
0x42f2e1 MOV %ESI,-0xa4(%RBP) |
0x42f2e7 SAL $0x6,%R14 |
0x42f2eb MOV %RDI,-0x98(%RBP) |
0x42f2f2 SAL $0x6,%R15 |
0x42f2f6 SAL $0x4,%R8 |
0x42f2fa SAL $0x4,%R13 |
0x42f2fe TEST %ECX,%ECX |
0x42f300 LEA (,%R10,8),%R10 |
0x42f308 CMOVNS %ECX,%EAX |
0x42f30b INC %EAX |
0x42f30d MOV %EAX,-0x84(%RBP) |
0x42f313 NOPW %CS:(%RAX,%RAX,1) |
0x42f31e XCHG %AX,%AX |
(192) 0x42f320 MOV -0x38(%RBP),%R9D |
(192) 0x42f324 TEST %R9D,%R9D |
(192) 0x42f327 JLE 42f615 |
(192) 0x42f32d MOV -0x88(%RBP),%EAX |
(192) 0x42f333 VMOVQ %XMM10,%RCX |
(192) 0x42f338 VMOVQ %XMM8,%RDI |
(192) 0x42f33d ADD (%RDI),%EAX |
(192) 0x42f33f MOV (%RCX),%EDX |
(192) 0x42f341 CMPL $0x6,-0x8c(%RBP) |
(192) 0x42f348 MOV %EDX,-0x54(%RBP) |
(192) 0x42f34b MOV %EAX,-0x58(%RBP) |
(192) 0x42f34e JBE 42f710 |
(192) 0x42f354 MOV -0x50(%RBP),%R11 |
(192) 0x42f358 MOVSXD -0x3c(%RBP),%RDI |
(192) 0x42f35c CLTQ |
(192) 0x42f35e MOVSXD %EDX,%RCX |
(192) 0x42f361 VMOVQ %XMM3,%R9 |
(192) 0x42f366 MOV -0x48(%RBP),%RDX |
(192) 0x42f36a IMUL %R12,%RAX |
(192) 0x42f36e ADD %R11,%RAX |
(192) 0x42f371 VMOVQ %XMM2,%R11 |
(192) 0x42f376 LEA (%R9,%RAX,8),%RSI |
(192) 0x42f37a LEA 0x1(%RCX,%RDI,1),%RAX |
(192) 0x42f37f MOV -0xa0(%RBP),%R9 |
(192) 0x42f386 MOV -0x64(%RBP),%EDI |
(192) 0x42f389 MOV %RSI,-0x80(%RBP) |
(192) 0x42f38d IMUL %RBX,%RAX |
(192) 0x42f391 ADD %RDX,%RAX |
(192) 0x42f394 LEA (%RSI,%R9,1),%RDX |
(192) 0x42f398 XOR %R9D,%R9D |
(192) 0x42f39b LEA (%R11,%RAX,8),%R11 |
(192) 0x42f39f MOV -0x98(%RBP),%RAX |
(192) 0x42f3a6 MOV %R11,%RCX |
(192) 0x42f3a9 ADD %R11,%RAX |
(192) 0x42f3ac TEST $0x1,%DIL |
(192) 0x42f3b0 JNE 42f680 |
(192) 0x42f3b6 MOV %EDI,%R11D |
(192) 0x42f3b9 MOV -0x70(%RBP),%RDI |
(192) 0x42f3bd NOPL (%RAX) |
(193) 0x42f3c0 VMOVSD (%RSI),%XMM14 |
(193) 0x42f3c4 VMOVSD (%RSI,%R12,8),%XMM15 |
(193) 0x42f3ca VMOVSD (%RSI,%R8,1),%XMM13 |
(193) 0x42f3d0 VMOVSD (%RSI,%RDI,1),%XMM12 |
(193) 0x42f3d5 VMOVSD (%RDX),%XMM11 |
(193) 0x42f3d9 VMOVSD (%RDX,%R12,8),%XMM9 |
(193) 0x42f3df VMOVSD (%RDX,%R8,1),%XMM7 |
(193) 0x42f3e5 VMOVSD (%RDX,%RDI,1),%XMM6 |
(193) 0x42f3ea ADD %R14,%RSI |
(193) 0x42f3ed VMOVSD %XMM14,(%RCX) |
(193) 0x42f3f1 ADD %R14,%RDX |
(193) 0x42f3f4 VMOVSD %XMM15,(%RCX,%RBX,8) |
(193) 0x42f3f9 ADD $0x2,%R9D |
(193) 0x42f3fd VMOVSD %XMM13,(%RCX,%R13,1) |
(193) 0x42f403 VMOVSD %XMM12,(%RCX,%R10,1) |
(193) 0x42f409 VMOVSD %XMM11,(%RAX) |
(193) 0x42f40d ADD %R15,%RCX |
(193) 0x42f410 VMOVSD %XMM9,(%RAX,%RBX,8) |
(193) 0x42f415 VMOVSD %XMM7,(%RAX,%R13,1) |
(193) 0x42f41b VMOVSD %XMM6,(%RAX,%R10,1) |
(193) 0x42f421 ADD %R15,%RAX |
(193) 0x42f424 VMOVSD (%RSI),%XMM14 |
(193) 0x42f428 VMOVSD (%RSI,%R12,8),%XMM15 |
(193) 0x42f42e VMOVSD (%RSI,%R8,1),%XMM13 |
(193) 0x42f434 VMOVSD (%RSI,%RDI,1),%XMM12 |
(193) 0x42f439 VMOVSD (%RDX),%XMM11 |
(193) 0x42f43d VMOVSD (%RDX,%R12,8),%XMM9 |
(193) 0x42f443 VMOVSD (%RDX,%R8,1),%XMM5 |
(193) 0x42f449 VMOVSD (%RDX,%RDI,1),%XMM4 |
(193) 0x42f44e ADD %R14,%RSI |
(193) 0x42f451 VMOVSD %XMM14,(%RCX) |
(193) 0x42f455 ADD %R14,%RDX |
(193) 0x42f458 VMOVSD %XMM15,(%RCX,%RBX,8) |
(193) 0x42f45d VMOVSD %XMM13,(%RCX,%R13,1) |
(193) 0x42f463 VMOVSD %XMM12,(%RCX,%R10,1) |
(193) 0x42f469 VMOVSD %XMM11,(%RAX) |
(193) 0x42f46d ADD %R15,%RCX |
(193) 0x42f470 VMOVSD %XMM9,(%RAX,%RBX,8) |
(193) 0x42f475 VMOVSD %XMM5,(%RAX,%R13,1) |
(193) 0x42f47b VMOVSD %XMM4,(%RAX,%R10,1) |
(193) 0x42f481 ADD %R15,%RAX |
(193) 0x42f484 CMP %R9D,%R11D |
(193) 0x42f487 JNE 42f3c0 |
(192) 0x42f48d MOV %RDI,-0x70(%RBP) |
(192) 0x42f491 MOV -0x90(%RBP),%R9D |
(192) 0x42f498 MOV -0x38(%RBP),%EAX |
(192) 0x42f49b CMP %EAX,%R9D |
(192) 0x42f49e JE 42f615 |
(192) 0x42f4a4 MOV -0xa4(%RBP),%EDX |
(192) 0x42f4aa MOV %R9D,%ESI |
(192) 0x42f4ad MOV -0x38(%RBP),%EDI |
(192) 0x42f4b0 SUB %ESI,%EDI |
(192) 0x42f4b2 LEA -0x1(%RDI),%ECX |
(192) 0x42f4b5 CMP $0x2,%ECX |
(192) 0x42f4b8 JBE 42f557 |
(192) 0x42f4be MOVSXD -0x58(%RBP),%R11 |
(192) 0x42f4c2 MOV -0x50(%RBP),%R9 |
(192) 0x42f4c6 MOV %R12,%RAX |
(192) 0x42f4c9 VMOVQ %XMM3,%RCX |
(192) 0x42f4ce IMUL %RSI,%RAX |
(192) 0x42f4d2 IMUL %RBX,%RSI |
(192) 0x42f4d6 IMUL %R12,%R11 |
(192) 0x42f4da ADD %R9,%R11 |
(192) 0x42f4dd ADD %RAX,%R11 |
(192) 0x42f4e0 MOVSXD -0x54(%RBP),%RAX |
(192) 0x42f4e4 LEA (%RCX,%R11,8),%R9 |
(192) 0x42f4e8 MOVSXD -0x3c(%RBP),%R11 |
(192) 0x42f4ec VMOVSD (%R9),%XMM7 |
(192) 0x42f4f1 LEA 0x1(%RAX,%R11,1),%RCX |
(192) 0x42f4f6 MOV -0x48(%RBP),%RAX |
(192) 0x42f4fa IMUL %RBX,%RCX |
(192) 0x42f4fe ADD %RAX,%RCX |
(192) 0x42f501 ADD %RSI,%RCX |
(192) 0x42f504 VMOVQ %XMM2,%RSI |
(192) 0x42f509 LEA (%RSI,%RCX,8),%R11 |
(192) 0x42f50d VMOVQ %XMM1,%RCX |
(192) 0x42f512 ADD %RCX,%R9 |
(192) 0x42f515 VMOVSD (%R9),%XMM6 |
(192) 0x42f51a ADD %RCX,%R9 |
(192) 0x42f51d VMOVSD (%R9),%XMM14 |
(192) 0x42f522 VMOVSD (%R9,%RCX,1),%XMM15 |
(192) 0x42f528 VMOVQ %XMM0,%R9 |
(192) 0x42f52d VMOVSD %XMM7,(%R11) |
(192) 0x42f532 ADD %R9,%R11 |
(192) 0x42f535 VMOVSD %XMM6,(%R11) |
(192) 0x42f53a ADD %R9,%R11 |
(192) 0x42f53d VMOVSD %XMM14,(%R11) |
(192) 0x42f542 VMOVSD %XMM15,(%R11,%R9,1) |
(192) 0x42f548 TEST $0x3,%DIL |
(192) 0x42f54c JE 42f615 |
(192) 0x42f552 AND $-0x4,%EDI |
(192) 0x42f555 ADD %EDI,%EDX |
(192) 0x42f557 MOV -0x58(%RBP),%EDI |
(192) 0x42f55a MOV -0x50(%RBP),%R11 |
(192) 0x42f55e MOV -0x54(%RBP),%R9D |
(192) 0x42f562 VMOVQ %XMM3,%RSI |
(192) 0x42f567 LEA -0x1(%RDI,%RDX,1),%EAX |
(192) 0x42f56b LEA -0x1(%RDI),%ECX |
(192) 0x42f56e MOV -0x3c(%RBP),%EDI |
(192) 0x42f571 CLTQ |
(192) 0x42f573 IMUL %R12,%RAX |
(192) 0x42f577 ADD %R11,%RAX |
(192) 0x42f57a VMOVSD (%RSI,%RAX,8),%XMM13 |
(192) 0x42f57f LEA (%R9,%RDX,1),%EAX |
(192) 0x42f583 MOV -0x48(%RBP),%RSI |
(192) 0x42f587 ADD %EDI,%EAX |
(192) 0x42f589 VMOVQ %XMM2,%RDI |
(192) 0x42f58e CLTQ |
(192) 0x42f590 IMUL %RBX,%RAX |
(192) 0x42f594 ADD %RSI,%RAX |
(192) 0x42f597 VMOVSD %XMM13,(%RDI,%RAX,8) |
(192) 0x42f59c LEA 0x1(%RDX),%EAX |
(192) 0x42f59f CMP %EAX,-0x38(%RBP) |
(192) 0x42f5a2 JL 42f615 |
(192) 0x42f5a4 LEA (%RCX,%RAX,1),%ESI |
(192) 0x42f5a7 VMOVQ %XMM3,%RDI |
(192) 0x42f5ac ADD %R9D,%EAX |
(192) 0x42f5af ADD $0x2,%EDX |
(192) 0x42f5b2 MOVSXD %ESI,%RSI |
(192) 0x42f5b5 IMUL %R12,%RSI |
(192) 0x42f5b9 ADD %R11,%RSI |
(192) 0x42f5bc VMOVSD (%RDI,%RSI,8),%XMM12 |
(192) 0x42f5c1 MOV %R9D,%ESI |
(192) 0x42f5c4 MOV -0x3c(%RBP),%R9D |
(192) 0x42f5c8 MOV -0x48(%RBP),%RDI |
(192) 0x42f5cc ADD %R9D,%EAX |
(192) 0x42f5cf CLTQ |
(192) 0x42f5d1 IMUL %RBX,%RAX |
(192) 0x42f5d5 ADD %RDI,%RAX |
(192) 0x42f5d8 VMOVQ %XMM2,%RDI |
(192) 0x42f5dd VMOVSD %XMM12,(%RDI,%RAX,8) |
(192) 0x42f5e2 CMP %EDX,-0x38(%RBP) |
(192) 0x42f5e5 JL 42f615 |
(192) 0x42f5e7 LEA (%RCX,%RDX,1),%EAX |
(192) 0x42f5ea ADD %EDX,%ESI |
(192) 0x42f5ec VMOVQ %XMM3,%RCX |
(192) 0x42f5f1 MOV -0x48(%RBP),%RDX |
(192) 0x42f5f5 CLTQ |
(192) 0x42f5f7 IMUL %R12,%RAX |
(192) 0x42f5fb ADD %R11,%RAX |
(192) 0x42f5fe VMOVSD (%RCX,%RAX,8),%XMM11 |
(192) 0x42f603 LEA (%RSI,%R9,1),%EAX |
(192) 0x42f607 CLTQ |
(192) 0x42f609 IMUL %RBX,%RAX |
(192) 0x42f60d ADD %RDX,%RAX |
(192) 0x42f610 VMOVSD %XMM11,(%RDI,%RAX,8) |
(192) 0x42f615 MOV -0x38(%RBP),%R9D |
(192) 0x42f619 MOV -0x60(%RBP),%EDI |
(192) 0x42f61c MOVZX -0x59(%RBP),%ECX |
(192) 0x42f620 MOV $0x1,%ESI |
(192) 0x42f625 MOV -0x78(%RBP),%RDX |
(192) 0x42f629 TEST %R9D,%R9D |
(192) 0x42f62c CMOVNS -0x84(%RBP),%EDI |
(192) 0x42f633 CMOVNS %ESI,%ECX |
(192) 0x42f636 INCL -0x40(%RBP) |
(192) 0x42f639 MOV -0x40(%RBP),%EAX |
(192) 0x42f63c ADD %RDX,-0x50(%RBP) |
(192) 0x42f640 MOV %CL,-0x59(%RBP) |
(192) 0x42f643 ADD %R9D,-0x3c(%RBP) |
(192) 0x42f647 MOV %EDI,-0x60(%RBP) |
(192) 0x42f64a CMP %EAX,-0x68(%RBP) |
(192) 0x42f64d JG 42f320 |
0x42f653 CMPB $0,-0x59(%RBP) |
0x42f657 MOV -0xb0(%RBP),%RBX |
0x42f65e JE 42f668 |
0x42f660 MOV -0x60(%RBP),%R8D |
0x42f664 MOV %R8D,0x50(%RBX) |
0x42f668 ADD $0x88,%RSP |
0x42f66f POP %RBX |
0x42f670 POP %R12 |
0x42f672 POP %R13 |
0x42f674 POP %R14 |
0x42f676 POP %R15 |
0x42f678 POP %RBP |
0x42f679 RET |
0x42f67a NOPW (%RAX,%RAX,1) |
(192) 0x42f680 MOV -0x80(%RBP),%RDI |
(192) 0x42f684 MOV -0x70(%RBP),%R9 |
(192) 0x42f688 VMOVSD (%RDX),%XMM7 |
(192) 0x42f68c VMOVSD (%RDX,%R12,8),%XMM6 |
(192) 0x42f692 VMOVSD (%RDX,%R8,1),%XMM5 |
(192) 0x42f698 ADD %R14,%RSI |
(192) 0x42f69b ADD %R15,%RCX |
(192) 0x42f69e VMOVSD (%RDX,%R9,1),%XMM4 |
(192) 0x42f6a4 VMOVSD (%RDI,%R9,1),%XMM9 |
(192) 0x42f6aa VMOVSD (%RDI),%XMM13 |
(192) 0x42f6ae VMOVSD (%RDI,%R12,8),%XMM12 |
(192) 0x42f6b4 VMOVSD (%RDI,%R8,1),%XMM11 |
(192) 0x42f6ba ADD %R14,%RDX |
(192) 0x42f6bd VMOVSD %XMM13,(%R11) |
(192) 0x42f6c2 VMOVSD %XMM12,(%R11,%RBX,8) |
(192) 0x42f6c8 VMOVSD %XMM11,(%R11,%R13,1) |
(192) 0x42f6ce VMOVSD %XMM9,(%R11,%R10,1) |
(192) 0x42f6d4 VMOVSD %XMM7,(%RAX) |
(192) 0x42f6d8 VMOVSD %XMM6,(%RAX,%RBX,8) |
(192) 0x42f6dd VMOVSD %XMM5,(%RAX,%R13,1) |
(192) 0x42f6e3 VMOVSD %XMM4,(%RAX,%R10,1) |
(192) 0x42f6e9 ADD %R15,%RAX |
(192) 0x42f6ec CMPL $0x1,-0x64(%RBP) |
(192) 0x42f6f0 MOV $0x1,%R9D |
(192) 0x42f6f6 JE 42f491 |
(192) 0x42f6fc MOV -0x64(%RBP),%R11D |
(192) 0x42f700 MOV -0x70(%RBP),%RDI |
(192) 0x42f704 JMP 42f3c0 |
0x42f709 NOPL (%RAX) |
(192) 0x42f710 XOR %ESI,%ESI |
(192) 0x42f712 MOV $0x1,%EDX |
(192) 0x42f717 JMP 42f4ad |
0x42f71c INC %EAX |
0x42f71e XOR %EDX,%EDX |
0x42f720 JMP 42f209 |
0x42f725 NOPW %CS:(%RAX,%RAX,1) |
Path / |
Source file and lines | pack_kernel.f90:61-66 |
Module | exec |
nb instructions | 116 |
nb uops | 114 |
loop length | 456 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 6 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 19 |
micro-operation queue | 19.00 cycles |
front end | 19.00 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 11.00 | 11.00 | 10.75 | 10.75 | 4.50 | 14.00 | 14.00 | 14.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
cycles | 11.00 | 11.00 | 10.75 | 10.75 | 4.50 | 14.00 | 14.00 | 14.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | 6.00 |
Front-end | 19.00 |
Dispatch | 14.00 |
DIV/SQRT | 6.00 |
Overall L1 | 19.00 |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 9% |
load | 11% |
store | 8% |
mul | 6% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 9% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SUB $0x88,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV 0x48(%RDI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x54(%RDI),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x28(%RDI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x58(%RDI),%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x40(%RDI),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x30(%RDI),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RDI,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x20(%RDI),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RDX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RCX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %EAX,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CALL 402080 <@plt_start@+0x60> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EAX,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 402180 <@plt_start@+0x160> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x38(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x5c(%R9),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
INC %EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %R13D,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CLTD | |||||||||||||||||
IDIV %R14D | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-14 | 6 |
CMP %EDX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JL 42f71c <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x57c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
IMUL %EAX,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %ESI,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %EAX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 42f668 <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x4c8> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV 0x8(%R9),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x78(%RBP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%R13,%RSI,1),%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ 0x10(%R9),%XMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVSXD %EDI,%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (,%R12,8),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ (%R9),%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ 0x18(%R9),%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ 0x38(%R9),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADD %R13D,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R12,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EDI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVQ %RSI,%XMM1 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
MOV %EAX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LEA (,%RBX,8),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVB $0,-0x59(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SAL $0x5,%RDX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R9,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVQ %RAX,%XMM0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
MOV (%R8),%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
IMUL %R11,%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R12,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R12,%R12,2),%R11 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %RDX,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SAL $0x3,%R11 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADD %R15,%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R11,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LEA -0x1(%RDI,%RCX,1),%R15D | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MOV %ECX,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x1(%RCX),%R13D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %ECX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL %ECX,%R15D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
AND $-0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R13D,-0x8c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SHR $0x3,%R14D | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %ESI,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R10,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %ECX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RBX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R15D,-0x3c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R14D,-0x64(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RBX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R12,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%RBX,%RBX,2),%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SAL $0x5,%RDI | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %ESI,-0xa4(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SAL $0x6,%R14 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SAL $0x6,%R15 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SAL $0x4,%R8 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SAL $0x4,%R13 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
TEST %ECX,%ECX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (,%R10,8),%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMOVNS %ECX,%EAX | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
INC %EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %EAX,-0x84(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
XCHG %AX,%AX | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
CMPB $0,-0x59(%RBP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV -0xb0(%RBP),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
JE 42f668 <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x4c8> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x60(%RBP),%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %R8D,0x50(%RBX) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD $0x88,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
RET | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
INC %EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 42f209 <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x69> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
Source file and lines | pack_kernel.f90:61-66 |
Module | exec |
nb instructions | 116 |
nb uops | 114 |
loop length | 456 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 6 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 19 |
micro-operation queue | 19.00 cycles |
front end | 19.00 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 11.00 | 11.00 | 10.75 | 10.75 | 4.50 | 14.00 | 14.00 | 14.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
cycles | 11.00 | 11.00 | 10.75 | 10.75 | 4.50 | 14.00 | 14.00 | 14.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | 6.00 |
Front-end | 19.00 |
Dispatch | 14.00 |
DIV/SQRT | 6.00 |
Overall L1 | 19.00 |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 9% |
load | 11% |
store | 8% |
mul | 6% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 9% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SUB $0x88,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV 0x48(%RDI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x54(%RDI),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x28(%RDI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x58(%RDI),%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x40(%RDI),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x30(%RDI),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RDI,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x20(%RDI),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RDX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RCX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %EAX,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CALL 402080 <@plt_start@+0x60> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EAX,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 402180 <@plt_start@+0x160> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x38(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x5c(%R9),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
INC %EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %R13D,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CLTD | |||||||||||||||||
IDIV %R14D | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-14 | 6 |
CMP %EDX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JL 42f71c <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x57c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
IMUL %EAX,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %ESI,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %EAX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 42f668 <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x4c8> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV 0x8(%R9),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x78(%RBP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA (%R13,%RSI,1),%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ 0x10(%R9),%XMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVSXD %EDI,%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (,%R12,8),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ (%R9),%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ 0x18(%R9),%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ 0x38(%R9),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADD %R13D,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R12,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EDI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVQ %RSI,%XMM1 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
MOV %EAX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LEA (,%RBX,8),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVB $0,-0x59(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SAL $0x5,%RDX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R9,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVQ %RAX,%XMM0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
MOV (%R8),%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
IMUL %R11,%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R12,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R12,%R12,2),%R11 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %RDX,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SAL $0x3,%R11 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADD %R15,%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R11,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LEA -0x1(%RDI,%RCX,1),%R15D | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MOV %ECX,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x1(%RCX),%R13D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %ECX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL %ECX,%R15D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
AND $-0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R13D,-0x8c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SHR $0x3,%R14D | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %ESI,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R10,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %ECX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RBX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R15D,-0x3c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R14D,-0x64(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RBX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R12,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%RBX,%RBX,2),%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SAL $0x5,%RDI | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %ESI,-0xa4(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SAL $0x6,%R14 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SAL $0x6,%R15 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SAL $0x4,%R8 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SAL $0x4,%R13 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
TEST %ECX,%ECX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (,%R10,8),%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMOVNS %ECX,%EAX | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
INC %EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %EAX,-0x84(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
XCHG %AX,%AX | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
CMPB $0,-0x59(%RBP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV -0xb0(%RBP),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
JE 42f668 <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x4c8> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x60(%RBP),%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %R8D,0x50(%RBX) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD $0x88,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
RET | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
INC %EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 42f209 <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x69> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0– | 0.01 | 0.01 |
▼Loop 192 - pack_kernel.f90:63-66 - exec– | 0.01 | 0.01 |
○Loop 193 - pack_kernel.f90:66-66 - exec | 0 | 0 |