Function: hypre_BoomerAMGBuildExtPIInterp._omp_fn.0 | Module: exec | Source: par_lr_interp.c:1196-1757 [...] | Coverage: 0.45% |
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Function: hypre_BoomerAMGBuildExtPIInterp._omp_fn.0 | Module: exec | Source: par_lr_interp.c:1196-1757 [...] | Coverage: 0.45% |
---|
/scratch_na/users/xoserete/qaas_runs/171-587-0261/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c: 1196 - 1757 |
-------------------------------------------------------------------------------- |
1196: #pragma omp parallel private(i,my_thread_num,num_threads,start,stop,coarse_counter,jj_counter,jj_counter_offd, P_marker, P_marker_offd,jj,kk,i1,k1,loc_col,jj_begin_row,jj_begin_row_offd,jj_end_row,jj_end_row_offd,diagonal,sum,sgn,jj1,i2,distribute,strong_f_marker) |
[...] |
1217: strong_f_marker = -2; |
1218: coarse_counter = 0; |
1219: jj_counter = start_indexing; |
1220: jj_counter_offd = start_indexing; |
1221: if (n_fine) |
1222: { |
1223: P_marker = hypre_CTAlloc(HYPRE_Int, n_fine); |
1224: for (i = 0; i < n_fine; i++) |
1225: { P_marker[i] = -1; } |
1226: } |
1227: if (full_off_procNodes) |
1228: { |
1229: P_marker_offd = hypre_CTAlloc(HYPRE_Int, full_off_procNodes); |
1230: for (i = 0; i < full_off_procNodes; i++) |
1231: { P_marker_offd[i] = -1;} |
1232: } |
1233: |
1234: /* this thread's row range */ |
1235: my_thread_num = hypre_GetThreadNum(); |
1236: num_threads = hypre_NumActiveThreads(); |
1237: start = (n_fine/num_threads)*my_thread_num; |
1238: if (my_thread_num == num_threads-1) |
1239: { stop = n_fine; } |
1240: else |
1241: { stop = (n_fine/num_threads)*(my_thread_num+1); } |
1242: |
1243: /* loop over rows */ |
1244: for (i = start; i < stop; i++) |
1245: { |
1246: P_diag_i[i] = jj_counter; |
1247: if (num_procs > 1) |
1248: P_offd_i[i] = jj_counter_offd; |
1249: |
1250: if (CF_marker[i] >= 0) |
1251: { |
1252: jj_counter++; |
1253: fine_to_coarse[i] = coarse_counter; |
1254: coarse_counter++; |
[...] |
1262: else if (CF_marker[i] != -3) |
1263: { |
1264: for (jj = S_diag_i[i]; jj < S_diag_i[i+1]; jj++) |
1265: { |
1266: i1 = S_diag_j[jj]; |
1267: if (CF_marker[i1] >= 0) |
1268: { /* i1 is a C point */ |
1269: if (P_marker[i1] < P_diag_i[i]) |
1270: { |
1271: P_marker[i1] = jj_counter; |
1272: jj_counter++; |
1273: } |
1274: } |
1275: else if (CF_marker[i1] != -3) |
1276: { /* i1 is a F point, loop through it's strong neighbors */ |
1277: for (kk = S_diag_i[i1]; kk < S_diag_i[i1+1]; kk++) |
1278: { |
1279: k1 = S_diag_j[kk]; |
1280: if (CF_marker[k1] >= 0) |
1281: { |
1282: if(P_marker[k1] < P_diag_i[i]) |
1283: { |
1284: P_marker[k1] = jj_counter; |
1285: jj_counter++; |
1286: } |
1287: } |
1288: } |
1289: if(num_procs > 1) |
1290: { |
1291: for (kk = S_offd_i[i1]; kk < S_offd_i[i1+1]; kk++) |
1292: { |
1293: if(col_offd_S_to_A) |
1294: k1 = col_offd_S_to_A[S_offd_j[kk]]; |
1295: else |
1296: k1 = S_offd_j[kk]; |
1297: if (CF_marker_offd[k1] >= 0) |
1298: { |
1299: if(P_marker_offd[k1] < P_offd_i[i]) |
1300: { |
1301: tmp_CF_marker_offd[k1] = 1; |
1302: P_marker_offd[k1] = jj_counter_offd; |
1303: jj_counter_offd++; |
[...] |
1311: if (num_procs > 1) |
1312: { |
1313: for (jj = S_offd_i[i]; jj < S_offd_i[i+1]; jj++) |
1314: { |
1315: i1 = S_offd_j[jj]; |
1316: if(col_offd_S_to_A) |
1317: i1 = col_offd_S_to_A[i1]; |
1318: if (CF_marker_offd[i1] >= 0) |
1319: { |
1320: if(P_marker_offd[i1] < P_offd_i[i]) |
1321: { |
1322: tmp_CF_marker_offd[i1] = 1; |
1323: P_marker_offd[i1] = jj_counter_offd; |
1324: jj_counter_offd++; |
1325: } |
1326: } |
1327: else if (CF_marker_offd[i1] != -3) |
1328: { /* F point; look at neighbors of i1. Sop contains global col |
1329: * numbers and entries that could be in S_diag or S_offd or |
1330: * neither. */ |
1331: for(kk = Sop_i[i1]; kk < Sop_i[i1+1]; kk++) |
1332: { |
1333: k1 = Sop_j[kk]; |
1334: if(k1 >= col_1 && k1 < col_n) |
1335: { /* In S_diag */ |
1336: loc_col = k1-col_1; |
1337: if(P_marker[loc_col] < P_diag_i[i]) |
1338: { |
1339: P_marker[loc_col] = jj_counter; |
1340: jj_counter++; |
1341: } |
1342: } |
1343: else |
1344: { |
1345: loc_col = -k1 - 1; |
1346: if(P_marker_offd[loc_col] < P_offd_i[i]) |
1347: { |
1348: P_marker_offd[loc_col] = jj_counter_offd; |
1349: tmp_CF_marker_offd[loc_col] = 1; |
1350: jj_counter_offd++; |
[...] |
1363: #pragma omp barrier |
1364: #endif |
1365: P_diag_i[stop] = jj_counter; |
1366: P_offd_i[stop] = jj_counter_offd; |
1367: fine_to_coarse_offset[my_thread_num] = coarse_counter; |
1368: diag_offset[my_thread_num] = jj_counter; |
1369: offd_offset[my_thread_num] = jj_counter_offd; |
1370: |
1371: /* Stitch P_diag_i, P_offd_i and fine_to_coarse together */ |
1372: #ifdef HYPRE_USING_OPENMP |
1373: #pragma omp barrier |
1374: #endif |
1375: if(my_thread_num == 0) |
1376: { |
1377: /* Calculate the offset for P_diag_i and P_offd_i for each thread */ |
1378: for (i = 1; i < num_threads; i++) |
1379: { |
1380: diag_offset[i] = diag_offset[i-1] + diag_offset[i]; |
1381: fine_to_coarse_offset[i] = fine_to_coarse_offset[i-1] + fine_to_coarse_offset[i]; |
1382: offd_offset[i] = offd_offset[i-1] + offd_offset[i]; |
1383: } |
1384: } |
1385: #ifdef HYPRE_USING_OPENMP |
1386: #pragma omp barrier |
1387: #endif |
1388: |
1389: if(my_thread_num > 0) |
1390: { |
1391: /* update row pointer array with offset, |
1392: * making sure to update the row stop index */ |
1393: for (i = start+1; i <= stop; i++) |
1394: { |
1395: P_diag_i[i] += diag_offset[my_thread_num-1]; |
1396: P_offd_i[i] += offd_offset[my_thread_num-1]; |
1397: } |
1398: /* update fine_to_coarse by offsetting with the offset |
1399: * from the preceding thread */ |
1400: for (i = start; i < stop; i++) |
1401: { |
1402: if(fine_to_coarse[i] >= 0) |
1403: { fine_to_coarse[i] += fine_to_coarse_offset[my_thread_num-1]; } |
1404: } |
1405: } |
1406: #ifdef HYPRE_USING_OPENMP |
1407: #pragma omp barrier |
1408: #endif |
1409: |
1410: if(my_thread_num == 0) |
1411: { |
1412: if (debug_flag==4) |
1413: { |
1414: wall_time = time_getWallclockSeconds() - wall_time; |
1415: hypre_printf("Proc = %d determine structure %f\n", |
1416: my_id, wall_time); |
1417: fflush(NULL); |
[...] |
1423: if (debug_flag== 4) wall_time = time_getWallclockSeconds(); |
1424: |
1425: P_diag_size = P_diag_i[n_fine]; |
1426: P_offd_size = P_offd_i[n_fine]; |
1427: |
1428: if (P_diag_size) |
1429: { |
1430: P_diag_j = hypre_CTAlloc(HYPRE_Int, P_diag_size); |
1431: P_diag_data = hypre_CTAlloc(HYPRE_Real, P_diag_size); |
1432: } |
1433: |
1434: if (P_offd_size) |
1435: { |
1436: P_offd_j = hypre_CTAlloc(HYPRE_Int, P_offd_size); |
1437: P_offd_data = hypre_CTAlloc(HYPRE_Real, P_offd_size); |
1438: } |
1439: } |
1440: |
1441: /* Fine to coarse mapping */ |
1442: if(num_procs > 1 && my_thread_num == 0) |
1443: { |
1444: for (i = 0; i < n_fine; i++) |
1445: fine_to_coarse[i] += my_first_cpt; |
1446: |
1447: hypre_alt_insert_new_nodes(comm_pkg, extend_comm_pkg, fine_to_coarse, |
1448: full_off_procNodes, |
1449: fine_to_coarse_offd); |
1450: |
1451: for (i = 0; i < n_fine; i++) |
1452: fine_to_coarse[i] -= my_first_cpt; |
1453: } |
1454: |
1455: for (i = 0; i < n_fine; i++) |
1456: P_marker[i] = -1; |
1457: |
1458: for (i = 0; i < full_off_procNodes; i++) |
1459: P_marker_offd[i] = -1; |
[...] |
1467: #pragma omp barrier |
1468: #endif |
1469: for (i = start; i < stop; i++) |
1470: { |
1471: jj_begin_row = P_diag_i[i]; |
1472: jj_begin_row_offd = P_offd_i[i]; |
1473: jj_counter = jj_begin_row; |
1474: jj_counter_offd = jj_begin_row_offd; |
[...] |
1480: if (CF_marker[i] >= 0) |
1481: { |
1482: P_diag_j[jj_counter] = fine_to_coarse[i]; |
1483: P_diag_data[jj_counter] = one; |
[...] |
1491: else if (CF_marker[i] != -3) |
1492: { |
1493: strong_f_marker--; |
1494: for (jj = S_diag_i[i]; jj < S_diag_i[i+1]; jj++) |
[...] |
1503: if (CF_marker[i1] >= 0) |
1504: { |
1505: if (P_marker[i1] < jj_begin_row) |
1506: { |
1507: P_marker[i1] = jj_counter; |
1508: P_diag_j[jj_counter] = fine_to_coarse[i1]; |
1509: P_diag_data[jj_counter] = zero; |
1510: jj_counter++; |
1511: } |
1512: } |
1513: else if (CF_marker[i1] != -3) |
1514: { |
1515: P_marker[i1] = strong_f_marker; |
1516: for (kk = S_diag_i[i1]; kk < S_diag_i[i1+1]; kk++) |
1517: { |
1518: k1 = S_diag_j[kk]; |
1519: if (CF_marker[k1] >= 0) |
1520: { |
1521: if(P_marker[k1] < jj_begin_row) |
1522: { |
1523: P_marker[k1] = jj_counter; |
1524: P_diag_j[jj_counter] = fine_to_coarse[k1]; |
1525: P_diag_data[jj_counter] = zero; |
1526: jj_counter++; |
1527: } |
1528: } |
1529: } |
1530: if(num_procs > 1) |
1531: { |
1532: for (kk = S_offd_i[i1]; kk < S_offd_i[i1+1]; kk++) |
1533: { |
1534: if(col_offd_S_to_A) |
1535: k1 = col_offd_S_to_A[S_offd_j[kk]]; |
1536: else |
1537: k1 = S_offd_j[kk]; |
1538: if(CF_marker_offd[k1] >= 0) |
1539: { |
1540: if(P_marker_offd[k1] < jj_begin_row_offd) |
1541: { |
1542: P_marker_offd[k1] = jj_counter_offd; |
1543: P_offd_j[jj_counter_offd] = k1; |
1544: P_offd_data[jj_counter_offd] = zero; |
1545: jj_counter_offd++; |
[...] |
1553: if ( num_procs > 1) |
1554: { |
1555: for (jj=S_offd_i[i]; jj < S_offd_i[i+1]; jj++) |
1556: { |
1557: i1 = S_offd_j[jj]; |
1558: if(col_offd_S_to_A) |
1559: i1 = col_offd_S_to_A[i1]; |
1560: if ( CF_marker_offd[i1] >= 0) |
1561: { |
1562: if(P_marker_offd[i1] < jj_begin_row_offd) |
1563: { |
1564: P_marker_offd[i1] = jj_counter_offd; |
1565: P_offd_j[jj_counter_offd] = i1; |
1566: P_offd_data[jj_counter_offd] = zero; |
1567: jj_counter_offd++; |
1568: } |
1569: } |
1570: else if (CF_marker_offd[i1] != -3) |
1571: { |
1572: P_marker_offd[i1] = strong_f_marker; |
1573: for(kk = Sop_i[i1]; kk < Sop_i[i1+1]; kk++) |
1574: { |
1575: k1 = Sop_j[kk]; |
1576: /* Find local col number */ |
1577: if(k1 >= col_1 && k1 < col_n) |
1578: { |
1579: loc_col = k1-col_1; |
1580: if(P_marker[loc_col] < jj_begin_row) |
1581: { |
1582: P_marker[loc_col] = jj_counter; |
1583: P_diag_j[jj_counter] = fine_to_coarse[loc_col]; |
1584: P_diag_data[jj_counter] = zero; |
1585: jj_counter++; |
1586: } |
1587: } |
1588: else |
1589: { |
1590: loc_col = -k1 - 1; |
1591: if(P_marker_offd[loc_col] < jj_begin_row_offd) |
1592: { |
1593: P_marker_offd[loc_col] = jj_counter_offd; |
1594: P_offd_j[jj_counter_offd]=loc_col; |
1595: P_offd_data[jj_counter_offd] = zero; |
1596: jj_counter_offd++; |
[...] |
1607: diagonal = A_diag_data[A_diag_i[i]]; |
1608: |
1609: for (jj = A_diag_i[i]+1; jj < A_diag_i[i+1]; jj++) |
1610: { /* i1 is a c-point and strongly influences i, accumulate |
1611: * a_(i,i1) into interpolation weight */ |
1612: i1 = A_diag_j[jj]; |
1613: if (P_marker[i1] >= jj_begin_row) |
1614: { |
1615: P_diag_data[P_marker[i1]] += A_diag_data[jj]; |
1616: } |
1617: else if(P_marker[i1] == strong_f_marker) |
1618: { |
1619: sum = zero; |
1620: sgn = 1; |
1621: if(A_diag_data[A_diag_i[i1]] < 0) sgn = -1; |
1622: /* Loop over row of A for point i1 and calculate the sum |
1623: * of the connections to c-points that strongly influence i. */ |
1624: for(jj1 = A_diag_i[i1]+1; jj1 < A_diag_i[i1+1]; jj1++) |
1625: { |
1626: i2 = A_diag_j[jj1]; |
1627: if((P_marker[i2] >= jj_begin_row || i2 == i) && (sgn*A_diag_data[jj1]) < 0) |
1628: sum += A_diag_data[jj1]; |
1629: } |
1630: if(num_procs > 1) |
1631: { |
1632: for(jj1 = A_offd_i[i1]; jj1< A_offd_i[i1+1]; jj1++) |
1633: { |
1634: i2 = A_offd_j[jj1]; |
1635: if(P_marker_offd[i2] >= jj_begin_row_offd && |
1636: (sgn*A_offd_data[jj1]) < 0) |
1637: sum += A_offd_data[jj1]; |
1638: } |
1639: } |
1640: if(sum != 0) |
1641: { |
1642: distribute = A_diag_data[jj]/sum; |
1643: /* Loop over row of A for point i1 and do the distribution */ |
1644: for(jj1 = A_diag_i[i1]+1; jj1 < A_diag_i[i1+1]; jj1++) |
1645: { |
1646: i2 = A_diag_j[jj1]; |
1647: if(P_marker[i2] >= jj_begin_row && (sgn*A_diag_data[jj1]) < 0) |
1648: P_diag_data[P_marker[i2]] += |
1649: distribute*A_diag_data[jj1]; |
1650: if(i2 == i && (sgn*A_diag_data[jj1]) < 0) |
1651: diagonal += distribute*A_diag_data[jj1]; |
1652: } |
1653: if(num_procs > 1) |
1654: { |
1655: for(jj1 = A_offd_i[i1]; jj1 < A_offd_i[i1+1]; jj1++) |
1656: { |
1657: i2 = A_offd_j[jj1]; |
1658: if(P_marker_offd[i2] >= jj_begin_row_offd && |
1659: (sgn*A_offd_data[jj1]) < 0) |
1660: P_offd_data[P_marker_offd[i2]] += |
[...] |
1667: diagonal += A_diag_data[jj]; |
1668: } |
1669: } |
1670: /* neighbor i1 weakly influences i, accumulate a_(i,i1) into |
1671: * diagonal */ |
1672: else if (CF_marker[i1] != -3) |
1673: { |
1674: if(num_functions == 1 || dof_func[i] == dof_func[i1]) |
1675: diagonal += A_diag_data[jj]; |
1676: } |
1677: } |
1678: if(num_procs > 1) |
1679: { |
1680: for(jj = A_offd_i[i]; jj < A_offd_i[i+1]; jj++) |
1681: { |
1682: i1 = A_offd_j[jj]; |
1683: if(P_marker_offd[i1] >= jj_begin_row_offd) |
1684: P_offd_data[P_marker_offd[i1]] += A_offd_data[jj]; |
1685: else if(P_marker_offd[i1] == strong_f_marker) |
1686: { |
1687: sum = zero; |
1688: for(jj1 = A_ext_i[i1]; jj1 < A_ext_i[i1+1]; jj1++) |
1689: { |
1690: k1 = A_ext_j[jj1]; |
1691: if(k1 >= col_1 && k1 < col_n) |
1692: { /* diag */ |
1693: loc_col = k1 - col_1; |
1694: if(P_marker[loc_col] >= jj_begin_row || loc_col == i) |
1695: sum += A_ext_data[jj1]; |
1696: } |
1697: else |
1698: { |
1699: loc_col = -k1 - 1; |
1700: if(P_marker_offd[loc_col] >= jj_begin_row_offd) |
1701: sum += A_ext_data[jj1]; |
1702: } |
1703: } |
1704: if(sum != 0) |
1705: { |
1706: distribute = A_offd_data[jj] / sum; |
1707: for(jj1 = A_ext_i[i1]; jj1 < A_ext_i[i1+1]; jj1++) |
1708: { |
1709: k1 = A_ext_j[jj1]; |
1710: if(k1 >= col_1 && k1 < col_n) |
1711: { /* diag */ |
1712: loc_col = k1 - col_1; |
1713: if(P_marker[loc_col] >= jj_begin_row) |
1714: P_diag_data[P_marker[loc_col]] += distribute* |
1715: A_ext_data[jj1]; |
1716: if(loc_col == i) |
1717: diagonal += distribute*A_ext_data[jj1]; |
1718: } |
1719: else |
1720: { |
1721: loc_col = -k1 - 1; |
1722: if(P_marker_offd[loc_col] >= jj_begin_row_offd) |
1723: P_offd_data[P_marker_offd[loc_col]] += distribute* |
[...] |
1730: diagonal += A_offd_data[jj]; |
1731: } |
1732: } |
1733: else if (CF_marker_offd[i1] != -3) |
1734: { |
1735: if(num_functions == 1 || dof_func[i] == dof_func_offd[i1]) |
1736: diagonal += A_offd_data[jj]; |
1737: } |
1738: } |
1739: } |
1740: if (diagonal) |
1741: { |
1742: for(jj = jj_begin_row; jj < jj_end_row; jj++) |
1743: P_diag_data[jj] /= -diagonal; |
1744: for(jj = jj_begin_row_offd; jj < jj_end_row_offd; jj++) |
1745: P_offd_data[jj] /= -diagonal; |
1746: } |
1747: } |
1748: strong_f_marker--; |
[...] |
1754: if (n_fine) |
1755: { hypre_TFree(P_marker); } |
1756: if (full_off_procNodes) |
1757: { hypre_TFree(P_marker_offd); } |
0x47c9f0 PUSH %R13 |
0x47c9f2 MOV %RDI,%RAX |
0x47c9f5 LEA 0x10(%RSP),%R13 |
0x47c9fa AND $-0x40,%RSP |
0x47c9fe PUSHQ -0x8(%R13) |
0x47ca02 PUSH %RBP |
0x47ca03 MOV %RSP,%RBP |
0x47ca06 PUSH %R15 |
0x47ca08 PUSH %R14 |
0x47ca0a PUSH %R13 |
0x47ca0c PUSH %R12 |
0x47ca0e PUSH %RBX |
0x47ca0f SUB $0x308,%RSP |
0x47ca16 MOV %RDI,-0x70(%RBP) |
0x47ca1a MOV 0x158(%RDI),%RBX |
0x47ca21 MOV 0x140(%RDI),%RSI |
0x47ca28 MOV 0x138(%RDI),%RDX |
0x47ca2f MOV 0x128(%RDI),%R9 |
0x47ca36 MOV 0x120(%RDI),%R10 |
0x47ca3d MOV 0x118(%RDI),%R11 |
0x47ca44 MOV %RBX,-0xb0(%RBP) |
0x47ca4b MOV 0x110(%RDI),%R12 |
0x47ca52 VMOVSD 0x170(%RDI),%XMM6 |
0x47ca5a MOV %RSI,-0x210(%RBP) |
0x47ca61 MOV 0x108(%RDI),%R14 |
0x47ca68 VMOVSD 0x168(%RDI),%XMM3 |
0x47ca70 MOV %RDX,-0x1f8(%RBP) |
0x47ca77 MOV 0x160(%RDI),%RCX |
0x47ca7e MOV 0x150(%RDI),%R8 |
0x47ca85 MOV %R9,-0x260(%RBP) |
0x47ca8c MOV %R10,-0x48(%RBP) |
0x47ca90 MOV 0x148(%RDI),%RBX |
0x47ca97 MOV %R11,-0x240(%RBP) |
0x47ca9e MOV %R12,-0x258(%RBP) |
0x47caa5 VMOVSD %XMM6,-0x1d0(%RBP) |
0x47caad MOV %R14,-0x248(%RBP) |
0x47cab4 MOV 0xf8(%RDI),%R15 |
0x47cabb MOV 0xd0(%RDI),%RSI |
0x47cac2 MOV 0xa8(%RAX),%RDX |
0x47cac9 MOV 0xb8(%RDI),%RDI |
0x47cad0 MOV 0xa0(%RAX),%R9 |
0x47cad7 MOV %R15,-0xf0(%RBP) |
0x47cade MOV 0x98(%RAX),%R10 |
0x47cae5 MOV 0x90(%RAX),%R11 |
0x47caec MOV %RSI,-0x38(%RBP) |
0x47caf0 MOV 0x80(%RAX),%R14 |
0x47caf7 MOV 0x78(%RAX),%R15 |
0x47cafb MOV %RDI,-0x58(%RBP) |
0x47caff MOV 0x88(%RAX),%R12 |
0x47cb06 MOV 0x68(%RAX),%RDI |
0x47cb0a MOV %RDX,-0xf8(%RBP) |
0x47cb11 MOV 0x70(%RAX),%RSI |
0x47cb15 MOV 0x60(%RAX),%RDX |
0x47cb19 MOV %R9,-0x68(%RBP) |
0x47cb1d MOV %R10,-0x198(%RBP) |
0x47cb24 MOV 0x58(%RAX),%R9 |
0x47cb28 MOV %R11,-0x50(%RBP) |
0x47cb2c MOV 0x50(%RAX),%R10 |
0x47cb30 MOV 0x48(%RAX),%R11 |
0x47cb34 MOV %R14,-0x1a8(%RBP) |
0x47cb3b MOV %R15,-0x1c0(%RBP) |
0x47cb42 MOV %RDI,-0x1b0(%RBP) |
0x47cb49 MOV %RDX,-0x238(%RBP) |
0x47cb50 MOV %R9,-0x1b8(%RBP) |
0x47cb57 MOV %R12,-0x190(%RBP) |
0x47cb5e MOV %RSI,-0x100(%RBP) |
0x47cb65 MOV %R10,-0x200(%RBP) |
0x47cb6c MOV %R11,-0x120(%RBP) |
0x47cb73 MOV 0x40(%RAX),%R12 |
0x47cb77 MOV 0x28(%RAX),%R14 |
0x47cb7b MOV 0x20(%RAX),%R15 |
0x47cb7f MOV 0x18(%RAX),%RDI |
0x47cb83 MOV 0x10(%RAX),%RDX |
0x47cb87 MOV %R12,-0x188(%RBP) |
0x47cb8e MOV 0x8(%RAX),%R9 |
0x47cb92 MOV %R14,-0x268(%RBP) |
0x47cb99 MOV %R15,-0x178(%RBP) |
0x47cba0 MOV (%RAX),%R14 |
0x47cba3 MOV %RDI,-0x250(%RBP) |
0x47cbaa MOV %RDX,-0x180(%RBP) |
0x47cbb1 MOV %R9,-0x110(%RBP) |
0x47cbb8 TEST %RSI,%RSI |
0x47cbbb JNE 47f290 |
0x47cbc1 MOV -0x70(%RBP),%RSI |
0x47cbc5 MOV 0x130(%RSI),%R10 |
0x47cbcc MOV (%R10),%RDI |
0x47cbcf TEST %RDI,%RDI |
0x47cbd2 JNE 47f360 |
0x47cbd8 MOV %R8,-0x1a0(%RBP) |
0x47cbdf MOV %RCX,-0x130(%RBP) |
0x47cbe6 VMOVSD %XMM3,-0x128(%RBP) |
0x47cbee CALL 5b39c0 <hypre_GetThreadNum> |
0x47cbf3 MOV %RAX,%R12 |
0x47cbf6 MOV %RAX,-0x118(%RBP) |
0x47cbfd CALL 5b39b0 <hypre_NumActiveThreads> |
0x47cc02 MOV %R12,%R9 |
0x47cc05 VMOVSD -0x128(%RBP),%XMM0 |
0x47cc0d MOV -0x1a0(%RBP),%R8 |
0x47cc14 MOV %RAX,%RSI |
0x47cc17 MOV -0x100(%RBP),%RAX |
0x47cc1e LEA -0x1(%RSI),%RCX |
0x47cc22 CQTO |
0x47cc24 IDIV %RSI |
0x47cc27 IMUL %RAX,%R9 |
0x47cc2b ADD %R9,%RAX |
0x47cc2e CMP %RCX,%R12 |
0x47cc31 MOV %R9,-0x108(%RBP) |
0x47cc38 MOV -0x130(%RBP),%RCX |
0x47cc3f CMOVE -0x100(%RBP),%RAX |
0x47cc47 CMP %R9,%RAX |
0x47cc4a MOV %RAX,-0x40(%RBP) |
0x47cc4e JLE 48092f |
0x47cc54 MOV -0x70(%RBP),%R10 |
0x47cc58 MOV -0x108(%RBP),%RAX |
0x47cc5f MOV %RCX,-0x1c8(%RBP) |
0x47cc66 XOR %R15D,%R15D |
0x47cc69 MOV %R8,-0x208(%RBP) |
0x47cc70 MOV %RBX,%RCX |
0x47cc73 MOV 0x38(%R10),%R11 |
0x47cc77 MOV %RSI,-0x230(%RBP) |
0x47cc7e MOV %R11,%R8 |
0x47cc81 MOV -0x58(%RBP),%R11 |
0x47cc85 JMP 47ccab |
0x47cc87 NOPW (%RAX,%RAX,1) |
(759) 0x47cc90 MOV -0x48(%RBP),%R12 |
(759) 0x47cc94 INC %RBX |
(759) 0x47cc97 MOV %R15,(%R12,%RAX,8) |
(759) 0x47cc9b INC %R15 |
(759) 0x47cc9e INC %RAX |
(759) 0x47cca1 CMP %RAX,-0x40(%RBP) |
(759) 0x47cca5 JE 47cf98 |
(759) 0x47ccab MOV %RBX,(%R11,%RAX,8) |
(759) 0x47ccaf CMPQ $0x1,(%R8) |
(759) 0x47ccb3 JLE 47ccbd |
(759) 0x47ccb5 MOV -0x38(%RBP),%RSI |
(759) 0x47ccb9 MOV %RCX,(%RSI,%RAX,8) |
(759) 0x47ccbd MOV (%R14,%RAX,8),%R12 |
(759) 0x47ccc1 TEST %R12,%R12 |
(759) 0x47ccc4 JNS 47cc90 |
(759) 0x47ccc6 CMP $-0x3,%R12 |
(759) 0x47ccca JE 47cc9e |
(759) 0x47cccc MOV -0x50(%RBP),%RDX |
(759) 0x47ccd0 MOV (%RDX,%RAX,8),%RSI |
(759) 0x47ccd4 MOV 0x8(%RDX,%RAX,8),%R12 |
(759) 0x47ccd9 CMP %R12,%RSI |
(759) 0x47ccdc JGE 47cdc7 |
(759) 0x47cce2 MOV %R15,-0x1a0(%RBP) |
(759) 0x47cce9 MOV -0x198(%RBP),%R10 |
(759) 0x47ccf0 JMP 47cd1f |
0x47ccf2 NOPW (%RAX,%RAX,1) |
(762) 0x47ccf8 MOV (%R11,%RAX,8),%RDX |
(762) 0x47ccfc ADD %R13,%RDI |
(762) 0x47ccff CMP %RDX,(%RDI) |
(762) 0x47cd02 JGE 47cd13 |
(762) 0x47cd04 MOV %RBX,(%RDI) |
(762) 0x47cd07 MOV -0x50(%RBP),%R15 |
(762) 0x47cd0b INC %RBX |
(762) 0x47cd0e MOV 0x8(%R15,%RAX,8),%R12 |
(762) 0x47cd13 INC %RSI |
(762) 0x47cd16 CMP %R12,%RSI |
(762) 0x47cd19 JGE 47cdc0 |
(762) 0x47cd1f MOV (%R10,%RSI,8),%R9 |
(762) 0x47cd23 MOV (%R14,%R9,8),%R15 |
(762) 0x47cd27 LEA (,%R9,8),%RDI |
(762) 0x47cd2f TEST %R15,%R15 |
(762) 0x47cd32 JNS 47ccf8 |
(762) 0x47cd34 CMP $-0x3,%R15 |
(762) 0x47cd38 JE 47cd13 |
(762) 0x47cd3a MOV -0x50(%RBP),%R15 |
(762) 0x47cd3e ADD $0x8,%RDI |
(762) 0x47cd42 MOV (%R15,%R9,8),%RDX |
(762) 0x47cd46 ADD %RDI,%R15 |
(762) 0x47cd49 MOV (%R15),%R12 |
(762) 0x47cd4c CMP %R12,%RDX |
(762) 0x47cd4f JGE 47cd9e |
(762) 0x47cd51 MOV %R8,-0x128(%RBP) |
(762) 0x47cd58 MOV %RSI,-0x130(%RBP) |
(762) 0x47cd5f NOP |
(765) 0x47cd60 MOV (%R10,%RDX,8),%R8 |
(765) 0x47cd64 CMPQ $0,(%R14,%R8,8) |
(765) 0x47cd69 LEA (,%R8,8),%RSI |
(765) 0x47cd71 JS 47cd88 |
(765) 0x47cd73 ADD %R13,%RSI |
(765) 0x47cd76 MOV (%RSI),%R8 |
(765) 0x47cd79 CMP %R8,(%R11,%RAX,8) |
(765) 0x47cd7d JLE 47cd88 |
(765) 0x47cd7f MOV %RBX,(%RSI) |
(765) 0x47cd82 INC %RBX |
(765) 0x47cd85 MOV (%R15),%R12 |
(765) 0x47cd88 INC %RDX |
(765) 0x47cd8b CMP %R12,%RDX |
(765) 0x47cd8e JL 47cd60 |
(762) 0x47cd90 MOV -0x128(%RBP),%R8 |
(762) 0x47cd97 MOV -0x130(%RBP),%RSI |
(762) 0x47cd9e CMPQ $0x1,(%R8) |
(762) 0x47cda2 JG 47e6d8 |
(762) 0x47cda8 MOV -0x50(%RBP),%RDI |
(762) 0x47cdac INC %RSI |
(762) 0x47cdaf MOV 0x8(%RDI,%RAX,8),%R12 |
(762) 0x47cdb4 CMP %R12,%RSI |
(762) 0x47cdb7 JL 47cd1f |
(759) 0x47cdbd NOPL (%RAX) |
(759) 0x47cdc0 MOV -0x1a0(%RBP),%R15 |
(759) 0x47cdc7 CMPQ $0x1,(%R8) |
(759) 0x47cdcb JLE 47cc9e |
(759) 0x47cdd1 MOV -0x68(%RBP),%RSI |
(759) 0x47cdd5 MOV (%RSI,%RAX,8),%RDI |
(759) 0x47cdd9 CMP 0x8(%RSI,%RAX,8),%RDI |
(759) 0x47cdde JGE 47cc9e |
(759) 0x47cde4 MOV -0x70(%RBP),%R9 |
(759) 0x47cde8 MOV -0x178(%RBP),%R12 |
(759) 0x47cdef MOV %R15,-0x270(%RBP) |
(759) 0x47cdf6 MOV %R14,-0x318(%RBP) |
(759) 0x47cdfd MOV -0x210(%RBP),%R15 |
(759) 0x47ce04 MOV 0xf0(%R9),%R10 |
(759) 0x47ce0b MOV %R8,-0x320(%RBP) |
(759) 0x47ce12 MOV (%R10),%R9 |
(759) 0x47ce15 MOV -0x1c0(%RBP),%R10 |
(759) 0x47ce1c JMP 47ce5b |
0x47ce1e XCHG %AX,%AX |
(760) 0x47ce20 MOV -0x38(%RBP),%R14 |
(760) 0x47ce24 MOV -0x60(%RBP),%RSI |
(760) 0x47ce28 MOV (%R14,%RAX,8),%R8 |
(760) 0x47ce2c ADD %RDX,%RSI |
(760) 0x47ce2f CMP %R8,(%RSI) |
(760) 0x47ce32 JGE 47ce49 |
(760) 0x47ce34 MOV -0xf0(%RBP),%R14 |
(760) 0x47ce3b MOVQ $0x1,(%R14,%RDX,1) |
(760) 0x47ce43 MOV %RCX,(%RSI) |
(760) 0x47ce46 INC %RCX |
(760) 0x47ce49 MOV -0x68(%RBP),%RDX |
(760) 0x47ce4d INC %RDI |
(760) 0x47ce50 CMP %RDI,0x8(%RDX,%RAX,8) |
(760) 0x47ce55 JLE 47cf70 |
(760) 0x47ce5b MOV -0xf8(%RBP),%R8 |
(760) 0x47ce62 MOV (%R8,%RDI,8),%R14 |
(760) 0x47ce66 TEST %R12,%R12 |
(760) 0x47ce69 JE 47ce6f |
(760) 0x47ce6b MOV (%R12,%R14,8),%R14 |
(760) 0x47ce6f MOV (%R9,%R14,8),%RSI |
(760) 0x47ce73 LEA (,%R14,8),%RDX |
(760) 0x47ce7b TEST %RSI,%RSI |
(760) 0x47ce7e JNS 47ce20 |
(760) 0x47ce80 CMP $-0x3,%RSI |
(760) 0x47ce84 JE 47ce49 |
(760) 0x47ce86 MOV -0x1f8(%RBP),%R8 |
(760) 0x47ce8d LEA 0x8(%R8,%RDX,1),%R14 |
(760) 0x47ce92 MOV (%R8,%RDX,1),%RSI |
(760) 0x47ce96 MOV (%R14),%R8 |
(760) 0x47ce99 CMP %R8,%RSI |
(760) 0x47ce9c JGE 47ce49 |
(760) 0x47ce9e MOV %RDI,-0x2f0(%RBP) |
(760) 0x47cea5 MOV -0x1a8(%RBP),%RDI |
(760) 0x47ceac MOV %R12,-0x130(%RBP) |
(760) 0x47ceb3 MOV %R9,-0x1a0(%RBP) |
(760) 0x47ceba MOV %R14,-0x128(%RBP) |
(760) 0x47cec1 JMP 47cef8 |
0x47cec3 NOPL (%RAX,%RAX,1) |
(761) 0x47cec8 CMP %RDX,%R10 |
(761) 0x47cecb JG 47cf01 |
(761) 0x47cecd SUB %R10,%RDX |
(761) 0x47ced0 LEA (%R13,%RDX,8),%R12 |
(761) 0x47ced5 MOV (%R12),%R9 |
(761) 0x47ced9 CMP %R9,(%R11,%RAX,8) |
(761) 0x47cedd JLE 47cef0 |
(761) 0x47cedf MOV %RBX,(%R12) |
(761) 0x47cee3 MOV -0x128(%RBP),%R8 |
(761) 0x47ceea INC %RBX |
(761) 0x47ceed MOV (%R8),%R8 |
(761) 0x47cef0 INC %RSI |
(761) 0x47cef3 CMP %R8,%RSI |
(761) 0x47cef6 JGE 47cf42 |
(761) 0x47cef8 MOV (%R15,%RSI,8),%RDX |
(761) 0x47cefc CMP %RDX,%RDI |
(761) 0x47ceff JG 47cec8 |
(761) 0x47cf01 MOV -0x60(%RBP),%R14 |
(761) 0x47cf05 NOT %RDX |
(761) 0x47cf08 MOV -0x38(%RBP),%R9 |
(761) 0x47cf0c LEA (%R14,%RDX,8),%R12 |
(761) 0x47cf10 MOV (%R12),%R14 |
(761) 0x47cf14 CMP %R14,(%R9,%RAX,8) |
(761) 0x47cf18 JLE 47cef0 |
(761) 0x47cf1a MOV -0xf0(%RBP),%R8 |
(761) 0x47cf21 MOV %RCX,(%R12) |
(761) 0x47cf25 INC %RSI |
(761) 0x47cf28 INC %RCX |
(761) 0x47cf2b MOVQ $0x1,(%R8,%RDX,8) |
(761) 0x47cf33 MOV -0x128(%RBP),%RDX |
(761) 0x47cf3a MOV (%RDX),%R8 |
(761) 0x47cf3d CMP %R8,%RSI |
(761) 0x47cf40 JL 47cef8 |
(760) 0x47cf42 MOV -0x2f0(%RBP),%RDI |
(760) 0x47cf49 MOV -0x68(%RBP),%RDX |
(760) 0x47cf4d MOV -0x130(%RBP),%R12 |
(760) 0x47cf54 MOV -0x1a0(%RBP),%R9 |
(760) 0x47cf5b INC %RDI |
(760) 0x47cf5e CMP %RDI,0x8(%RDX,%RAX,8) |
(760) 0x47cf63 JG 47ce5b |
(759) 0x47cf69 NOPL (%RAX) |
(759) 0x47cf70 INC %RAX |
(759) 0x47cf73 MOV -0x270(%RBP),%R15 |
(759) 0x47cf7a MOV -0x318(%RBP),%R14 |
(759) 0x47cf81 MOV -0x320(%RBP),%R8 |
(759) 0x47cf88 CMP %RAX,-0x40(%RBP) |
(759) 0x47cf8c JNE 47ccab |
0x47cf92 NOPW (%RAX,%RAX,1) |
0x47cf98 MOV %RCX,%RAX |
0x47cf9b MOV -0x208(%RBP),%R8 |
0x47cfa2 MOV -0x230(%RBP),%RSI |
0x47cfa9 MOV -0x1c8(%RBP),%RCX |
0x47cfb0 MOV %RCX,-0xf0(%RBP) |
0x47cfb7 MOV %RAX,-0x1c8(%RBP) |
0x47cfbe MOV %RSI,-0x1a0(%RBP) |
0x47cfc5 MOV %R8,-0x128(%RBP) |
0x47cfcc VMOVSD %XMM0,-0x130(%RBP) |
0x47cfd4 CALL 411290 <GOMP_barrier@plt> |
0x47cfd9 MOV -0x40(%RBP),%R11 |
0x47cfdd MOV -0x1c8(%RBP),%RDX |
0x47cfe4 MOV -0x118(%RBP),%R8 |
0x47cfeb MOV -0x58(%RBP),%R9 |
0x47cfef MOV -0x38(%RBP),%RDI |
0x47cff3 MOV -0xb0(%RBP),%RSI |
0x47cffa LEA (,%R11,8),%R12 |
0x47d002 MOV %RBX,(%R9,%R11,8) |
0x47d006 LEA (,%R8,8),%R10 |
0x47d00e MOV %RDX,(%RDI,%R11,8) |
0x47d012 MOV %R15,(%RSI,%R8,8) |
0x47d016 MOV -0x128(%RBP),%R15 |
0x47d01d MOV %R10,-0x1c8(%RBP) |
0x47d024 LEA (%R15,%R10,1),%RAX |
0x47d028 MOV %RBX,(%RAX) |
0x47d02b MOV -0xf0(%RBP),%RBX |
0x47d032 MOV %RAX,-0x208(%RBP) |
0x47d039 LEA (%RBX,%R10,1),%RBX |
0x47d03d MOV %RDX,(%RBX) |
0x47d040 CALL 411290 <GOMP_barrier@plt> |
0x47d045 MOV -0x118(%RBP),%R15 |
0x47d04c MOV -0xf0(%RBP),%RCX |
0x47d053 MOV -0x128(%RBP),%R11 |
0x47d05a VMOVSD -0x130(%RBP),%XMM1 |
0x47d062 TEST %R15,%R15 |
0x47d065 MOV -0x1a0(%RBP),%R8 |
0x47d06c JE 47e7a8 |
0x47d072 MOV %RCX,-0x118(%RBP) |
0x47d079 VMOVSD %XMM1,-0xf0(%RBP) |
0x47d081 CALL 411290 <GOMP_barrier@plt> |
0x47d086 TEST %R15,%R15 |
0x47d089 VMOVSD -0xf0(%RBP),%XMM3 |
0x47d091 MOV -0x118(%RBP),%R9 |
0x47d098 MOV -0x128(%RBP),%RDI |
0x47d09f MOV -0x1c8(%RBP),%R10 |
0x47d0a6 JLE 47d760 |
0x47d0ac MOV -0x108(%RBP),%RAX |
0x47d0b3 INC %RAX |
0x47d0b6 CMP %RAX,-0x40(%RBP) |
0x47d0ba JL 480c31 |
0x47d0c0 MOV -0x40(%RBP),%R15 |
0x47d0c4 MOV -0x108(%RBP),%RSI |
0x47d0cb LEA -0x8(%R10),%RDX |
0x47d0cf LEA (%RDI,%RDX,1),%R11 |
0x47d0d3 ADD %R9,%RDX |
0x47d0d6 SUB %RSI,%R15 |
0x47d0d9 LEA -0x1(%R15),%RCX |
0x47d0dd MOV %R15,-0x118(%RBP) |
0x47d0e4 MOV %RCX,-0x130(%RBP) |
0x47d0eb CMP $0x2,%RCX |
0x47d0ef JBE 4805d0 |
0x47d0f5 MOV -0x38(%RBP),%R8 |
0x47d0f9 LEA (,%RAX,8),%RSI |
0x47d101 MOV -0x58(%RBP),%RCX |
0x47d105 LEA 0x8(%R12),%RDI |
0x47d10a MOV %RAX,-0x128(%RBP) |
0x47d111 LEA (%R8,%RSI,1),%R9 |
0x47d115 LEA (%R8,%RDI,1),%R15 |
0x47d119 LEA (%RCX,%RDI,1),%R12 |
0x47d11d LEA (%RCX,%RSI,1),%RCX |
0x47d121 ADD $0x40,%RSI |
0x47d125 CMP %RBX,%R9 |
0x47d128 SETAE %R8B |
0x47d12c CMP %R15,%RDX |
0x47d12f MOV %RCX,-0xf0(%RBP) |
0x47d136 SETAE %DIL |
0x47d13a OR %EDI,%R8D |
0x47d13d CMP %R12,%RDX |
0x47d140 SETAE %DIL |
0x47d144 CMP %RBX,%RCX |
0x47d147 MOV -0x58(%RBP),%RCX |
0x47d14b SETAE %BL |
0x47d14e OR %EBX,%EDI |
0x47d150 ADD %RSI,%RCX |
0x47d153 MOV -0x38(%RBP),%RBX |
0x47d157 AND %R8D,%EDI |
0x47d15a CMP %RCX,%R9 |
0x47d15d MOV -0x208(%RBP),%RCX |
0x47d164 SETAE %R8B |
0x47d168 ADD %RBX,%RSI |
0x47d16b MOV -0xf0(%RBP),%RBX |
0x47d172 CMP %RSI,%RBX |
0x47d175 SETAE %SIL |
0x47d179 OR %ESI,%R8D |
0x47d17c AND %EDI,%R8D |
0x47d17f CMP %RCX,%R9 |
0x47d182 SETAE %SIL |
0x47d186 CMP %R15,%R11 |
0x47d189 SETAE %R15B |
0x47d18d OR %R15D,%ESI |
0x47d190 TEST %SIL,%R8B |
0x47d193 JE 4805d0 |
0x47d199 CMP %RCX,%RBX |
0x47d19c SETAE %R8B |
0x47d1a0 CMP %R12,%R11 |
0x47d1a3 SETAE %R12B |
0x47d1a7 OR %R8B,%R12B |
0x47d1aa JE 4805d0 |
0x47d1b0 CMPQ $0x6,-0x130(%RBP) |
0x47d1b8 JBE 480d28 |
0x47d1be MOV -0x118(%RBP),%R8 |
0x47d1c5 VPBROADCASTQ (%R11),%ZMM4 |
0x47d1cb XOR %ESI,%ESI |
0x47d1cd VPBROADCASTQ (%RDX),%ZMM5 |
0x47d1d3 SHR $0x3,%R8 |
0x47d1d7 SAL $0x6,%R8 |
0x47d1db LEA -0x40(%R8),%RDI |
0x47d1df SHR $0x6,%RDI |
0x47d1e3 INC %RDI |
0x47d1e6 AND $0x7,%EDI |
0x47d1e9 JE 47d32f |
0x47d1ef CMP $0x1,%RDI |
0x47d1f3 JE 47d2ff |
0x47d1f9 CMP $0x2,%RDI |
0x47d1fd JE 47d2d8 |
0x47d203 CMP $0x3,%RDI |
0x47d207 JE 47d2b1 |
0x47d20d CMP $0x4,%RDI |
0x47d211 JE 47d28a |
0x47d213 CMP $0x5,%RDI |
0x47d217 JE 47d263 |
0x47d219 CMP $0x6,%RDI |
0x47d21d JE 47d23c |
0x47d21f VPADDQ (%RBX),%ZMM4,%ZMM2 |
0x47d225 MOV $0x40,%ESI |
0x47d22a VMOVDQU64 %ZMM2,(%RBX) |
0x47d230 VPADDQ (%R9),%ZMM5,%ZMM7 |
0x47d236 VMOVDQU64 %ZMM7,(%R9) |
0x47d23c MOV -0xf0(%RBP),%RBX |
0x47d243 VPADDQ (%RBX,%RSI,1),%ZMM4,%ZMM8 |
0x47d24a VMOVDQU64 %ZMM8,(%RBX,%RSI,1) |
0x47d251 VPADDQ (%R9,%RSI,1),%ZMM5,%ZMM9 |
0x47d258 VMOVDQU64 %ZMM9,(%R9,%RSI,1) |
0x47d25f ADD $0x40,%RSI |
0x47d263 MOV -0xf0(%RBP),%R15 |
0x47d26a VPADDQ (%R15,%RSI,1),%ZMM4,%ZMM10 |
0x47d271 VMOVDQU64 %ZMM10,(%R15,%RSI,1) |
0x47d278 VPADDQ (%R9,%RSI,1),%ZMM5,%ZMM11 |
0x47d27f VMOVDQU64 %ZMM11,(%R9,%RSI,1) |
0x47d286 ADD $0x40,%RSI |
0x47d28a MOV -0xf0(%RBP),%RCX |
0x47d291 VPADDQ (%RCX,%RSI,1),%ZMM4,%ZMM12 |
0x47d298 VMOVDQU64 %ZMM12,(%RCX,%RSI,1) |
0x47d29f VPADDQ (%R9,%RSI,1),%ZMM5,%ZMM13 |
0x47d2a6 VMOVDQU64 %ZMM13,(%R9,%RSI,1) |
0x47d2ad ADD $0x40,%RSI |
0x47d2b1 MOV -0xf0(%RBP),%R12 |
0x47d2b8 VPADDQ (%R12,%RSI,1),%ZMM4,%ZMM14 |
0x47d2bf VMOVDQU64 %ZMM14,(%R12,%RSI,1) |
0x47d2c6 VPADDQ (%R9,%RSI,1),%ZMM5,%ZMM15 |
0x47d2cd VMOVDQU64 %ZMM15,(%R9,%RSI,1) |
0x47d2d4 ADD $0x40,%RSI |
0x47d2d8 MOV -0xf0(%RBP),%RDI |
0x47d2df VPADDQ (%RDI,%RSI,1),%ZMM4,%ZMM6 |
0x47d2e6 VMOVDQU64 %ZMM6,(%RDI,%RSI,1) |
0x47d2ed VPADDQ (%R9,%RSI,1),%ZMM5,%ZMM0 |
0x47d2f4 VMOVDQU64 %ZMM0,(%R9,%RSI,1) |
0x47d2fb ADD $0x40,%RSI |
0x47d2ff MOV -0xf0(%RBP),%RBX |
0x47d306 VPADDQ (%RBX,%RSI,1),%ZMM4,%ZMM1 |
0x47d30d VMOVDQU64 %ZMM1,(%RBX,%RSI,1) |
0x47d314 VPADDQ (%R9,%RSI,1),%ZMM5,%ZMM2 |
0x47d31b VMOVDQU64 %ZMM2,(%R9,%RSI,1) |
0x47d322 ADD $0x40,%RSI |
0x47d326 CMP %R8,%RSI |
0x47d329 JE 47d43b |
(758) 0x47d32f VPADDQ (%RBX,%RSI,1),%ZMM4,%ZMM7 |
(758) 0x47d336 VMOVDQU64 %ZMM7,(%RBX,%RSI,1) |
(758) 0x47d33d VPADDQ (%R9,%RSI,1),%ZMM5,%ZMM8 |
(758) 0x47d344 VMOVDQU64 %ZMM8,(%R9,%RSI,1) |
(758) 0x47d34b VPADDQ 0x40(%RBX,%RSI,1),%ZMM4,%ZMM9 |
(758) 0x47d353 VMOVDQU64 %ZMM9,0x40(%RBX,%RSI,1) |
(758) 0x47d35b VPADDQ 0x40(%R9,%RSI,1),%ZMM5,%ZMM10 |
(758) 0x47d363 VMOVDQU64 %ZMM10,0x40(%R9,%RSI,1) |
(758) 0x47d36b VPADDQ 0x80(%RBX,%RSI,1),%ZMM4,%ZMM11 |
(758) 0x47d373 VMOVDQU64 %ZMM11,0x80(%RBX,%RSI,1) |
(758) 0x47d37b VPADDQ 0x80(%R9,%RSI,1),%ZMM5,%ZMM12 |
(758) 0x47d383 VMOVDQU64 %ZMM12,0x80(%R9,%RSI,1) |
(758) 0x47d38b VPADDQ 0xc0(%RBX,%RSI,1),%ZMM4,%ZMM13 |
(758) 0x47d393 VMOVDQU64 %ZMM13,0xc0(%RBX,%RSI,1) |
(758) 0x47d39b VPADDQ 0xc0(%R9,%RSI,1),%ZMM5,%ZMM14 |
(758) 0x47d3a3 VMOVDQU64 %ZMM14,0xc0(%R9,%RSI,1) |
(758) 0x47d3ab VPADDQ 0x100(%RBX,%RSI,1),%ZMM4,%ZMM15 |
(758) 0x47d3b3 VMOVDQU64 %ZMM15,0x100(%RBX,%RSI,1) |
(758) 0x47d3bb VPADDQ 0x100(%R9,%RSI,1),%ZMM5,%ZMM6 |
(758) 0x47d3c3 VMOVDQU64 %ZMM6,0x100(%R9,%RSI,1) |
(758) 0x47d3cb VPADDQ 0x140(%RBX,%RSI,1),%ZMM4,%ZMM0 |
(758) 0x47d3d3 VMOVDQU64 %ZMM0,0x140(%RBX,%RSI,1) |
(758) 0x47d3db VPADDQ 0x140(%R9,%RSI,1),%ZMM5,%ZMM1 |
(758) 0x47d3e3 VMOVDQU64 %ZMM1,0x140(%R9,%RSI,1) |
(758) 0x47d3eb VPADDQ 0x180(%RBX,%RSI,1),%ZMM4,%ZMM2 |
(758) 0x47d3f3 VMOVDQU64 %ZMM2,0x180(%RBX,%RSI,1) |
(758) 0x47d3fb VPADDQ 0x180(%R9,%RSI,1),%ZMM5,%ZMM7 |
(758) 0x47d403 VMOVDQU64 %ZMM7,0x180(%R9,%RSI,1) |
(758) 0x47d40b VPADDQ 0x1c0(%RBX,%RSI,1),%ZMM4,%ZMM8 |
(758) 0x47d413 VMOVDQU64 %ZMM8,0x1c0(%RBX,%RSI,1) |
(758) 0x47d41b VPADDQ 0x1c0(%R9,%RSI,1),%ZMM5,%ZMM9 |
(758) 0x47d423 VMOVDQU64 %ZMM9,0x1c0(%R9,%RSI,1) |
(758) 0x47d42b ADD $0x200,%RSI |
(758) 0x47d432 CMP %R8,%RSI |
(758) 0x47d435 JNE 47d32f |
0x47d43b MOV -0x118(%RBP),%R8 |
0x47d442 MOV %R8,%R9 |
0x47d445 AND $-0x8,%R9 |
0x47d449 ADD %R9,%RAX |
0x47d44c TEST $0x7,%R8B |
0x47d450 JE 4809fd |
0x47d456 SUB %R9,%R8 |
0x47d459 LEA -0x1(%R8),%RSI |
0x47d45d MOV %R8,-0x118(%RBP) |
0x47d464 CMP $0x2,%RSI |
0x47d468 JBE 47d4c6 |
0x47d46a MOV -0x128(%RBP),%R15 |
0x47d471 MOV -0x58(%RBP),%RCX |
0x47d475 VPBROADCASTQ (%R11),%YMM4 |
0x47d47a MOV (%RDX),%RBX |
0x47d47d ADD %R15,%R9 |
0x47d480 MOV -0x38(%RBP),%RDI |
0x47d484 SAL $0x3,%R9 |
0x47d488 VPBROADCASTQ %RBX,%YMM10 |
0x47d48e LEA (%RCX,%R9,1),%R12 |
0x47d492 ADD %RDI,%R9 |
0x47d495 VPADDQ (%R12),%YMM4,%YMM5 |
0x47d49b VMOVDQU %YMM5,(%R12) |
0x47d4a1 VPADDQ (%R9),%YMM10,%YMM11 |
0x47d4a6 VMOVDQU %YMM11,(%R9) |
0x47d4ab MOV -0x118(%RBP),%R9 |
0x47d4b2 MOV %R9,%R8 |
0x47d4b5 AND $-0x4,%R8 |
0x47d4b9 ADD %R8,%RAX |
0x47d4bc AND $0x3,%R9D |
0x47d4c0 JE 4809fd |
0x47d4c6 MOV (%R11),%R15 |
0x47d4c9 MOV -0x58(%RBP),%R12 |
0x47d4cd LEA (,%RAX,8),%RSI |
0x47d4d5 MOV -0x38(%RBP),%RCX |
0x47d4d9 MOV -0x40(%RBP),%RBX |
0x47d4dd ADD %R15,(%R12,%RSI,1) |
0x47d4e1 MOV (%RDX),%RDI |
0x47d4e4 ADD %RDI,(%RCX,%RSI,1) |
0x47d4e8 CMP %RAX,%RBX |
0x47d4eb JLE 4809fd |
0x47d4f1 MOV (%R11),%R8 |
0x47d4f4 LEA 0x8(%RSI),%R9 |
0x47d4f8 ADD $0x2,%RAX |
0x47d4fc ADD %R8,(%R12,%R9,1) |
0x47d500 MOV (%RDX),%R15 |
0x47d503 ADD %R15,(%RCX,%R9,1) |
0x47d507 CMP %RAX,%RBX |
0x47d50a JL 4809fd |
0x47d510 MOV (%R11),%RAX |
0x47d513 ADD $0x10,%RSI |
0x47d517 ADD %RAX,(%R12,%RSI,1) |
0x47d51b MOV (%RDX),%RDX |
0x47d51e ADD %RDX,(%RCX,%RSI,1) |
0x47d522 VZEROUPPER |
0x47d525 MOV -0x108(%RBP),%RAX |
0x47d52c MOV -0x48(%RBP),%R11 |
0x47d530 MOV -0x40(%RBP),%RDI |
0x47d534 MOV %RAX,%RDX |
0x47d537 MOV (%R11,%RAX,8),%R12 |
0x47d53b NOT %RDX |
0x47d53e ADD %RDI,%RDX |
0x47d541 AND $0x7,%EDX |
0x47d544 TEST %R12,%R12 |
0x47d547 JS 47d564 |
0x47d549 MOV -0xb0(%RBP),%RBX |
0x47d550 MOV -0x48(%RBP),%R9 |
0x47d554 MOV -0x108(%RBP),%R8 |
0x47d55b ADD -0x8(%RBX,%R10,1),%R12 |
0x47d560 MOV %R12,(%R9,%R8,8) |
0x47d564 MOV -0x108(%RBP),%R15 |
0x47d56b INC %R15 |
0x47d56e CMP %R15,-0x40(%RBP) |
0x47d572 JLE 47d760 |
0x47d578 TEST %RDX,%RDX |
0x47d57b JE 47d69b |
0x47d581 CMP $0x1,%RDX |
0x47d585 JE 47d671 |
0x47d58b CMP $0x2,%RDX |
0x47d58f JE 47d651 |
0x47d595 CMP $0x3,%RDX |
0x47d599 JE 47d631 |
0x47d59f CMP $0x4,%RDX |
0x47d5a3 JE 47d611 |
0x47d5a5 CMP $0x5,%RDX |
0x47d5a9 JE 47d5f1 |
0x47d5ab CMP $0x6,%RDX |
0x47d5af JE 47d5d1 |
0x47d5b1 MOV -0x48(%RBP),%RSI |
0x47d5b5 MOV (%RSI,%R15,8),%RAX |
0x47d5b9 TEST %RAX,%RAX |
0x47d5bc JS 47d5ce |
0x47d5be MOV -0xb0(%RBP),%RCX |
0x47d5c5 ADD -0x8(%RCX,%R10,1),%RAX |
0x47d5ca MOV %RAX,(%RSI,%R15,8) |
0x47d5ce INC %R15 |
0x47d5d1 MOV -0x48(%RBP),%RDI |
0x47d5d5 MOV (%RDI,%R15,8),%RDX |
0x47d5d9 TEST %RDX,%RDX |
0x47d5dc JS 47d5ee |
0x47d5de MOV -0xb0(%RBP),%R11 |
0x47d5e5 ADD -0x8(%R11,%R10,1),%RDX |
0x47d5ea MOV %RDX,(%RDI,%R15,8) |
0x47d5ee INC %R15 |
0x47d5f1 MOV -0x48(%RBP),%R12 |
0x47d5f5 MOV (%R12,%R15,8),%RBX |
0x47d5f9 TEST %RBX,%RBX |
0x47d5fc JS 47d60e |
0x47d5fe MOV -0xb0(%RBP),%R9 |
0x47d605 ADD -0x8(%R9,%R10,1),%RBX |
0x47d60a MOV %RBX,(%R12,%R15,8) |
0x47d60e INC %R15 |
0x47d611 MOV -0x48(%RBP),%R8 |
0x47d615 MOV (%R8,%R15,8),%RSI |
0x47d619 TEST %RSI,%RSI |
0x47d61c JS 47d62e |
0x47d61e MOV -0xb0(%RBP),%RAX |
0x47d625 ADD -0x8(%RAX,%R10,1),%RSI |
0x47d62a MOV %RSI,(%R8,%R15,8) |
0x47d62e INC %R15 |
0x47d631 MOV -0x48(%RBP),%RDI |
0x47d635 MOV (%RDI,%R15,8),%RDX |
0x47d639 TEST %RDX,%RDX |
0x47d63c JS 47d64e |
0x47d63e MOV -0xb0(%RBP),%RCX |
0x47d645 ADD -0x8(%RCX,%R10,1),%RDX |
0x47d64a MOV %RDX,(%RDI,%R15,8) |
0x47d64e INC %R15 |
0x47d651 MOV -0x48(%RBP),%R11 |
0x47d655 MOV (%R11,%R15,8),%R12 |
0x47d659 TEST %R12,%R12 |
0x47d65c JS 47d66e |
0x47d65e MOV -0xb0(%RBP),%RBX |
0x47d665 ADD -0x8(%RBX,%R10,1),%R12 |
0x47d66a MOV %R12,(%R11,%R15,8) |
0x47d66e INC %R15 |
0x47d671 MOV -0x48(%RBP),%R9 |
0x47d675 MOV (%R9,%R15,8),%R8 |
0x47d679 TEST %R8,%R8 |
0x47d67c JS 47d68e |
0x47d67e MOV -0xb0(%RBP),%RSI |
0x47d685 ADD -0x8(%RSI,%R10,1),%R8 |
0x47d68a MOV %R8,(%R9,%R15,8) |
0x47d68e INC %R15 |
0x47d691 CMP %R15,-0x40(%RBP) |
0x47d695 JLE 47d760 |
0x47d69b MOV -0xb0(%RBP),%RAX |
0x47d6a2 MOV -0x48(%RBP),%RDX |
(756) 0x47d6a6 MOV (%RDX,%R15,8),%RDI |
(756) 0x47d6aa TEST %RDI,%RDI |
(756) 0x47d6ad JS 47d6b8 |
(756) 0x47d6af ADD -0x8(%RAX,%R10,1),%RDI |
(756) 0x47d6b4 MOV %RDI,(%RDX,%R15,8) |
(756) 0x47d6b8 INC %R15 |
(756) 0x47d6bb MOV (%RDX,%R15,8),%RCX |
(756) 0x47d6bf TEST %RCX,%RCX |
(756) 0x47d6c2 JS 47d6cd |
(756) 0x47d6c4 ADD -0x8(%RAX,%R10,1),%RCX |
(756) 0x47d6c9 MOV %RCX,(%RDX,%R15,8) |
(756) 0x47d6cd LEA 0x1(%R15),%R11 |
(756) 0x47d6d1 MOV (%RDX,%R11,8),%R12 |
(756) 0x47d6d5 TEST %R12,%R12 |
(756) 0x47d6d8 JS 47d6e3 |
(756) 0x47d6da ADD -0x8(%RAX,%R10,1),%R12 |
(756) 0x47d6df MOV %R12,(%RDX,%R11,8) |
(756) 0x47d6e3 LEA 0x2(%R15),%RBX |
(756) 0x47d6e7 MOV (%RDX,%RBX,8),%R9 |
(756) 0x47d6eb TEST %R9,%R9 |
(756) 0x47d6ee JS 47d6f9 |
(756) 0x47d6f0 ADD -0x8(%RAX,%R10,1),%R9 |
(756) 0x47d6f5 MOV %R9,(%RDX,%RBX,8) |
(756) 0x47d6f9 LEA 0x3(%R15),%R8 |
(756) 0x47d6fd MOV (%RDX,%R8,8),%RSI |
(756) 0x47d701 TEST %RSI,%RSI |
(756) 0x47d704 JS 47d70f |
(756) 0x47d706 ADD -0x8(%RAX,%R10,1),%RSI |
(756) 0x47d70b MOV %RSI,(%RDX,%R8,8) |
(756) 0x47d70f LEA 0x4(%R15),%RDI |
(756) 0x47d713 MOV (%RDX,%RDI,8),%RCX |
(756) 0x47d717 TEST %RCX,%RCX |
(756) 0x47d71a JS 47d725 |
(756) 0x47d71c ADD -0x8(%RAX,%R10,1),%RCX |
(756) 0x47d721 MOV %RCX,(%RDX,%RDI,8) |
(756) 0x47d725 LEA 0x5(%R15),%R11 |
(756) 0x47d729 MOV (%RDX,%R11,8),%R12 |
(756) 0x47d72d TEST %R12,%R12 |
(756) 0x47d730 JS 47d73b |
(756) 0x47d732 ADD -0x8(%RAX,%R10,1),%R12 |
(756) 0x47d737 MOV %R12,(%RDX,%R11,8) |
(756) 0x47d73b LEA 0x6(%R15),%RBX |
(756) 0x47d73f MOV (%RDX,%RBX,8),%R9 |
(756) 0x47d743 TEST %R9,%R9 |
(756) 0x47d746 JS 47d751 |
(756) 0x47d748 ADD -0x8(%RAX,%R10,1),%R9 |
(756) 0x47d74d MOV %R9,(%RDX,%RBX,8) |
(756) 0x47d751 ADD $0x7,%R15 |
(756) 0x47d755 CMP %R15,-0x40(%RBP) |
(756) 0x47d759 JG 47d6a6 |
0x47d75f NOP |
0x47d760 VMOVSD %XMM3,-0xb0(%RBP) |
0x47d768 CALL 411290 <GOMP_barrier@plt> |
0x47d76d VMOVSD -0xb0(%RBP),%XMM3 |
0x47d775 CMPQ $0,-0x100(%RBP) |
0x47d77d JLE 480964 |
0x47d783 MOV -0x100(%RBP),%R8 |
0x47d78a MOV $0xff,%ESI |
0x47d78f MOV %R13,%RDI |
0x47d792 VMOVSD %XMM3,-0xb0(%RBP) |
0x47d79a LEA (,%R8,8),%RDX |
0x47d7a2 CALL 4110a0 <memset@plt> |
0x47d7a7 MOV -0x70(%RBP),%RCX |
0x47d7ab VMOVSD -0xb0(%RBP),%XMM3 |
0x47d7b3 MOV 0x130(%RCX),%R10 |
0x47d7ba CMPQ $0,(%R10) |
0x47d7be JLE 47f320 |
0x47d7c4 MOV -0x60(%RBP),%R9 |
0x47d7c8 XOR %R15D,%R15D |
0x47d7cb NOPL (%RAX,%RAX,1) |
(735) 0x47d7d0 MOVQ $-0x1,(%R9,%R15,8) |
(735) 0x47d7d8 INC %R15 |
(735) 0x47d7db CMP %R15,(%R10) |
(735) 0x47d7de JG 47d7d0 |
0x47d7e0 VMOVSD %XMM3,-0xb0(%RBP) |
0x47d7e8 CALL 411290 <GOMP_barrier@plt> |
0x47d7ed MOV -0x108(%RBP),%RBX |
0x47d7f4 VMOVSD -0xb0(%RBP),%XMM3 |
0x47d7fc CMP %RBX,-0x40(%RBP) |
0x47d800 JLE 47e176 |
0x47d806 MOV -0x70(%RBP),%R11 |
0x47d80a MOV $-0x2,%RDX |
0x47d811 MOV -0x48(%RBP),%R12 |
0x47d815 MOV %R14,%R10 |
0x47d818 KXNORB %K2,%K2,%K2 |
0x47d81c MOV %RDX,-0x48(%RBP) |
0x47d820 VMOVSD -0x1d0(%RBP),%XMM15 |
0x47d828 VXORPD %XMM6,%XMM6,%XMM6 |
0x47d82c VXORPD %XMM5,%XMM5,%XMM5 |
0x47d830 MOV 0xc0(%R11),%RSI |
0x47d837 MOV 0xb0(%R11),%RAX |
0x47d83e MOV %R13,%R14 |
0x47d841 MOV 0x38(%R11),%RDI |
0x47d845 MOV -0x58(%RBP),%R9 |
0x47d849 MOV %RSI,-0xf0(%RBP) |
0x47d850 MOV -0x108(%RBP),%R8 |
0x47d857 MOV %RAX,-0xb0(%RBP) |
0x47d85e MOV %RDI,-0x118(%RBP) |
0x47d865 JMP 47d89d |
0x47d867 NOPW (%RAX,%RAX,1) |
(736) 0x47d870 MOV (%R12,%R8,8),%R11 |
(736) 0x47d874 MOV -0xf0(%RBP),%RBX |
(736) 0x47d87b MOV -0xb0(%RBP),%RCX |
(736) 0x47d882 MOV %R11,(%RBX,%R13,8) |
(736) 0x47d886 VMOVSD %XMM15,(%RCX,%R13,8) |
(736) 0x47d88c INC %R8 |
(736) 0x47d88f DECQ -0x48(%RBP) |
(736) 0x47d893 CMP %R8,-0x40(%RBP) |
(736) 0x47d897 JE 47e170 |
(736) 0x47d89d MOV -0x38(%RBP),%RCX |
(736) 0x47d8a1 MOV (%R10,%R8,8),%RBX |
(736) 0x47d8a5 MOV (%R9,%R8,8),%R13 |
(736) 0x47d8a9 MOV (%RCX,%R8,8),%R15 |
(736) 0x47d8ad TEST %RBX,%RBX |
(736) 0x47d8b0 JNS 47d870 |
(736) 0x47d8b2 CMP $-0x3,%RBX |
(736) 0x47d8b6 JE 47d88c |
(736) 0x47d8b8 MOV -0x50(%RBP),%R11 |
(736) 0x47d8bc DECQ -0x48(%RBP) |
(736) 0x47d8c0 MOV %R15,-0x128(%RBP) |
(736) 0x47d8c7 MOV (%R11,%R8,8),%RDI |
(736) 0x47d8cb MOV 0x8(%R11,%R8,8),%RSI |
(736) 0x47d8d0 MOV %R13,-0x108(%RBP) |
(736) 0x47d8d7 CMP %RSI,%RDI |
(736) 0x47d8da JGE 47daf4 |
(736) 0x47d8e0 MOV %R9,-0x130(%RBP) |
(736) 0x47d8e7 MOV -0x198(%RBP),%RBX |
(736) 0x47d8ee MOV %R15,%RDX |
(736) 0x47d8f1 MOV %RSI,%RAX |
(736) 0x47d8f4 MOV -0x108(%RBP),%R9 |
(736) 0x47d8fb MOV %R8,%RCX |
(736) 0x47d8fe JMP 47d93f |
(749) 0x47d900 ADD %R14,%RSI |
(749) 0x47d903 CMP (%RSI),%R13 |
(749) 0x47d906 JLE 47d933 |
(749) 0x47d908 MOV %R9,(%RSI) |
(749) 0x47d90b MOV -0xb0(%RBP),%R15 |
(749) 0x47d912 MOV -0xf0(%RBP),%RSI |
(749) 0x47d919 MOV (%R12,%R8,8),%RAX |
(749) 0x47d91d MOV %RAX,(%RSI,%R9,8) |
(749) 0x47d921 VMOVSD %XMM3,(%R15,%R9,8) |
(749) 0x47d927 INC %R9 |
(749) 0x47d92a MOV -0x50(%RBP),%R11 |
(749) 0x47d92e MOV 0x8(%R11,%RCX,8),%RAX |
(749) 0x47d933 INC %RDI |
(749) 0x47d936 CMP %RAX,%RDI |
(749) 0x47d939 JGE 47dae0 |
(749) 0x47d93f MOV (%RBX,%RDI,8),%R8 |
(749) 0x47d943 MOV (%R10,%R8,8),%R15 |
(749) 0x47d947 LEA (,%R8,8),%RSI |
(749) 0x47d94f TEST %R15,%R15 |
(749) 0x47d952 JNS 47d900 |
(749) 0x47d954 CMP $-0x3,%R15 |
(749) 0x47d958 JE 47d933 |
(749) 0x47d95a MOV -0x48(%RBP),%RAX |
(749) 0x47d95e MOV -0x50(%RBP),%R15 |
(749) 0x47d962 ADD $0x8,%RSI |
(749) 0x47d966 MOV %RAX,(%R14,%R8,8) |
(749) 0x47d96a MOV (%R15,%R8,8),%RAX |
(749) 0x47d96e ADD %RSI,%R15 |
(749) 0x47d971 MOV (%R15),%R11 |
(749) 0x47d974 CMP %R11,%RAX |
(749) 0x47d977 JGE 47d9db |
(749) 0x47d979 MOV %RDI,-0x58(%RBP) |
(749) 0x47d97d MOV %RCX,-0x108(%RBP) |
(749) 0x47d984 NOPL (%RAX) |
(752) 0x47d988 MOV (%RBX,%RAX,8),%RCX |
(752) 0x47d98c CMPQ $0,(%R10,%RCX,8) |
(752) 0x47d991 LEA (,%RCX,8),%RDI |
(752) 0x47d999 JS 47d9c8 |
(752) 0x47d99b ADD %R14,%RDI |
(752) 0x47d99e CMP (%RDI),%R13 |
(752) 0x47d9a1 JLE 47d9c8 |
(752) 0x47d9a3 MOV %R9,(%RDI) |
(752) 0x47d9a6 MOV -0xb0(%RBP),%RDI |
(752) 0x47d9ad MOV (%R12,%RCX,8),%R11 |
(752) 0x47d9b1 MOV -0xf0(%RBP),%RCX |
(752) 0x47d9b8 MOV %R11,(%RCX,%R9,8) |
(752) 0x47d9bc VMOVSD %XMM3,(%RDI,%R9,8) |
(752) 0x47d9c2 INC %R9 |
(752) 0x47d9c5 MOV (%R15),%R11 |
(752) 0x47d9c8 INC %RAX |
(752) 0x47d9cb CMP %R11,%RAX |
(752) 0x47d9ce JL 47d988 |
(749) 0x47d9d0 MOV -0x58(%RBP),%RDI |
(749) 0x47d9d4 MOV -0x108(%RBP),%RCX |
(749) 0x47d9db MOV -0x118(%RBP),%R15 |
(749) 0x47d9e2 CMPQ $0x1,(%R15) |
(749) 0x47d9e6 JLE 47d92a |
(749) 0x47d9ec MOV -0x68(%RBP),%R11 |
(749) 0x47d9f0 MOV (%R11,%R8,8),%RAX |
(749) 0x47d9f4 ADD %R11,%RSI |
(749) 0x47d9f7 CMP (%RSI),%RAX |
(749) 0x47d9fa JGE 47d92a |
(749) 0x47da00 MOV -0x70(%RBP),%R11 |
(749) 0x47da04 CMPQ $0,-0x178(%RBP) |
(749) 0x47da0c MOV %R14,-0x190(%RBP) |
(749) 0x47da13 MOV 0xf0(%R11),%R8 |
(749) 0x47da1a MOV (%R8),%R15 |
(749) 0x47da1d MOV 0xd8(%R11),%R8 |
(749) 0x47da24 MOV 0xc8(%R11),%R11 |
(749) 0x47da2b MOV %R8,-0x58(%RBP) |
(749) 0x47da2f MOV %R11,-0x108(%RBP) |
(749) 0x47da36 JE 4803a8 |
(749) 0x47da3c MOV %RDI,-0x1c8(%RBP) |
(749) 0x47da43 MOV -0xf8(%RBP),%R14 |
(749) 0x47da4a MOV %R12,-0x1a0(%RBP) |
(749) 0x47da51 MOV -0x128(%RBP),%R12 |
(749) 0x47da58 MOV %RCX,-0x1d0(%RBP) |
(749) 0x47da5f MOV -0x178(%RBP),%RCX |
(749) 0x47da66 NOPW %CS:(%RAX,%RAX,1) |
(751) 0x47da70 MOV (%R14,%RAX,8),%RDI |
(751) 0x47da74 MOV (%RCX,%RDI,8),%R8 |
(751) 0x47da78 CMPQ $0,(%R15,%R8,8) |
(751) 0x47da7d LEA (,%R8,8),%R11 |
(751) 0x47da85 JS 47daae |
(751) 0x47da87 MOV -0x60(%RBP),%RDI |
(751) 0x47da8b ADD %RDI,%R11 |
(751) 0x47da8e CMP (%R11),%RDX |
(751) 0x47da91 JLE 47daae |
(751) 0x47da93 MOV %R12,(%R11) |
(751) 0x47da96 MOV -0x58(%RBP),%R11 |
(751) 0x47da9a MOV %R8,(%R11,%R12,8) |
(751) 0x47da9e MOV -0x108(%RBP),%R8 |
(751) 0x47daa5 VMOVSD %XMM3,(%R8,%R12,8) |
(751) 0x47daab INC %R12 |
(751) 0x47daae INC %RAX |
(751) 0x47dab1 CMP %RAX,(%RSI) |
(751) 0x47dab4 JG 47da70 |
(749) 0x47dab6 MOV -0x190(%RBP),%R14 |
(749) 0x47dabd MOV -0x1c8(%RBP),%RDI |
(749) 0x47dac4 MOV %R12,-0x128(%RBP) |
(749) 0x47dacb MOV -0x1d0(%RBP),%RCX |
(749) 0x47dad2 MOV -0x1a0(%RBP),%R12 |
(749) 0x47dad9 JMP 47d92a |
0x47dade XCHG %AX,%AX |
(736) 0x47dae0 MOV %R9,-0x108(%RBP) |
(736) 0x47dae7 MOV -0x130(%RBP),%R9 |
(736) 0x47daee MOV %RCX,%R8 |
(736) 0x47daf1 MOV %RDX,%R15 |
(736) 0x47daf4 MOV -0x118(%RBP),%RCX |
(736) 0x47dafb MOV (%RCX),%RDI |
(736) 0x47dafe MOV %RDI,-0x58(%RBP) |
(736) 0x47db02 CMP $0x1,%RDI |
(736) 0x47db06 JG 47ef30 |
(736) 0x47db0c MOV -0x120(%RBP),%RCX |
(736) 0x47db13 MOV -0x188(%RBP),%RBX |
(736) 0x47db1a VPBROADCASTQ %R8,%YMM8 |
(736) 0x47db20 VPBROADCASTQ %R13,%YMM7 |
(736) 0x47db26 MOV (%RCX,%R8,8),%RSI |
(736) 0x47db2a MOV 0x8(%RCX,%R8,8),%RDI |
(736) 0x47db2f VMOVSD (%RBX,%RSI,8),%XMM4 |
(736) 0x47db34 LEA 0x1(%RSI),%RSI |
(736) 0x47db38 CMP %RSI,%RDI |
(736) 0x47db3b JLE 47dc03 |
(736) 0x47db41 MOV %R12,-0x1c8(%RBP) |
(736) 0x47db48 MOV -0x200(%RBP),%RDX |
(736) 0x47db4f MOV %R10,%R12 |
(736) 0x47db52 MOV %R8,%R11 |
(736) 0x47db55 MOV %R15,-0x130(%RBP) |
(736) 0x47db5c MOV %RDI,%R15 |
(736) 0x47db5f MOV %R9,-0x1d0(%RBP) |
(736) 0x47db66 JMP 47db92 |
0x47db68 NOPL (%RAX,%RAX,1) |
(742) 0x47db70 MOV -0xb0(%RBP),%RAX |
(742) 0x47db77 LEA (%RAX,%R8,8),%R9 |
(742) 0x47db7b VMOVSD (%R9),%XMM0 |
(742) 0x47db80 VADDSD (%RBX,%RSI,8),%XMM0,%XMM9 |
(742) 0x47db85 VMOVSD %XMM9,(%R9) |
(742) 0x47db8a INC %RSI |
(742) 0x47db8d CMP %RSI,%R15 |
(742) 0x47db90 JE 47dbe8 |
(742) 0x47db92 MOV (%RDX,%RSI,8),%RAX |
(742) 0x47db96 MOV (%R14,%RAX,8),%R8 |
(742) 0x47db9a LEA (,%RAX,8),%RDI |
(742) 0x47dba2 CMP %R8,%R13 |
(742) 0x47dba5 JLE 47db70 |
(742) 0x47dba7 MOV -0x48(%RBP),%R10 |
(742) 0x47dbab CMP %R10,%R8 |
(742) 0x47dbae JE 47e1b8 |
(742) 0x47dbb4 CMPQ $-0x3,(%R12,%RAX,8) |
(742) 0x47dbb9 JE 47db8a |
(742) 0x47dbbb CMPQ $0x1,-0x110(%RBP) |
(742) 0x47dbc3 JE 47dbd6 |
(742) 0x47dbc5 MOV -0x180(%RBP),%R9 |
(742) 0x47dbcc MOV (%R9,%RAX,8),%RAX |
(742) 0x47dbd0 CMP %RAX,(%R9,%R11,8) |
(742) 0x47dbd4 JNE 47db8a |
(742) 0x47dbd6 VADDSD (%RBX,%RSI,8),%XMM4,%XMM4 |
(742) 0x47dbdb INC %RSI |
(742) 0x47dbde CMP %RSI,%R15 |
(742) 0x47dbe1 JNE 47db92 |
(736) 0x47dbe3 NOPL (%RAX,%RAX,1) |
(736) 0x47dbe8 MOV %R12,%R10 |
(736) 0x47dbeb MOV -0x1d0(%RBP),%R9 |
(736) 0x47dbf2 MOV -0x1c8(%RBP),%R12 |
(736) 0x47dbf9 MOV %R11,%R8 |
(736) 0x47dbfc MOV -0x130(%RBP),%R15 |
(736) 0x47dc03 CMPQ $0x1,-0x58(%RBP) |
(736) 0x47dc08 JG 47f168 |
(736) 0x47dc0e VCOMISD %XMM5,%XMM4 |
(736) 0x47dc12 JE 47d88c |
(736) 0x47dc18 CMP %R13,-0x108(%RBP) |
(736) 0x47dc1f JLE 47deb5 |
(736) 0x47dc25 MOV -0x108(%RBP),%RSI |
(736) 0x47dc2c VMOVSD 0x13c8e4(%RIP),%XMM9 |
(736) 0x47dc34 MOV %R13,%R11 |
(736) 0x47dc37 VDIVSD %XMM4,%XMM9,%XMM8 |
(736) 0x47dc3b SUB %R13,%RSI |
(736) 0x47dc3e LEA -0x1(%RSI),%RDX |
(736) 0x47dc42 CMP $0x6,%RDX |
(736) 0x47dc46 JBE 480c47 |
(736) 0x47dc4c MOV -0xb0(%RBP),%RAX |
(736) 0x47dc53 MOV %RSI,%RCX |
(736) 0x47dc56 VBROADCASTSD 0x13c1e0(%RIP),%ZMM12 |
(736) 0x47dc60 VBROADCASTSD %XMM8,%ZMM1 |
(736) 0x47dc66 SHR $0x3,%RCX |
(736) 0x47dc6a SAL $0x6,%RCX |
(736) 0x47dc6e LEA (%RAX,%R13,8),%RDX |
(736) 0x47dc72 LEA (%RCX,%RDX,1),%RDI |
(736) 0x47dc76 SUB $0x40,%RCX |
(736) 0x47dc7a SHR $0x6,%RCX |
(736) 0x47dc7e INC %RCX |
(736) 0x47dc81 AND $0x7,%ECX |
(736) 0x47dc84 JE 47dd49 |
(736) 0x47dc8a CMP $0x1,%RCX |
(736) 0x47dc8e JE 47dd29 |
(736) 0x47dc94 CMP $0x2,%RCX |
(736) 0x47dc98 JE 47dd12 |
(736) 0x47dc9a CMP $0x3,%RCX |
(736) 0x47dc9e JE 47dcfb |
(736) 0x47dca0 CMP $0x4,%RCX |
(736) 0x47dca4 JE 47dce4 |
(736) 0x47dca6 CMP $0x5,%RCX |
(736) 0x47dcaa JE 47dccd |
(736) 0x47dcac CMP $0x6,%RCX |
(736) 0x47dcb0 JNE 480b44 |
(736) 0x47dcb6 VMULPD (%RDX),%ZMM1,%ZMM10 |
(736) 0x47dcbc ADD $0x40,%RDX |
(736) 0x47dcc0 VXORPD %ZMM12,%ZMM10,%ZMM11 |
(736) 0x47dcc6 VMOVUPD %ZMM11,-0x40(%RDX) |
(736) 0x47dccd VMULPD (%RDX),%ZMM1,%ZMM13 |
(736) 0x47dcd3 ADD $0x40,%RDX |
(736) 0x47dcd7 VXORPD %ZMM12,%ZMM13,%ZMM2 |
(736) 0x47dcdd VMOVUPD %ZMM2,-0x40(%RDX) |
(736) 0x47dce4 VMULPD (%RDX),%ZMM1,%ZMM0 |
(736) 0x47dcea ADD $0x40,%RDX |
(736) 0x47dcee VXORPD %ZMM12,%ZMM0,%ZMM9 |
(736) 0x47dcf4 VMOVUPD %ZMM9,-0x40(%RDX) |
(736) 0x47dcfb VMULPD (%RDX),%ZMM1,%ZMM7 |
(736) 0x47dd01 ADD $0x40,%RDX |
(736) 0x47dd05 VXORPD %ZMM12,%ZMM7,%ZMM14 |
(736) 0x47dd0b VMOVUPD %ZMM14,-0x40(%RDX) |
(736) 0x47dd12 VMULPD (%RDX),%ZMM1,%ZMM10 |
(736) 0x47dd18 ADD $0x40,%RDX |
(736) 0x47dd1c VXORPD %ZMM12,%ZMM10,%ZMM11 |
(736) 0x47dd22 VMOVUPD %ZMM11,-0x40(%RDX) |
(736) 0x47dd29 VMULPD (%RDX),%ZMM1,%ZMM13 |
(736) 0x47dd2f ADD $0x40,%RDX |
(736) 0x47dd33 VXORPD %ZMM12,%ZMM13,%ZMM2 |
(736) 0x47dd39 VMOVUPD %ZMM2,-0x40(%RDX) |
(736) 0x47dd40 CMP %RDX,%RDI |
(736) 0x47dd43 JE 47ddf8 |
(738) 0x47dd49 VMULPD (%RDX),%ZMM1,%ZMM0 |
(738) 0x47dd4f ADD $0x200,%RDX |
(738) 0x47dd56 VMULPD -0x1c0(%RDX),%ZMM1,%ZMM7 |
(738) 0x47dd5d VMULPD -0x180(%RDX),%ZMM1,%ZMM10 |
(738) 0x47dd64 VMULPD -0x140(%RDX),%ZMM1,%ZMM13 |
(738) 0x47dd6b VXORPD %ZMM12,%ZMM0,%ZMM9 |
(738) 0x47dd71 VMULPD -0x100(%RDX),%ZMM1,%ZMM0 |
(738) 0x47dd78 VXORPD %ZMM12,%ZMM7,%ZMM14 |
(738) 0x47dd7e VMOVUPD %ZMM9,-0x200(%RDX) |
(738) 0x47dd85 VMULPD -0xc0(%RDX),%ZMM1,%ZMM7 |
(738) 0x47dd8c VXORPD %ZMM12,%ZMM10,%ZMM11 |
(738) 0x47dd92 VMOVUPD %ZMM14,-0x1c0(%RDX) |
(738) 0x47dd99 VMULPD -0x80(%RDX),%ZMM1,%ZMM10 |
(738) 0x47dda0 VXORPD %ZMM12,%ZMM13,%ZMM2 |
(738) 0x47dda6 VMOVUPD %ZMM11,-0x180(%RDX) |
(738) 0x47ddad VMULPD -0x40(%RDX),%ZMM1,%ZMM13 |
(738) 0x47ddb4 VMOVUPD %ZMM2,-0x140(%RDX) |
(738) 0x47ddbb VXORPD %ZMM12,%ZMM0,%ZMM9 |
(738) 0x47ddc1 VXORPD %ZMM12,%ZMM7,%ZMM14 |
(738) 0x47ddc7 VMOVUPD %ZMM9,-0x100(%RDX) |
(738) 0x47ddce VXORPD %ZMM12,%ZMM10,%ZMM11 |
(738) 0x47ddd4 VMOVUPD %ZMM14,-0xc0(%RDX) |
(738) 0x47dddb VXORPD %ZMM12,%ZMM13,%ZMM2 |
(738) 0x47dde1 VMOVUPD %ZMM11,-0x80(%RDX) |
(738) 0x47dde8 VMOVUPD %ZMM2,-0x40(%RDX) |
(738) 0x47ddef CMP %RDX,%RDI |
(738) 0x47ddf2 JNE 47dd49 |
(736) 0x47ddf8 MOV %RSI,%RBX |
(736) 0x47ddfb AND $-0x8,%RBX |
(736) 0x47ddff ADD %RBX,%R13 |
(736) 0x47de02 TEST $0x7,%SIL |
(736) 0x47de06 JE 47deb5 |
(736) 0x47de0c SUB %RBX,%RSI |
(736) 0x47de0f LEA -0x1(%RSI),%RAX |
(736) 0x47de13 CMP $0x2,%RAX |
(736) 0x47de17 JBE 47de50 |
(736) 0x47de19 ADD %R11,%RBX |
(736) 0x47de1c MOV -0xb0(%RBP),%R11 |
(736) 0x47de23 VBROADCASTSD %XMM8,%YMM1 |
(736) 0x47de28 MOV %RSI,%RDX |
(736) 0x47de2b VBROADCASTSD 0x13c00c(%RIP),%YMM0 |
(736) 0x47de34 AND $-0x4,%RDX |
(736) 0x47de38 LEA (%R11,%RBX,8),%RBX |
(736) 0x47de3c ADD %RDX,%R13 |
(736) 0x47de3f AND $0x3,%ESI |
(736) 0x47de42 VMULPD (%RBX),%YMM1,%YMM12 |
(736) 0x47de46 VXORPD %YMM0,%YMM12,%YMM9 |
(736) 0x47de4a VMOVUPD %YMM9,(%RBX) |
(736) 0x47de4e JE 47deb5 |
(736) 0x47de50 MOV -0xb0(%RBP),%RDI |
(736) 0x47de57 LEA (,%R13,8),%RSI |
(736) 0x47de5f VMOVQ 0x13bfd9(%RIP),%XMM14 |
(736) 0x47de67 LEA 0x1(%R13),%RAX |
(736) 0x47de6b MOV -0x108(%RBP),%R11 |
(736) 0x47de72 LEA (%RDI,%RSI,1),%RCX |
(736) 0x47de76 VMULSD (%RCX),%XMM8,%XMM7 |
(736) 0x47de7a VXORPD %XMM14,%XMM7,%XMM10 |
(736) 0x47de7f VMOVSD %XMM10,(%RCX) |
(736) 0x47de83 CMP %RAX,%R11 |
(736) 0x47de86 JLE 47deb5 |
(736) 0x47de88 LEA 0x8(%RDI,%RSI,1),%RBX |
(736) 0x47de8d LEA 0x2(%R13),%R13 |
(736) 0x47de91 VMULSD (%RBX),%XMM8,%XMM11 |
(736) 0x47de95 VXORPD %XMM14,%XMM11,%XMM13 |
(736) 0x47de9a VMOVSD %XMM13,(%RBX) |
(736) 0x47de9e CMP %R13,%R11 |
(736) 0x47dea1 JLE 47deb5 |
(736) 0x47dea3 LEA 0x10(%RDI,%RSI,1),%RDX |
(736) 0x47dea8 VMULSD (%RDX),%XMM8,%XMM8 |
(736) 0x47deac VXORPD %XMM14,%XMM8,%XMM2 |
(736) 0x47deb1 VMOVSD %XMM2,(%RDX) |
(736) 0x47deb5 MOV -0x128(%RBP),%RDI |
(736) 0x47debc CMP %R15,%RDI |
(736) 0x47debf JLE 47d88c |
(736) 0x47dec5 SUB %R15,%RDI |
(736) 0x47dec8 MOV -0x70(%RBP),%RSI |
(736) 0x47decc VMOVSD 0x13c644(%RIP),%XMM1 |
(736) 0x47ded4 MOV %R15,%R11 |
(736) 0x47ded7 LEA -0x1(%RDI),%RAX |
(736) 0x47dedb MOV %RDI,%RCX |
(736) 0x47dede VDIVSD %XMM4,%XMM1,%XMM12 |
(736) 0x47dee2 MOV 0xc8(%RSI),%R13 |
(736) 0x47dee9 CMP $0x6,%RAX |
(736) 0x47deed JBE 480c4e |
(736) 0x47def3 MOV %RDI,%RDX |
(736) 0x47def6 LEA (%R13,%R15,8),%RSI |
(736) 0x47defb VBROADCASTSD 0x13bf3b(%RIP),%ZMM0 |
(736) 0x47df05 VBROADCASTSD %XMM12,%ZMM9 |
(736) 0x47df0b SHR $0x3,%RDX |
(736) 0x47df0f SAL $0x6,%RDX |
(736) 0x47df13 LEA (%RDX,%RSI,1),%RDI |
(736) 0x47df17 SUB $0x40,%RDX |
(736) 0x47df1b SHR $0x6,%RDX |
(736) 0x47df1f INC %RDX |
(736) 0x47df22 AND $0x7,%EDX |
(736) 0x47df25 JE 47dfea |
(736) 0x47df2b CMP $0x1,%RDX |
(736) 0x47df2f JE 47dfca |
(736) 0x47df35 CMP $0x2,%RDX |
(736) 0x47df39 JE 47dfb3 |
(736) 0x47df3b CMP $0x3,%RDX |
(736) 0x47df3f JE 47df9c |
(736) 0x47df41 CMP $0x4,%RDX |
(736) 0x47df45 JE 47df85 |
(736) 0x47df47 CMP $0x5,%RDX |
(736) 0x47df4b JE 47df6e |
(736) 0x47df4d CMP $0x6,%RDX |
(736) 0x47df51 JNE 480b60 |
(736) 0x47df57 VMULPD (%RSI),%ZMM9,%ZMM14 |
(736) 0x47df5d ADD $0x40,%RSI |
(736) 0x47df61 VXORPD %ZMM0,%ZMM14,%ZMM10 |
(736) 0x47df67 VMOVUPD %ZMM10,-0x40(%RSI) |
(736) 0x47df6e VMULPD (%RSI),%ZMM9,%ZMM11 |
(736) 0x47df74 ADD $0x40,%RSI |
(736) 0x47df78 VXORPD %ZMM0,%ZMM11,%ZMM13 |
(736) 0x47df7e VMOVUPD %ZMM13,-0x40(%RSI) |
(736) 0x47df85 VMULPD (%RSI),%ZMM9,%ZMM8 |
(736) 0x47df8b ADD $0x40,%RSI |
(736) 0x47df8f VXORPD %ZMM0,%ZMM8,%ZMM2 |
(736) 0x47df95 VMOVUPD %ZMM2,-0x40(%RSI) |
(736) 0x47df9c VMULPD (%RSI),%ZMM9,%ZMM1 |
(736) 0x47dfa2 ADD $0x40,%RSI |
(736) 0x47dfa6 VXORPD %ZMM0,%ZMM1,%ZMM4 |
(736) 0x47dfac VMOVUPD %ZMM4,-0x40(%RSI) |
(736) 0x47dfb3 VMULPD (%RSI),%ZMM9,%ZMM7 |
(736) 0x47dfb9 ADD $0x40,%RSI |
(736) 0x47dfbd VXORPD %ZMM0,%ZMM7,%ZMM14 |
(736) 0x47dfc3 VMOVUPD %ZMM14,-0x40(%RSI) |
(736) 0x47dfca VMULPD (%RSI),%ZMM9,%ZMM10 |
(736) 0x47dfd0 ADD $0x40,%RSI |
(736) 0x47dfd4 VXORPD %ZMM0,%ZMM10,%ZMM11 |
(736) 0x47dfda VMOVUPD %ZMM11,-0x40(%RSI) |
(736) 0x47dfe1 CMP %RSI,%RDI |
(736) 0x47dfe4 JE 47e099 |
(737) 0x47dfea VMULPD (%RSI),%ZMM9,%ZMM13 |
(737) 0x47dff0 ADD $0x200,%RSI |
(737) 0x47dff7 VMULPD -0x1c0(%RSI),%ZMM9,%ZMM2 |
(737) 0x47dffe VMULPD -0x180(%RSI),%ZMM9,%ZMM4 |
(737) 0x47e005 VMULPD -0x140(%RSI),%ZMM9,%ZMM14 |
(737) 0x47e00c VMULPD -0x100(%RSI),%ZMM9,%ZMM11 |
(737) 0x47e013 VXORPD %ZMM0,%ZMM13,%ZMM8 |
(737) 0x47e019 VXORPD %ZMM0,%ZMM2,%ZMM1 |
(737) 0x47e01f VMOVUPD %ZMM8,-0x200(%RSI) |
(737) 0x47e026 VMOVUPD %ZMM1,-0x1c0(%RSI) |
(737) 0x47e02d VMULPD -0xc0(%RSI),%ZMM9,%ZMM8 |
(737) 0x47e034 VXORPD %ZMM0,%ZMM4,%ZMM7 |
(737) 0x47e03a VMULPD -0x80(%RSI),%ZMM9,%ZMM1 |
(737) 0x47e041 VMOVUPD %ZMM7,-0x180(%RSI) |
(737) 0x47e048 VXORPD %ZMM0,%ZMM14,%ZMM10 |
(737) 0x47e04e VMULPD -0x40(%RSI),%ZMM9,%ZMM7 |
(737) 0x47e055 VXORPD %ZMM0,%ZMM11,%ZMM13 |
(737) 0x47e05b VMOVUPD %ZMM10,-0x140(%RSI) |
(737) 0x47e062 VMOVUPD %ZMM13,-0x100(%RSI) |
(737) 0x47e069 VXORPD %ZMM0,%ZMM8,%ZMM2 |
(737) 0x47e06f VXORPD %ZMM0,%ZMM1,%ZMM4 |
(737) 0x47e075 VMOVUPD %ZMM2,-0xc0(%RSI) |
(737) 0x47e07c VXORPD %ZMM0,%ZMM7,%ZMM14 |
(737) 0x47e082 VMOVUPD %ZMM4,-0x80(%RSI) |
(737) 0x47e089 VMOVUPD %ZMM14,-0x40(%RSI) |
(737) 0x47e090 CMP %RSI,%RDI |
(737) 0x47e093 JNE 47dfea |
(736) 0x47e099 MOV %RCX,%RBX |
(736) 0x47e09c AND $-0x8,%RBX |
(736) 0x47e0a0 ADD %RBX,%R15 |
(736) 0x47e0a3 TEST $0x7,%CL |
(736) 0x47e0a6 JE 47d88c |
(736) 0x47e0ac SUB %RBX,%RCX |
(736) 0x47e0af LEA -0x1(%RCX),%RAX |
(736) 0x47e0b3 CMP $0x2,%RAX |
(736) 0x47e0b7 JBE 47e0f1 |
(736) 0x47e0b9 ADD %R11,%RBX |
(736) 0x47e0bc VBROADCASTSD %XMM12,%YMM9 |
(736) 0x47e0c1 VBROADCASTSD 0x13bd76(%RIP),%YMM10 |
(736) 0x47e0ca LEA (%R13,%RBX,8),%R11 |
(736) 0x47e0cf MOV %RCX,%RBX |
(736) 0x47e0d2 VMULPD (%R11),%YMM9,%YMM0 |
(736) 0x47e0d7 AND $-0x4,%RBX |
(736) 0x47e0db ADD %RBX,%R15 |
(736) 0x47e0de AND $0x3,%ECX |
(736) 0x47e0e1 VXORPD %YMM10,%YMM0,%YMM11 |
(736) 0x47e0e6 VMOVUPD %YMM11,(%R11) |
(736) 0x47e0eb JE 47d88c |
(736) 0x47e0f1 LEA (,%R15,8),%RCX |
(736) 0x47e0f9 VMOVQ 0x13bd3f(%RIP),%XMM8 |
(736) 0x47e101 MOV -0x128(%RBP),%RDI |
(736) 0x47e108 LEA 0x1(%R15),%RDX |
(736) 0x47e10c LEA (%R13,%RCX,1),%RSI |
(736) 0x47e111 VMULSD (%RSI),%XMM12,%XMM13 |
(736) 0x47e115 VXORPD %XMM8,%XMM13,%XMM2 |
(736) 0x47e11a VMOVSD %XMM2,(%RSI) |
(736) 0x47e11e CMP %RDX,%RDI |
(736) 0x47e121 JLE 47d88c |
(736) 0x47e127 LEA 0x8(%R13,%RCX,1),%RAX |
(736) 0x47e12c LEA 0x2(%R15),%R15 |
(736) 0x47e130 VMULSD (%RAX),%XMM12,%XMM1 |
(736) 0x47e134 VXORPD %XMM8,%XMM1,%XMM4 |
(736) 0x47e139 VMOVSD %XMM4,(%RAX) |
(736) 0x47e13d CMP %R15,%RDI |
(736) 0x47e140 JLE 47d88c |
(736) 0x47e146 LEA 0x10(%R13,%RCX,1),%R13 |
(736) 0x47e14b INC %R8 |
(736) 0x47e14e DECQ -0x48(%RBP) |
(736) 0x47e152 VMULSD (%R13),%XMM12,%XMM12 |
(736) 0x47e158 VXORPD %XMM8,%XMM12,%XMM7 |
(736) 0x47e15d VMOVSD %XMM7,(%R13) |
(736) 0x47e163 CMP %R8,-0x40(%RBP) |
(736) 0x47e167 JNE 47d89d |
0x47e16d NOPL (%RAX) |
0x47e170 MOV %R14,%R13 |
0x47e173 VZEROUPPER |
0x47e176 CMPQ $0,-0x100(%RBP) |
0x47e17e JNE 47f350 |
0x47e184 MOV -0x70(%RBP),%R8 |
0x47e188 MOV 0x130(%R8),%R14 |
0x47e18f CMPQ $0,(%R14) |
0x47e193 JNE 47f300 |
0x47e199 ADD $0x308,%RSP |
0x47e1a0 POP %RBX |
0x47e1a1 POP %R12 |
0x47e1a3 POP %R9 |
0x47e1a5 POP %R14 |
0x47e1a7 POP %R15 |
0x47e1a9 POP %RBP |
0x47e1aa LEA -0x10(%R9),%RSP |
0x47e1ae POP %R13 |
0x47e1b0 RET |
0x47e1b1 NOPL (%RAX) |
(742) 0x47e1b8 MOV -0x120(%RBP),%RCX |
(742) 0x47e1bf MOV 0x13b592(%RIP),%R10 |
(742) 0x47e1c6 MOV (%RCX,%RAX,8),%RCX |
(742) 0x47e1ca VMOVQ %R10,%XMM9 |
(742) 0x47e1cf VCOMISD (%RBX,%RCX,8),%XMM5 |
(742) 0x47e1d4 LEA (,%RCX,8),%R8 |
(742) 0x47e1dc JA 47e1e6 |
(742) 0x47e1de VMOVSD 0x13c332(%RIP),%XMM9 |
(742) 0x47e1e6 MOV -0x120(%RBP),%R9 |
(742) 0x47e1ed LEA 0x1(%RCX),%R10 |
(742) 0x47e1f1 MOV %R10,-0x1a0(%RBP) |
(742) 0x47e1f8 MOV 0x8(%R9,%RDI,1),%R9 |
(742) 0x47e1fd MOV %R10,-0x208(%RBP) |
(742) 0x47e204 MOV %R9,-0x190(%RBP) |
(742) 0x47e20b CMP %R9,%R10 |
(742) 0x47e20e JGE 48097e |
(742) 0x47e214 SUB %RCX,%R9 |
(742) 0x47e217 LEA -0x1(%R9),%R10 |
(742) 0x47e21b LEA -0x2(%R9),%RCX |
(742) 0x47e21f MOV %R10,-0x250(%RBP) |
(742) 0x47e226 CMP $0x6,%RCX |
(742) 0x47e22a JBE 4809a1 |
(742) 0x47e230 LEA (%R8,%RBX,1),%RCX |
(742) 0x47e234 VXORPD %XMM0,%XMM0,%XMM0 |
(742) 0x47e238 SHR $0x3,%R10 |
(742) 0x47e23c VPBROADCASTQ %R11,%ZMM12 |
(742) 0x47e242 KXNORB %K3,%K3,%K3 |
(742) 0x47e246 MOV %R10,%R8 |
(742) 0x47e249 MOV %RCX,-0x268(%RBP) |
(742) 0x47e250 ADD $0x8,%RCX |
(742) 0x47e254 VPBROADCASTQ %R13,%ZMM11 |
(742) 0x47e25a SAL $0x6,%R8 |
(742) 0x47e25e MOV %RCX,-0x260(%RBP) |
(742) 0x47e265 VBROADCASTSD %XMM9,%ZMM10 |
(742) 0x47e26b VMOVAPD %ZMM0,%ZMM13 |
(742) 0x47e271 LEA (%R8,%RCX,1),%R10 |
(742) 0x47e275 SUB $0x40,%R8 |
(742) 0x47e279 MOV %R10,-0x230(%RBP) |
(742) 0x47e280 SHR $0x6,%R8 |
(742) 0x47e284 MOV %RDX,%R10 |
(742) 0x47e287 SUB %RBX,%R10 |
(742) 0x47e28a INC %R8 |
(742) 0x47e28d ADD $0x8,%R10 |
(742) 0x47e291 AND $0x3,%R8D |
(742) 0x47e295 JE 4808e0 |
(742) 0x47e29b CMP $0x1,%R8 |
(742) 0x47e29f JE 47e36c |
(742) 0x47e2a5 CMP $0x2,%R8 |
(742) 0x47e2a9 JE 47e30c |
(742) 0x47e2ab VMOVDQU64 -0x8(%RCX,%R10,1),%ZMM14 |
(742) 0x47e2b6 KMOVB %K3,%K5 |
(742) 0x47e2ba MOV -0x268(%RBP),%RCX |
(742) 0x47e2c1 VMOVAPD -0x170(%RBP),%ZMM2 |
(742) 0x47e2cb VPGATHERQQ (%R14,%ZMM14,8),%ZMM1{%K5} |
(742) 0x47e2d2 VPCMPEQQ %ZMM12,%ZMM14,%K1 |
(742) 0x47e2d9 ADD $0x48,%RCX |
(742) 0x47e2dd VPCMPNLTQ %ZMM11,%ZMM1,%K0 |
(742) 0x47e2e4 KORB %K0,%K1,%K4 |
(742) 0x47e2e8 VMOVUPD -0x40(%RCX),%ZMM2{%K4} |
(742) 0x47e2ef VMULPD %ZMM2,%ZMM10,%ZMM14 |
(742) 0x47e2f5 VMOVAPD %ZMM2,-0x170(%RBP) |
(742) 0x47e2ff VCMPPD $0x1,%ZMM0,%ZMM14,%K6{%K4} |
(742) 0x47e306 VMOVAPD %ZMM2,%ZMM0{%K6}{z} |
(742) 0x47e30c VMOVDQU64 -0x8(%RCX,%R10,1),%ZMM1 |
(742) 0x47e317 KMOVB %K3,%K7 |
(742) 0x47e31b VMOVAPD -0x170(%RBP),%ZMM14 |
(742) 0x47e325 ADD $0x40,%RCX |
(742) 0x47e329 VPGATHERQQ (%R14,%ZMM1,8),%ZMM2{%K7} |
(742) 0x47e330 VPCMPEQQ %ZMM12,%ZMM1,%K5 |
(742) 0x47e337 VPCMPNLTQ %ZMM11,%ZMM2,%K1 |
(742) 0x47e33e KORB %K1,%K5,%K4 |
(742) 0x47e342 VMOVUPD -0x40(%RCX),%ZMM14{%K4} |
(742) 0x47e349 VMULPD %ZMM14,%ZMM10,%ZMM1 |
(742) 0x47e34f VMOVAPD %ZMM14,-0x170(%RBP) |
(742) 0x47e359 VCMPPD $0x1,%ZMM13,%ZMM1,%K6{%K4} |
(742) 0x47e360 VMOVAPD %ZMM14,%ZMM2{%K6}{z} |
(742) 0x47e366 VADDPD %ZMM2,%ZMM0,%ZMM0 |
(742) 0x47e36c VMOVDQU64 -0x8(%RCX,%R10,1),%ZMM14 |
(742) 0x47e377 KMOVB %K3,%K7 |
(742) 0x47e37b VMOVAPD -0x170(%RBP),%ZMM2 |
(742) 0x47e385 ADD $0x40,%RCX |
(742) 0x47e389 MOV -0x230(%RBP),%R8 |
(742) 0x47e390 VPGATHERQQ (%R14,%ZMM14,8),%ZMM1{%K7} |
(742) 0x47e397 VPCMPEQQ %ZMM12,%ZMM14,%K5 |
(742) 0x47e39e VPCMPNLTQ %ZMM11,%ZMM1,%K0 |
(742) 0x47e3a5 KORB %K0,%K5,%K1 |
(742) 0x47e3a9 VMOVUPD -0x40(%RCX),%ZMM2{%K1} |
(742) 0x47e3b0 VMULPD %ZMM2,%ZMM10,%ZMM14 |
(742) 0x47e3b6 VMOVAPD %ZMM2,-0x170(%RBP) |
(742) 0x47e3c0 VCMPPD $0x1,%ZMM13,%ZMM14,%K4{%K1} |
(742) 0x47e3c7 VMOVAPD %ZMM2,%ZMM1{%K4}{z} |
(742) 0x47e3cd VADDPD %ZMM1,%ZMM0,%ZMM0 |
(742) 0x47e3d3 CMP %R8,%RCX |
(742) 0x47e3d6 JE 47e520 |
(746) 0x47e3dc VMOVDQU64 -0x8(%RCX,%R10,1),%ZMM14 |
(746) 0x47e3e7 KMOVB %K3,%K6 |
(746) 0x47e3eb VMOVAPD -0x170(%RBP),%ZMM1 |
(746) 0x47e3f5 ADD $0x100,%RCX |
(746) 0x47e3fc VPGATHERQQ (%R14,%ZMM14,8),%ZMM2{%K6} |
(746) 0x47e403 VPCMPEQQ %ZMM12,%ZMM14,%K7 |
(746) 0x47e40a KMOVB %K3,%K6 |
(746) 0x47e40e VPCMPNLTQ %ZMM11,%ZMM2,%K5 |
(746) 0x47e415 KORB %K5,%K7,%K1 |
(746) 0x47e419 VMOVUPD -0x100(%RCX),%ZMM1{%K1} |
(746) 0x47e420 VMULPD %ZMM10,%ZMM1,%ZMM14 |
(746) 0x47e426 VCMPPD $0x1,%ZMM13,%ZMM14,%K4{%K1} |
(746) 0x47e42d VMOVAPD %ZMM1,%ZMM2{%K4}{z} |
(746) 0x47e433 KMOVB %K3,%K4 |
(746) 0x47e437 VADDPD %ZMM2,%ZMM0,%ZMM0 |
(746) 0x47e43d VMOVDQU64 -0xc8(%RCX,%R10,1),%ZMM2 |
(746) 0x47e448 VPGATHERQQ (%R14,%ZMM2,8),%ZMM14{%K6} |
(746) 0x47e44f VPCMPEQQ %ZMM12,%ZMM2,%K7 |
(746) 0x47e456 VPCMPNLTQ %ZMM11,%ZMM14,%K0 |
(746) 0x47e45d KORB %K0,%K7,%K5 |
(746) 0x47e461 VMOVUPD -0xc0(%RCX),%ZMM1{%K5} |
(746) 0x47e468 VMULPD %ZMM10,%ZMM1,%ZMM2 |
(746) 0x47e46e VCMPPD $0x1,%ZMM13,%ZMM2,%K1{%K5} |
(746) 0x47e475 VMOVDQU64 -0x88(%RCX,%R10,1),%ZMM2 |
(746) 0x47e480 VPCMPEQQ %ZMM12,%ZMM2,%K6 |
(746) 0x47e487 VMOVAPD %ZMM1,%ZMM14{%K1}{z} |
(746) 0x47e48d VADDPD %ZMM14,%ZMM0,%ZMM0 |
(746) 0x47e493 VPGATHERQQ (%R14,%ZMM2,8),%ZMM14{%K4} |
(746) 0x47e49a KMOVB %K3,%K4 |
(746) 0x47e49e VPCMPNLTQ %ZMM11,%ZMM14,%K7 |
(746) 0x47e4a5 KORB %K7,%K6,%K5 |
(746) 0x47e4a9 VMOVUPD -0x80(%RCX),%ZMM1{%K5} |
(746) 0x47e4b0 VMULPD %ZMM10,%ZMM1,%ZMM2 |
(746) 0x47e4b6 VCMPPD $0x1,%ZMM13,%ZMM2,%K1{%K5} |
(746) 0x47e4bd VMOVDQU64 -0x48(%RCX,%R10,1),%ZMM2 |
(746) 0x47e4c8 VPCMPEQQ %ZMM12,%ZMM2,%K6 |
(746) 0x47e4cf VMOVAPD %ZMM1,%ZMM14{%K1}{z} |
(746) 0x47e4d5 VADDPD %ZMM14,%ZMM0,%ZMM0 |
(746) 0x47e4db VPGATHERQQ (%R14,%ZMM2,8),%ZMM14{%K4} |
(746) 0x47e4e2 VPCMPNLTQ %ZMM11,%ZMM14,%K0 |
(746) 0x47e4e9 KORB %K0,%K6,%K7 |
(746) 0x47e4ed VBLENDMPD -0x40(%RCX),%ZMM1,%ZMM2{%K7} |
(746) 0x47e4f4 VMULPD %ZMM2,%ZMM10,%ZMM1 |
(746) 0x47e4fa VMOVAPD %ZMM2,-0x170(%RBP) |
(746) 0x47e504 VCMPPD $0x1,%ZMM13,%ZMM1,%K5{%K7} |
(746) 0x47e50b VMOVAPD %ZMM2,%ZMM14{%K5}{z} |
(746) 0x47e511 VADDPD %ZMM14,%ZMM0,%ZMM0 |
(746) 0x47e517 CMP %R8,%RCX |
(746) 0x47e51a JNE 47e3dc |
(742) 0x47e520 VEXTRACTF64X4 $0x1,%ZMM0,%YMM12 |
(742) 0x47e527 MOV -0x250(%RBP),%R10 |
(742) 0x47e52e MOV -0x1a0(%RBP),%R8 |
(742) 0x47e535 VADDPD %YMM0,%YMM12,%YMM11 |
(742) 0x47e539 MOV %R10,%RCX |
(742) 0x47e53c AND $-0x8,%RCX |
(742) 0x47e540 VEXTRACTF64X2 $0x1,%YMM11,%XMM10 |
(742) 0x47e547 ADD %RCX,%R8 |
(742) 0x47e54a AND $0x7,%R10D |
(742) 0x47e54e VADDPD %XMM11,%XMM10,%XMM13 |
(742) 0x47e553 VADDPD %YMM12,%YMM0,%YMM11 |
(742) 0x47e558 VUNPCKHPD %XMM13,%XMM13,%XMM2 |
(742) 0x47e55d VADDPD %XMM13,%XMM2,%XMM1 |
(742) 0x47e562 VADDSD %XMM1,%XMM3,%XMM10 |
(742) 0x47e566 JE 47e6b0 |
(742) 0x47e56c SUB %RCX,%R9 |
(742) 0x47e56f LEA -0x1(%R9),%R10 |
(742) 0x47e573 SUB $0x2,%R9 |
(742) 0x47e577 CMP $0x2,%R9 |
(742) 0x47e57b JBE 47e60c |
(742) 0x47e581 MOV -0x1a0(%RBP),%R9 |
(742) 0x47e588 KMOVB %K2,%K3 |
(742) 0x47e58c VMOVAPD -0x1f0(%RBP),%YMM13 |
(742) 0x47e594 VBROADCASTSD %XMM9,%YMM14 |
(742) 0x47e599 ADD %R9,%RCX |
(742) 0x47e59c VMOVDQU (%RDX,%RCX,8),%YMM12 |
(742) 0x47e5a1 VPGATHERQQ (%R14,%YMM12,8),%YMM10{%K3} |
(742) 0x47e5a8 VPCMPEQQ %YMM12,%YMM8,%K1 |
(742) 0x47e5af VPCMPNLTQ %YMM7,%YMM10,%K4 |
(742) 0x47e5b6 KORB %K4,%K1,%K6 |
(742) 0x47e5ba VMOVUPD (%RBX,%RCX,8),%YMM13{%K6} |
(742) 0x47e5c1 VMULPD %YMM13,%YMM14,%YMM2 |
(742) 0x47e5c6 VMOVAPD %YMM13,-0x1f0(%RBP) |
(742) 0x47e5ce VCMPPD $0x1,%YMM6,%YMM2,%K7{%K6} |
(742) 0x47e5d5 VMOVAPD %YMM13,%YMM13{%K7}{z} |
(742) 0x47e5db VADDPD %YMM13,%YMM11,%YMM11 |
(742) 0x47e5e0 VEXTRACTF64X2 $0x1,%YMM11,%XMM1 |
(742) 0x47e5e7 VADDPD %XMM11,%XMM1,%XMM14 |
(742) 0x47e5ec VUNPCKHPD %XMM14,%XMM14,%XMM0 |
(742) 0x47e5f1 VADDPD %XMM14,%XMM0,%XMM10 |
(742) 0x47e5f6 VADDSD %XMM10,%XMM3,%XMM10 |
(742) 0x47e5fb TEST $0x3,%R10B |
(742) 0x47e5ff JE 47e6b0 |
(742) 0x47e605 AND $-0x4,%R10 |
(742) 0x47e609 ADD %R10,%R8 |
(742) 0x47e60c MOV (%RDX,%R8,8),%R10 |
(742) 0x47e610 LEA (,%R8,8),%RCX |
(742) 0x47e618 CMP (%R14,%R10,8),%R13 |
(742) 0x47e61c JLE 47e623 |
(742) 0x47e61e CMP %R11,%R10 |
(742) 0x47e621 JNE 47e63c |
(742) 0x47e623 VMOVSD (%RBX,%RCX,1),%XMM12 |
(742) 0x47e628 VXORPD %XMM2,%XMM2,%XMM2 |
(742) 0x47e62c VMULSD %XMM9,%XMM12,%XMM13 |
(742) 0x47e631 VCOMISD %XMM13,%XMM2 |
(742) 0x47e636 JA 480554 |
(742) 0x47e63c LEA 0x1(%R8),%R9 |
(742) 0x47e640 CMP %R9,-0x190(%RBP) |
(742) 0x47e647 JLE 47e6b0 |
(742) 0x47e649 MOV 0x8(%RDX,%RCX,1),%R10 |
(742) 0x47e64e CMP (%R14,%R10,8),%R13 |
(742) 0x47e652 JLE 47e659 |
(742) 0x47e654 CMP %R10,%R11 |
(742) 0x47e657 JNE 47e673 |
(742) 0x47e659 VMOVSD 0x8(%RBX,%RCX,1),%XMM11 |
(742) 0x47e65f VXORPD %XMM14,%XMM14,%XMM14 |
(742) 0x47e664 VMULSD %XMM9,%XMM11,%XMM1 |
(742) 0x47e669 VCOMISD %XMM1,%XMM14 |
(742) 0x47e66d JA 48055e |
(742) 0x47e673 MOV -0x190(%RBP),%R9 |
(742) 0x47e67a ADD $0x2,%R8 |
(742) 0x47e67e CMP %R9,%R8 |
(742) 0x47e681 JGE 47e6b0 |
(742) 0x47e683 MOV 0x10(%RDX,%RCX,1),%R8 |
(742) 0x47e688 CMP (%R14,%R8,8),%R13 |
(742) 0x47e68c JLE 47e693 |
(742) 0x47e68e CMP %R8,%R11 |
(742) 0x47e691 JNE 47e6b0 |
(742) 0x47e693 VMOVSD 0x10(%RBX,%RCX,1),%XMM0 |
(742) 0x47e699 VXORPD %XMM13,%XMM13,%XMM13 |
(742) 0x47e69e VMULSD %XMM0,%XMM9,%XMM12 |
(742) 0x47e6a2 VCOMISD %XMM12,%XMM13 |
(742) 0x47e6a7 JA 480568 |
(742) 0x47e6ad NOPL (%RAX) |
(742) 0x47e6b0 CMPQ $0x1,-0x58(%RBP) |
(742) 0x47e6b5 JG 47f4f0 |
(742) 0x47e6bb VCOMISD %XMM5,%XMM10 |
(742) 0x47e6bf VMOVSD (%RBX,%RSI,8),%XMM2 |
(742) 0x47e6c4 JNE 47fe40 |
(742) 0x47e6ca VADDSD %XMM2,%XMM4,%XMM4 |
(742) 0x47e6ce JMP 47db8a |
0x47e6d3 NOPL (%RAX,%RAX,1) |
(762) 0x47e6d8 MOV -0x68(%RBP),%R15 |
(762) 0x47e6dc MOV (%R15,%R9,8),%RDX |
(762) 0x47e6e0 ADD %R15,%RDI |
(762) 0x47e6e3 CMP (%RDI),%RDX |
(762) 0x47e6e6 JGE 47cda8 |
(762) 0x47e6ec MOV -0x70(%RBP),%R9 |
(762) 0x47e6f0 CMPQ $0,-0x178(%RBP) |
(762) 0x47e6f8 MOV 0xf0(%R9),%R12 |
(762) 0x47e6ff MOV (%R12),%R15 |
(762) 0x47e703 JE 480430 |
(762) 0x47e709 MOV %R10,-0x130(%RBP) |
(762) 0x47e710 MOV %R8,-0x2f0(%RBP) |
(762) 0x47e717 MOV %R13,-0x128(%RBP) |
(762) 0x47e71e MOV -0xf8(%RBP),%R13 |
(762) 0x47e725 MOV %RSI,-0x270(%RBP) |
(762) 0x47e72c MOV -0x178(%RBP),%RSI |
(762) 0x47e733 NOPL (%RAX,%RAX,1) |
(764) 0x47e738 MOV (%R13,%RDX,8),%R10 |
(764) 0x47e73d MOV (%RSI,%R10,8),%R9 |
(764) 0x47e741 CMPQ $0,(%R15,%R9,8) |
(764) 0x47e746 LEA (,%R9,8),%R12 |
(764) 0x47e74e JS 47e77b |
(764) 0x47e750 MOV -0x60(%RBP),%R8 |
(764) 0x47e754 ADD %R8,%R12 |
(764) 0x47e757 MOV -0x38(%RBP),%R8 |
(764) 0x47e75b MOV (%R12),%R10 |
(764) 0x47e75f CMP %R10,(%R8,%RAX,8) |
(764) 0x47e763 JLE 47e77b |
(764) 0x47e765 MOV -0xf0(%RBP),%R8 |
(764) 0x47e76c MOVQ $0x1,(%R8,%R9,8) |
(764) 0x47e774 MOV %RCX,(%R12) |
(764) 0x47e778 INC %RCX |
(764) 0x47e77b INC %RDX |
(764) 0x47e77e CMP %RDX,(%RDI) |
(764) 0x47e781 JG 47e738 |
(762) 0x47e783 MOV -0x128(%RBP),%R13 |
(762) 0x47e78a MOV -0x130(%RBP),%R10 |
(762) 0x47e791 MOV -0x2f0(%RBP),%R8 |
(762) 0x47e798 MOV -0x270(%RBP),%RSI |
(762) 0x47e79f JMP 47cda8 |
0x47e7a4 NOPL (%RAX) |
0x47e7a8 CMP $0x1,%R8 |
0x47e7ac JLE 47ea0c |
0x47e7b2 MOV $0x1,%R12D |
0x47e7b8 MOV %R8,%R10 |
0x47e7bb SUB %R12,%R10 |
0x47e7be AND $0x7,%R10D |
0x47e7c2 JE 480ab5 |
0x47e7c8 CMP $0x1,%R10 |
0x47e7cc JE 47e8d3 |
0x47e7d2 CMP $0x2,%R10 |
0x47e7d6 JE 47e8ae |
0x47e7dc CMP $0x3,%R10 |
0x47e7e0 JE 47e889 |
0x47e7e6 CMP $0x4,%R10 |
0x47e7ea JE 47e864 |
0x47e7ec CMP $0x5,%R10 |
0x47e7f0 JE 47e83f |
0x47e7f2 CMP $0x6,%R10 |
0x47e7f6 JE 47e81a |
0x47e7f8 MOV (%R11),%R15 |
0x47e7fb MOV -0xb0(%RBP),%RDX |
0x47e802 MOV $0x2,%R12D |
0x47e808 ADD %R15,0x8(%R11) |
0x47e80c MOV (%RDX),%RAX |
0x47e80f ADD %RAX,0x8(%RDX) |
0x47e813 MOV (%RCX),%RSI |
0x47e816 ADD %RSI,0x8(%RCX) |
0x47e81a MOV -0x8(%R11,%R12,8),%RDI |
0x47e81f MOV -0xb0(%RBP),%RBX |
0x47e826 ADD %RDI,(%R11,%R12,8) |
0x47e82a MOV -0x8(%RBX,%R12,8),%R9 |
0x47e82f ADD %R9,(%RBX,%R12,8) |
0x47e833 MOV -0x8(%RCX,%R12,8),%R10 |
0x47e838 ADD %R10,(%RCX,%R12,8) |
0x47e83c INC %R12 |
0x47e83f MOV -0x8(%R11,%R12,8),%R15 |
0x47e844 MOV -0xb0(%RBP),%RAX |
0x47e84b ADD %R15,(%R11,%R12,8) |
0x47e84f MOV -0x8(%RAX,%R12,8),%RDX |
0x47e854 ADD %RDX,(%RAX,%R12,8) |
0x47e858 MOV -0x8(%RCX,%R12,8),%RSI |
0x47e85d ADD %RSI,(%RCX,%R12,8) |
0x47e861 INC %R12 |
0x47e864 MOV -0x8(%R11,%R12,8),%RDI |
0x47e869 MOV -0xb0(%RBP),%RBX |
0x47e870 ADD %RDI,(%R11,%R12,8) |
0x47e874 MOV -0x8(%RBX,%R12,8),%R9 |
0x47e879 ADD %R9,(%RBX,%R12,8) |
0x47e87d MOV -0x8(%RCX,%R12,8),%R10 |
0x47e882 ADD %R10,(%RCX,%R12,8) |
0x47e886 INC %R12 |
0x47e889 MOV -0x8(%R11,%R12,8),%R15 |
0x47e88e MOV -0xb0(%RBP),%RAX |
0x47e895 ADD %R15,(%R11,%R12,8) |
0x47e899 MOV -0x8(%RAX,%R12,8),%RDX |
0x47e89e ADD %RDX,(%RAX,%R12,8) |
0x47e8a2 MOV -0x8(%RCX,%R12,8),%RSI |
0x47e8a7 ADD %RSI,(%RCX,%R12,8) |
0x47e8ab INC %R12 |
0x47e8ae MOV -0x8(%R11,%R12,8),%RDI |
0x47e8b3 MOV -0xb0(%RBP),%RBX |
0x47e8ba ADD %RDI,(%R11,%R12,8) |
0x47e8be MOV -0x8(%RBX,%R12,8),%R9 |
0x47e8c3 ADD %R9,(%RBX,%R12,8) |
0x47e8c7 MOV -0x8(%RCX,%R12,8),%R10 |
0x47e8cc ADD %R10,(%RCX,%R12,8) |
0x47e8d0 INC %R12 |
0x47e8d3 MOV -0x8(%R11,%R12,8),%R15 |
0x47e8d8 MOV -0xb0(%RBP),%RAX |
0x47e8df ADD %R15,(%R11,%R12,8) |
0x47e8e3 MOV %RAX,%RBX |
0x47e8e6 MOV -0x8(%RAX,%R12,8),%RDX |
0x47e8eb ADD %RDX,(%RAX,%R12,8) |
0x47e8ef MOV -0x8(%RCX,%R12,8),%RSI |
0x47e8f4 ADD %RSI,(%RCX,%R12,8) |
0x47e8f8 INC %R12 |
0x47e8fb CMP %R12,%R8 |
0x47e8fe JE 47ea0c |
(755) 0x47e904 MOV -0x8(%R11,%R12,8),%RDI |
(755) 0x47e909 LEA 0x1(%R12),%R15 |
(755) 0x47e90e ADD %RDI,(%R11,%R12,8) |
(755) 0x47e912 LEA 0x2(%R12),%RDI |
(755) 0x47e917 MOV -0x8(%RBX,%R12,8),%R9 |
(755) 0x47e91c ADD %R9,(%RBX,%R12,8) |
(755) 0x47e920 MOV -0x8(%RCX,%R12,8),%R10 |
(755) 0x47e925 ADD %R10,(%RCX,%R12,8) |
(755) 0x47e929 MOV -0x8(%R11,%R15,8),%RAX |
(755) 0x47e92e ADD %RAX,(%R11,%R15,8) |
(755) 0x47e932 LEA 0x3(%R12),%RAX |
(755) 0x47e937 MOV -0x8(%RBX,%R15,8),%RDX |
(755) 0x47e93c ADD %RDX,(%RBX,%R15,8) |
(755) 0x47e940 MOV -0x8(%RCX,%R15,8),%RSI |
(755) 0x47e945 ADD %RSI,(%RCX,%R15,8) |
(755) 0x47e949 MOV -0x8(%R11,%RDI,8),%R9 |
(755) 0x47e94e ADD %R9,(%R11,%RDI,8) |
(755) 0x47e952 MOV -0x8(%RBX,%RDI,8),%R10 |
(755) 0x47e957 ADD %R10,(%RBX,%RDI,8) |
(755) 0x47e95b LEA 0x4(%R12),%R10 |
(755) 0x47e960 MOV -0x8(%RCX,%RDI,8),%R15 |
(755) 0x47e965 ADD %R15,(%RCX,%RDI,8) |
(755) 0x47e969 MOV -0x8(%R11,%RAX,8),%RDX |
(755) 0x47e96e ADD %RDX,(%R11,%RAX,8) |
(755) 0x47e972 LEA 0x5(%R12),%RDX |
(755) 0x47e977 MOV -0x8(%RBX,%RAX,8),%RSI |
(755) 0x47e97c ADD %RSI,(%RBX,%RAX,8) |
(755) 0x47e980 MOV -0x8(%RCX,%RAX,8),%RDI |
(755) 0x47e985 ADD %RDI,(%RCX,%RAX,8) |
(755) 0x47e989 MOV -0x8(%R11,%R10,8),%R9 |
(755) 0x47e98e ADD %R9,(%R11,%R10,8) |
(755) 0x47e992 MOV -0x8(%RBX,%R10,8),%R15 |
(755) 0x47e997 ADD %R15,(%RBX,%R10,8) |
(755) 0x47e99b LEA 0x6(%R12),%R15 |
(755) 0x47e9a0 MOV -0x8(%RCX,%R10,8),%RAX |
(755) 0x47e9a5 ADD %RAX,(%RCX,%R10,8) |
(755) 0x47e9a9 MOV -0x8(%R11,%RDX,8),%RSI |
(755) 0x47e9ae ADD %RSI,(%R11,%RDX,8) |
(755) 0x47e9b2 LEA 0x7(%R12),%RSI |
(755) 0x47e9b7 ADD $0x8,%R12 |
(755) 0x47e9bb MOV -0x8(%RBX,%RDX,8),%RDI |
(755) 0x47e9c0 ADD %RDI,(%RBX,%RDX,8) |
(755) 0x47e9c4 MOV -0x8(%RCX,%RDX,8),%R10 |
(755) 0x47e9c9 ADD %R10,(%RCX,%RDX,8) |
(755) 0x47e9cd MOV -0x8(%R11,%R15,8),%R9 |
(755) 0x47e9d2 ADD %R9,(%R11,%R15,8) |
(755) 0x47e9d6 MOV -0x8(%RBX,%R15,8),%RAX |
(755) 0x47e9db ADD %RAX,(%RBX,%R15,8) |
(755) 0x47e9df MOV -0x8(%RCX,%R15,8),%RDX |
(755) 0x47e9e4 ADD %RDX,(%RCX,%R15,8) |
(755) 0x47e9e8 MOV -0x8(%R11,%RSI,8),%RDI |
(755) 0x47e9ed ADD %RDI,(%R11,%RSI,8) |
(755) 0x47e9f1 MOV -0x8(%RBX,%RSI,8),%R10 |
(755) 0x47e9f6 ADD %R10,(%RBX,%RSI,8) |
(755) 0x47e9fa MOV -0x8(%RCX,%RSI,8),%R15 |
(755) 0x47e9ff ADD %R15,(%RCX,%RSI,8) |
(755) 0x47ea03 CMP %R12,%R8 |
(755) 0x47ea06 JNE 47e904 |
0x47ea0c VMOVSD %XMM1,-0xb0(%RBP) |
0x47ea14 CALL 411290 <GOMP_barrier@plt> |
0x47ea19 CALL 411290 <GOMP_barrier@plt> |
0x47ea1e CMPQ $0x4,-0x250(%RBP) |
0x47ea26 VMOVSD -0xb0(%RBP),%XMM3 |
0x47ea2e JE 480571 |
0x47ea34 MOV -0x100(%RBP),%R11 |
0x47ea3b MOV -0x58(%RBP),%RCX |
0x47ea3f MOV -0x38(%RBP),%RAX |
0x47ea43 MOV -0x70(%RBP),%R9 |
0x47ea47 MOV (%RCX,%R11,8),%RBX |
0x47ea4b MOV (%RAX,%R11,8),%RDI |
0x47ea4f MOV %RBX,0xe0(%R9) |
0x47ea56 MOV %RDI,0xe8(%R9) |
0x47ea5d TEST %RBX,%RBX |
0x47ea60 JNE 4804b0 |
0x47ea66 TEST %RDI,%RDI |
0x47ea69 JNE 480500 |
0x47ea6f MOV -0x70(%RBP),%RDX |
0x47ea73 MOV 0x38(%RDX),%RSI |
0x47ea77 CMPQ $0x1,(%RSI) |
0x47ea7b JLE 47d775 |
0x47ea81 MOV -0x70(%RBP),%R10 |
0x47ea85 CMPQ $0,-0x100(%RBP) |
0x47ea8d MOV 0x180(%R10),%R8 |
0x47ea94 MOV 0x130(%R10),%R9 |
0x47ea9b MOV (%R8),%RSI |
0x47ea9e JLE 48093a |
0x47eaa4 MOV -0x100(%RBP),%R15 |
0x47eaab LEA -0x1(%R15),%RBX |
0x47eaaf CMP $0x6,%RBX |
0x47eab3 JBE 480cba |
0x47eab9 SHR $0x3,%R15 |
0x47eabd MOV -0x48(%RBP),%R11 |
0x47eac1 VPBROADCASTQ -0x190(%RBP),%ZMM12 |
0x47eac8 MOV %R15,%RDX |
0x47eacb SAL $0x6,%RDX |
0x47eacf MOV %R11,%R10 |
0x47ead2 LEA (%RDX,%R11,1),%RDI |
0x47ead6 SUB $0x40,%RDX |
0x47eada SHR $0x6,%RDX |
0x47eade INC %RDX |
0x47eae1 AND $0x7,%EDX |
0x47eae4 JE 47eb7d |
0x47eaea CMP $0x1,%RDX |
0x47eaee JE 47eb67 |
0x47eaf0 CMP $0x2,%RDX |
0x47eaf4 JE 47eb56 |
0x47eaf6 CMP $0x3,%RDX |
0x47eafa JE 47eb45 |
0x47eafc CMP $0x4,%RDX |
0x47eb00 JE 47eb34 |
0x47eb02 CMP $0x5,%RDX |
0x47eb06 JE 47eb23 |
0x47eb08 CMP $0x6,%RDX |
0x47eb0c JNE 480bcf |
0x47eb12 VPADDQ (%R10),%ZMM12,%ZMM14 |
0x47eb18 ADD $0x40,%R10 |
0x47eb1c VMOVDQU64 %ZMM14,-0x40(%R10) |
0x47eb23 VPADDQ (%R10),%ZMM12,%ZMM15 |
0x47eb29 ADD $0x40,%R10 |
0x47eb2d VMOVDQU64 %ZMM15,-0x40(%R10) |
0x47eb34 VPADDQ (%R10),%ZMM12,%ZMM6 |
0x47eb3a ADD $0x40,%R10 |
0x47eb3e VMOVDQU64 %ZMM6,-0x40(%R10) |
0x47eb45 VPADDQ (%R10),%ZMM12,%ZMM0 |
0x47eb4b ADD $0x40,%R10 |
0x47eb4f VMOVDQU64 %ZMM0,-0x40(%R10) |
0x47eb56 VPADDQ (%R10),%ZMM12,%ZMM1 |
0x47eb5c ADD $0x40,%R10 |
0x47eb60 VMOVDQU64 %ZMM1,-0x40(%R10) |
0x47eb67 VPADDQ (%R10),%ZMM12,%ZMM2 |
0x47eb6d ADD $0x40,%R10 |
0x47eb71 VMOVDQU64 %ZMM2,-0x40(%R10) |
0x47eb78 CMP %RDI,%R10 |
0x47eb7b JE 47ebf8 |
(754) 0x47eb7d VPADDQ (%R10),%ZMM12,%ZMM7 |
(754) 0x47eb83 VPADDQ 0x40(%R10),%ZMM12,%ZMM8 |
(754) 0x47eb8a ADD $0x200,%R10 |
(754) 0x47eb91 VPADDQ -0x180(%R10),%ZMM12,%ZMM9 |
(754) 0x47eb98 VPADDQ -0x140(%R10),%ZMM12,%ZMM4 |
(754) 0x47eb9f VPADDQ -0x100(%R10),%ZMM12,%ZMM5 |
(754) 0x47eba6 VPADDQ -0xc0(%R10),%ZMM12,%ZMM10 |
(754) 0x47ebad VMOVDQU64 %ZMM7,-0x200(%R10) |
(754) 0x47ebb4 VPADDQ -0x80(%R10),%ZMM12,%ZMM11 |
(754) 0x47ebbb VPADDQ -0x40(%R10),%ZMM12,%ZMM13 |
(754) 0x47ebc2 VMOVDQU64 %ZMM8,-0x1c0(%R10) |
(754) 0x47ebc9 VMOVDQU64 %ZMM9,-0x180(%R10) |
(754) 0x47ebd0 VMOVDQU64 %ZMM4,-0x140(%R10) |
(754) 0x47ebd7 VMOVDQU64 %ZMM5,-0x100(%R10) |
(754) 0x47ebde VMOVDQU64 %ZMM10,-0xc0(%R10) |
(754) 0x47ebe5 VMOVDQU64 %ZMM11,-0x80(%R10) |
(754) 0x47ebec VMOVDQU64 %ZMM13,-0x40(%R10) |
(754) 0x47ebf3 CMP %RDI,%R10 |
(754) 0x47ebf6 JNE 47eb7d |
0x47ebf8 MOV -0x100(%RBP),%R8 |
0x47ebff MOV %R8,%RAX |
0x47ec02 AND $-0x8,%RAX |
0x47ec06 MOV %RAX,%R12 |
0x47ec09 CMP %RAX,%R8 |
0x47ec0c JE 480c5e |
0x47ec12 MOV -0x100(%RBP),%R15 |
0x47ec19 SUB %R12,%R15 |
0x47ec1c LEA -0x1(%R15),%RCX |
0x47ec20 CMP $0x2,%RCX |
0x47ec24 JBE 47ec53 |
0x47ec26 MOV -0x48(%RBP),%R11 |
0x47ec2a VPBROADCASTQ -0x190(%RBP),%YMM14 |
0x47ec33 MOV %R15,%RDX |
0x47ec36 AND $-0x4,%RDX |
0x47ec3a LEA (%R11,%R12,8),%R12 |
0x47ec3e ADD %RDX,%RAX |
0x47ec41 AND $0x3,%R15D |
0x47ec45 VPADDQ (%R12),%YMM14,%YMM15 |
0x47ec4b VMOVDQU %YMM15,(%R12) |
0x47ec51 JE 47ec8d |
0x47ec53 MOV -0x48(%RBP),%R8 |
0x47ec57 MOV -0x190(%RBP),%R15 |
0x47ec5e LEA (,%RAX,8),%RDI |
0x47ec66 LEA 0x1(%RAX),%RCX |
0x47ec6a MOV -0x100(%RBP),%R10 |
0x47ec71 ADD %R15,(%R8,%RDI,1) |
0x47ec75 CMP %RCX,%R10 |
0x47ec78 JLE 47ec8d |
0x47ec7a ADD $0x2,%RAX |
0x47ec7e ADD %R15,0x8(%R8,%RDI,1) |
0x47ec83 CMP %RAX,%R10 |
0x47ec86 JLE 47ec8d |
0x47ec88 ADD %R15,0x10(%R8,%RDI,1) |
0x47ec8d MOV (%R9),%RCX |
0x47ec90 MOV -0x260(%RBP),%R8 |
0x47ec97 VMOVSD %XMM3,-0xb0(%RBP) |
0x47ec9f MOV -0x48(%RBP),%RDX |
0x47eca3 MOV -0x268(%RBP),%RDI |
0x47ecaa VZEROUPPER |
0x47ecad CALL 54fbf0 <hypre_alt_insert_new_nodes> |
0x47ecb2 CMP $0x6,%RBX |
0x47ecb6 VMOVSD -0xb0(%RBP),%XMM3 |
0x47ecbe JBE 480cb3 |
0x47ecc4 VPBROADCASTQ -0x190(%RBP),%ZMM12 |
0x47eccb MOV -0x100(%RBP),%RBX |
0x47ecd2 MOV -0x48(%RBP),%R9 |
0x47ecd6 SHR $0x3,%RBX |
0x47ecda MOV %R9,%RAX |
0x47ecdd SAL $0x6,%RBX |
0x47ece1 LEA (%RBX,%R9,1),%R11 |
0x47ece5 SUB $0x40,%RBX |
0x47ece9 SHR $0x6,%RBX |
0x47eced INC %RBX |
0x47ecf0 AND $0x7,%EBX |
0x47ecf3 JE 47edb8 |
0x47ecf9 CMP $0x1,%RBX |
0x47ecfd JE 47ed98 |
0x47ed03 CMP $0x2,%RBX |
0x47ed07 JE 47ed81 |
0x47ed09 CMP $0x3,%RBX |
0x47ed0d JE 47ed6a |
0x47ed0f CMP $0x4,%RBX |
0x47ed13 JE 47ed53 |
0x47ed15 CMP $0x5,%RBX |
0x47ed19 JE 47ed3c |
0x47ed1b CMP $0x6,%RBX |
0x47ed1f JNE 480baa |
0x47ed25 VMOVDQU64 (%RAX),%ZMM1 |
0x47ed2b ADD $0x40,%RAX |
0x47ed2f VPSUBQ %ZMM12,%ZMM1,%ZMM2 |
0x47ed35 VMOVDQU64 %ZMM2,-0x40(%RAX) |
0x47ed3c VMOVDQU64 (%RAX),%ZMM7 |
0x47ed42 ADD $0x40,%RAX |
0x47ed46 VPSUBQ %ZMM12,%ZMM7,%ZMM8 |
0x47ed4c VMOVDQU64 %ZMM8,-0x40(%RAX) |
0x47ed53 VMOVDQU64 (%RAX),%ZMM9 |
0x47ed59 ADD $0x40,%RAX |
0x47ed5d VPSUBQ %ZMM12,%ZMM9,%ZMM4 |
0x47ed63 VMOVDQU64 %ZMM4,-0x40(%RAX) |
0x47ed6a VMOVDQU64 (%RAX),%ZMM5 |
0x47ed70 ADD $0x40,%RAX |
0x47ed74 VPSUBQ %ZMM12,%ZMM5,%ZMM10 |
0x47ed7a VMOVDQU64 %ZMM10,-0x40(%RAX) |
0x47ed81 VMOVDQU64 (%RAX),%ZMM11 |
0x47ed87 ADD $0x40,%RAX |
0x47ed8b VPSUBQ %ZMM12,%ZMM11,%ZMM13 |
0x47ed91 VMOVDQU64 %ZMM13,-0x40(%RAX) |
0x47ed98 VMOVDQU64 (%RAX),%ZMM14 |
0x47ed9e ADD $0x40,%RAX |
0x47eda2 VPSUBQ %ZMM12,%ZMM14,%ZMM15 |
0x47eda8 VMOVDQU64 %ZMM15,-0x40(%RAX) |
0x47edaf CMP %R11,%RAX |
0x47edb2 JE 47ee66 |
(753) 0x47edb8 VMOVDQU64 (%RAX),%ZMM6 |
(753) 0x47edbe VMOVDQU64 0x40(%RAX),%ZMM1 |
(753) 0x47edc5 ADD $0x200,%RAX |
(753) 0x47edcb VMOVDQU64 -0x180(%RAX),%ZMM7 |
(753) 0x47edd2 VMOVDQU64 -0x140(%RAX),%ZMM9 |
(753) 0x47edd9 VPSUBQ %ZMM12,%ZMM6,%ZMM0 |
(753) 0x47eddf VMOVDQU64 -0x100(%RAX),%ZMM5 |
(753) 0x47ede6 VMOVDQU64 -0xc0(%RAX),%ZMM11 |
(753) 0x47eded VPSUBQ %ZMM12,%ZMM1,%ZMM2 |
(753) 0x47edf3 VMOVDQU64 -0x80(%RAX),%ZMM14 |
(753) 0x47edfa VMOVDQU64 -0x40(%RAX),%ZMM6 |
(753) 0x47ee01 VMOVDQU64 %ZMM0,-0x200(%RAX) |
(753) 0x47ee08 VPSUBQ %ZMM12,%ZMM7,%ZMM8 |
(753) 0x47ee0e VPSUBQ %ZMM12,%ZMM9,%ZMM4 |
(753) 0x47ee14 VPSUBQ %ZMM12,%ZMM5,%ZMM10 |
(753) 0x47ee1a VMOVDQU64 %ZMM2,-0x1c0(%RAX) |
(753) 0x47ee21 VPSUBQ %ZMM12,%ZMM11,%ZMM13 |
(753) 0x47ee27 VPSUBQ %ZMM12,%ZMM14,%ZMM15 |
(753) 0x47ee2d VMOVDQU64 %ZMM8,-0x180(%RAX) |
(753) 0x47ee34 VPSUBQ %ZMM12,%ZMM6,%ZMM0 |
(753) 0x47ee3a VMOVDQU64 %ZMM4,-0x140(%RAX) |
(753) 0x47ee41 VMOVDQU64 %ZMM10,-0x100(%RAX) |
(753) 0x47ee48 VMOVDQU64 %ZMM13,-0xc0(%RAX) |
(753) 0x47ee4f VMOVDQU64 %ZMM15,-0x80(%RAX) |
(753) 0x47ee56 VMOVDQU64 %ZMM0,-0x40(%RAX) |
(753) 0x47ee5d CMP %R11,%RAX |
(753) 0x47ee60 JNE 47edb8 |
0x47ee66 MOV -0x100(%RBP),%RDX |
0x47ee6d MOV %RDX,%RDI |
0x47ee70 AND $-0x8,%RDI |
0x47ee74 MOV %RDI,-0x118(%RBP) |
0x47ee7b MOV %RDI,%RSI |
0x47ee7e CMP %RDI,%RDX |
0x47ee81 JE 48082a |
0x47ee87 MOV -0x100(%RBP),%R8 |
0x47ee8e SUB %RSI,%R8 |
0x47ee91 LEA -0x1(%R8),%RCX |
0x47ee95 CMP $0x2,%RCX |
0x47ee99 JBE 47eed5 |
0x47ee9b MOV -0x48(%RBP),%R10 |
0x47ee9f VPBROADCASTQ -0x190(%RBP),%YMM12 |
0x47eea8 MOV %R8,%R15 |
0x47eeab AND $-0x4,%R15 |
0x47eeaf LEA (%R10,%RSI,8),%R12 |
0x47eeb3 ADD %R15,-0x118(%RBP) |
0x47eeba VMOVDQU (%R12),%YMM1 |
0x47eec0 VPSUBQ %YMM12,%YMM1,%YMM2 |
0x47eec5 VMOVDQU %YMM2,(%R12) |
0x47eecb TEST $0x3,%R8B |
0x47eecf JE 48082a |
0x47eed5 MOV -0x118(%RBP),%R9 |
0x47eedc MOV -0x48(%RBP),%R11 |
0x47eee0 MOV -0x190(%RBP),%RSI |
0x47eee7 MOV -0x100(%RBP),%RDI |
0x47eeee LEA (,%R9,8),%RBX |
0x47eef6 LEA 0x1(%R9),%RAX |
0x47eefa SUB %RSI,(%R11,%RBX,1) |
0x47eefe CMP %RAX,%RDI |
0x47ef01 JLE 48082a |
0x47ef07 ADD $0x2,%R9 |
0x47ef0b SUB %RSI,0x8(%R11,%RBX,1) |
0x47ef10 CMP %R9,%RDI |
0x47ef13 JLE 48082a |
0x47ef19 SUB %RSI,0x10(%R11,%RBX,1) |
0x47ef1e VZEROUPPER |
0x47ef21 JMP 47d783 |
0x47ef26 NOPW %CS:(%RAX,%RAX,1) |
(736) 0x47ef30 MOV -0x68(%RBP),%R11 |
(736) 0x47ef34 MOV (%R11,%R8,8),%RSI |
(736) 0x47ef38 CMP 0x8(%R11,%R8,8),%RSI |
(736) 0x47ef3d JGE 47db0c |
(736) 0x47ef43 MOV -0x70(%RBP),%RAX |
(736) 0x47ef47 MOV -0x128(%RBP),%RCX |
(736) 0x47ef4e MOV %R14,-0x58(%RBP) |
(736) 0x47ef52 MOV %R12,-0x1a0(%RBP) |
(736) 0x47ef59 MOV -0x1c0(%RBP),%R14 |
(736) 0x47ef60 MOV 0xd8(%RAX),%RBX |
(736) 0x47ef67 MOV 0xf0(%RAX),%RDX |
(736) 0x47ef6e MOV %R9,-0x208(%RBP) |
(736) 0x47ef75 MOV 0xc8(%RAX),%RDI |
(736) 0x47ef7c MOV -0x60(%RBP),%R12 |
(736) 0x47ef80 MOV %R13,-0x130(%RBP) |
(736) 0x47ef87 MOV (%RDX),%R11 |
(736) 0x47ef8a MOV -0x210(%RBP),%R13 |
(736) 0x47ef91 MOV %RBX,-0x190(%RBP) |
(736) 0x47ef98 MOV -0x108(%RBP),%R9 |
(736) 0x47ef9f MOV -0x178(%RBP),%RBX |
(736) 0x47efa6 MOV %R10,-0x230(%RBP) |
(736) 0x47efad MOV %RDI,-0x128(%RBP) |
(736) 0x47efb4 JMP 47eff8 |
0x47efb6 NOPW %CS:(%RAX,%RAX,1) |
(747) 0x47efc0 ADD %R12,%RDI |
(747) 0x47efc3 CMP (%RDI),%R15 |
(747) 0x47efc6 JLE 47efe6 |
(747) 0x47efc8 MOV -0x190(%RBP),%RDX |
(747) 0x47efcf MOV -0x128(%RBP),%R10 |
(747) 0x47efd6 MOV %RCX,(%RDI) |
(747) 0x47efd9 MOV %RAX,(%RDX,%RCX,8) |
(747) 0x47efdd VMOVSD %XMM3,(%R10,%RCX,8) |
(747) 0x47efe3 INC %RCX |
(747) 0x47efe6 MOV -0x68(%RBP),%RDI |
(747) 0x47efea INC %RSI |
(747) 0x47efed CMP %RSI,0x8(%RDI,%R8,8) |
(747) 0x47eff2 JLE 47f120 |
(747) 0x47eff8 MOV -0xf8(%RBP),%R10 |
(747) 0x47efff MOV (%R10,%RSI,8),%RAX |
(747) 0x47f003 TEST %RBX,%RBX |
(747) 0x47f006 JE 47f00c |
(747) 0x47f008 MOV (%RBX,%RAX,8),%RAX |
(747) 0x47f00c MOV (%R11,%RAX,8),%RDX |
(747) 0x47f010 LEA (,%RAX,8),%RDI |
(747) 0x47f018 TEST %RDX,%RDX |
(747) 0x47f01b JNS 47efc0 |
(747) 0x47f01d CMP $-0x3,%RDX |
(747) 0x47f021 JE 47efe6 |
(747) 0x47f023 MOV -0x48(%RBP),%R10 |
(747) 0x47f027 MOV -0x1f8(%RBP),%RAX |
(747) 0x47f02e MOV %R10,(%R12,%RDI,1) |
(747) 0x47f032 LEA 0x8(%RAX,%RDI,1),%R10 |
(747) 0x47f037 MOV (%RAX,%RDI,1),%RDX |
(747) 0x47f03b MOV (%R10),%RDI |
(747) 0x47f03e CMP %RDI,%RDX |
(747) 0x47f041 JGE 47efe6 |
(747) 0x47f043 MOV %RSI,-0x1c8(%RBP) |
(747) 0x47f04a MOV -0x1a8(%RBP),%RSI |
(747) 0x47f051 MOV %RBX,-0x108(%RBP) |
(747) 0x47f058 MOV %R8,-0x1d0(%RBP) |
(747) 0x47f05f JMP 47f0b8 |
0x47f061 NOPL (%RAX) |
(748) 0x47f068 CMP %RAX,%R14 |
(748) 0x47f06b JG 47f0c2 |
(748) 0x47f06d MOV -0x58(%RBP),%R8 |
(748) 0x47f071 SUB %R14,%RAX |
(748) 0x47f074 LEA (%R8,%RAX,8),%RBX |
(748) 0x47f078 MOV -0x130(%RBP),%R8 |
(748) 0x47f07f CMP (%RBX),%R8 |
(748) 0x47f082 JLE 47f0b0 |
(748) 0x47f084 MOV -0x1a0(%RBP),%RDI |
(748) 0x47f08b MOV -0xb0(%RBP),%R8 |
(748) 0x47f092 MOV %R9,(%RBX) |
(748) 0x47f095 MOV -0xf0(%RBP),%RBX |
(748) 0x47f09c MOV (%RDI,%RAX,8),%RAX |
(748) 0x47f0a0 MOV %RAX,(%RBX,%R9,8) |
(748) 0x47f0a4 VMOVSD %XMM3,(%R8,%R9,8) |
(748) 0x47f0aa INC %R9 |
(748) 0x47f0ad MOV (%R10),%RDI |
(748) 0x47f0b0 INC %RDX |
(748) 0x47f0b3 CMP %RDI,%RDX |
(748) 0x47f0b6 JGE 47f0f6 |
(748) 0x47f0b8 MOV (%R13,%RDX,8),%RAX |
(748) 0x47f0bd CMP %RAX,%RSI |
(748) 0x47f0c0 JG 47f068 |
(748) 0x47f0c2 NOT %RAX |
(748) 0x47f0c5 LEA (%R12,%RAX,8),%RBX |
(748) 0x47f0c9 CMP (%RBX),%R15 |
(748) 0x47f0cc JLE 47f0b0 |
(748) 0x47f0ce MOV -0x190(%RBP),%R8 |
(748) 0x47f0d5 MOV %RCX,(%RBX) |
(748) 0x47f0d8 INC %RDX |
(748) 0x47f0db MOV %RAX,(%R8,%RCX,8) |
(748) 0x47f0df MOV -0x128(%RBP),%RAX |
(748) 0x47f0e6 VMOVSD %XMM3,(%RAX,%RCX,8) |
(748) 0x47f0eb INC %RCX |
(748) 0x47f0ee MOV (%R10),%RDI |
(748) 0x47f0f1 CMP %RDI,%RDX |
(748) 0x47f0f4 JL 47f0b8 |
(747) 0x47f0f6 MOV -0x1c8(%RBP),%RSI |
(747) 0x47f0fd MOV -0x1d0(%RBP),%R8 |
(747) 0x47f104 MOV -0x68(%RBP),%RDI |
(747) 0x47f108 MOV -0x108(%RBP),%RBX |
(747) 0x47f10f INC %RSI |
(747) 0x47f112 CMP %RSI,0x8(%RDI,%R8,8) |
(747) 0x47f117 JG 47eff8 |
(736) 0x47f11d NOPL (%RAX) |
(736) 0x47f120 MOV -0x118(%RBP),%RAX |
(736) 0x47f127 MOV -0x58(%RBP),%R14 |
(736) 0x47f12b MOV %R9,-0x108(%RBP) |
(736) 0x47f132 MOV -0x1a0(%RBP),%R12 |
(736) 0x47f139 MOV -0x230(%RBP),%R10 |
(736) 0x47f140 MOV %RCX,-0x128(%RBP) |
(736) 0x47f147 MOV (%RAX),%RBX |
(736) 0x47f14a MOV -0x130(%RBP),%R13 |
(736) 0x47f151 MOV -0x208(%RBP),%R9 |
(736) 0x47f158 MOV %RBX,-0x58(%RBP) |
(736) 0x47f15c JMP 47db0c |
0x47f161 NOPL (%RAX) |
(736) 0x47f168 MOV -0x238(%RBP),%RBX |
(736) 0x47f16f MOV (%RBX,%R8,8),%RCX |
(736) 0x47f173 MOV 0x8(%RBX,%R8,8),%R11 |
(736) 0x47f178 CMP %R11,%RCX |
(736) 0x47f17b JGE 47dc0e |
(736) 0x47f181 MOV -0x70(%RBP),%RDI |
(736) 0x47f185 SAL $0x3,%RCX |
(736) 0x47f189 MOV %R12,-0x1c8(%RBP) |
(736) 0x47f190 MOV %R10,-0x1d0(%RBP) |
(736) 0x47f197 MOV 0x100(%RDI),%RAX |
(736) 0x47f19e MOV 0xf0(%RDI),%RDX |
(736) 0x47f1a5 MOV (%RAX),%RBX |
(736) 0x47f1a8 MOV (%RDX),%RSI |
(736) 0x47f1ab MOV %R9,%RAX |
(736) 0x47f1ae MOV %RBX,-0x1a0(%RBP) |
(736) 0x47f1b5 MOV 0xc8(%RDI),%RBX |
(736) 0x47f1bc MOV -0x1b0(%RBP),%RDI |
(736) 0x47f1c3 MOV %RSI,-0x130(%RBP) |
(736) 0x47f1ca MOV -0x1b8(%RBP),%RSI |
(736) 0x47f1d1 LEA (%RDI,%RCX,1),%RDX |
(736) 0x47f1d5 LEA (%RDI,%R11,8),%R11 |
(736) 0x47f1d9 MOV %RDX,-0x58(%RBP) |
(736) 0x47f1dd ADD %RSI,%RCX |
(736) 0x47f1e0 MOV -0x60(%RBP),%RDX |
(736) 0x47f1e4 JMP 47f214 |
0x47f1e6 NOPW %CS:(%RAX,%RAX,1) |
(739) 0x47f1f0 LEA (%RBX,%RDI,8),%R9 |
(739) 0x47f1f4 VMOVSD (%R9),%XMM2 |
(739) 0x47f1f9 VADDSD (%RCX),%XMM2,%XMM0 |
(739) 0x47f1fd VMOVSD %XMM0,(%R9) |
(739) 0x47f202 ADDQ $0x8,-0x58(%RBP) |
(739) 0x47f207 ADD $0x8,%RCX |
(739) 0x47f20b MOV -0x58(%RBP),%R10 |
(739) 0x47f20f CMP %R11,%R10 |
(739) 0x47f212 JE 47f270 |
(739) 0x47f214 MOV -0x58(%RBP),%R12 |
(739) 0x47f218 MOV (%R12),%R9 |
(739) 0x47f21c MOV (%RDX,%R9,8),%RDI |
(739) 0x47f220 LEA (,%R9,8),%R12 |
(739) 0x47f228 CMP %RDI,%R15 |
(739) 0x47f22b JLE 47f1f0 |
(739) 0x47f22d MOV -0x48(%RBP),%R10 |
(739) 0x47f231 CMP %R10,%RDI |
(739) 0x47f234 JE 47f3c8 |
(739) 0x47f23a MOV -0x130(%RBP),%RSI |
(739) 0x47f241 CMPQ $-0x3,(%RSI,%R9,8) |
(739) 0x47f246 JE 47f202 |
(739) 0x47f248 CMPQ $0x1,-0x110(%RBP) |
(739) 0x47f250 JE 47f26a |
(739) 0x47f252 MOV -0x1a0(%RBP),%RDI |
(739) 0x47f259 MOV -0x180(%RBP),%R12 |
(739) 0x47f260 MOV (%RDI,%R9,8),%R9 |
(739) 0x47f264 CMP %R9,(%R12,%R8,8) |
(739) 0x47f268 JNE 47f202 |
(739) 0x47f26a VADDSD (%RCX),%XMM4,%XMM4 |
(739) 0x47f26e JMP 47f202 |
(736) 0x47f270 MOV -0x1c8(%RBP),%R12 |
(736) 0x47f277 MOV -0x1d0(%RBP),%R10 |
(736) 0x47f27e MOV %RAX,%R9 |
(736) 0x47f281 JMP 47dc0e |
0x47f286 NOPW %CS:(%RAX,%RAX,1) |
0x47f290 MOV %RSI,%R12 |
0x47f293 MOV $0x8,%ESI |
0x47f298 MOV %R8,-0x118(%RBP) |
0x47f29f MOV %R12,%RDI |
0x47f2a2 MOV %RCX,-0x108(%RBP) |
0x47f2a9 VMOVSD %XMM3,-0x40(%RBP) |
0x47f2ae CALL 5b0890 <hypre_CAlloc> |
0x47f2b3 TEST %R12,%R12 |
0x47f2b6 VMOVSD -0x40(%RBP),%XMM3 |
0x47f2bb MOV -0x108(%RBP),%RCX |
0x47f2c2 MOV -0x118(%RBP),%R8 |
0x47f2c9 MOV %RAX,%R13 |
0x47f2cc JLE 47cbc1 |
0x47f2d2 LEA (,%R12,8),%RDX |
0x47f2da MOV $0xff,%ESI |
0x47f2df MOV %RAX,%RDI |
0x47f2e2 CALL 4110a0 <memset@plt> |
0x47f2e7 VMOVSD -0x40(%RBP),%XMM3 |
0x47f2ec MOV -0x108(%RBP),%RCX |
0x47f2f3 MOV -0x118(%RBP),%R8 |
0x47f2fa JMP 47cbc1 |
0x47f2ff NOP |
0x47f300 MOV -0x60(%RBP),%RDI |
0x47f304 ADD $0x308,%RSP |
0x47f30b POP %RBX |
0x47f30c POP %R12 |
0x47f30e POP %R10 |
0x47f310 POP %R14 |
0x47f312 POP %R15 |
0x47f314 POP %RBP |
0x47f315 LEA -0x10(%R10),%RSP |
0x47f319 POP %R13 |
0x47f31b JMP 5b0950 |
0x47f320 VMOVSD %XMM3,-0xb0(%RBP) |
0x47f328 CALL 411290 <GOMP_barrier@plt> |
0x47f32d MOV -0x108(%RBP),%R12 |
0x47f334 VMOVSD -0xb0(%RBP),%XMM3 |
0x47f33c CMP %R12,-0x40(%RBP) |
0x47f340 JG 47d806 |
0x47f346 NOPW %CS:(%RAX,%RAX,1) |
0x47f350 MOV %R13,%RDI |
0x47f353 CALL 5b0950 <hypre_Free> |
0x47f358 JMP 47e184 |
0x47f35d NOPL (%RAX) |
0x47f360 MOV $0x8,%ESI |
0x47f365 MOV %R8,-0x118(%RBP) |
0x47f36c MOV %RCX,-0x108(%RBP) |
0x47f373 VMOVSD %XMM3,-0x40(%RBP) |
0x47f378 CALL 5b0890 <hypre_CAlloc> |
0x47f37d MOV -0x70(%RBP),%R15 |
0x47f381 VMOVSD -0x40(%RBP),%XMM3 |
0x47f386 MOV -0x108(%RBP),%RCX |
0x47f38d MOV -0x118(%RBP),%R8 |
0x47f394 MOV %RAX,-0x60(%RBP) |
0x47f398 MOV %RAX,%R11 |
0x47f39b MOV 0x130(%R15),%RDI |
0x47f3a2 CMPQ $0,(%RDI) |
0x47f3a6 JLE 47cbd8 |
0x47f3ac XOR %EDX,%EDX |
0x47f3ae XCHG %AX,%AX |
(766) 0x47f3b0 MOVQ $-0x1,(%R11,%RDX,8) |
(766) 0x47f3b8 INC %RDX |
(766) 0x47f3bb CMP %RDX,(%RDI) |
(766) 0x47f3be JG 47f3b0 |
0x47f3c0 JMP 47cbd8 |
0x47f3c5 NOPL (%RAX) |
(739) 0x47f3c8 MOV -0x258(%RBP),%RDI |
(739) 0x47f3cf VMOVSD %XMM3,%XMM3,%XMM8 |
(739) 0x47f3d3 MOV (%RDI,%R9,8),%RSI |
(739) 0x47f3d7 MOV 0x8(%RDI,%R12,1),%R12 |
(739) 0x47f3dc MOV %RSI,-0x208(%RBP) |
(739) 0x47f3e3 MOV %RSI,%R10 |
(739) 0x47f3e6 MOV %R12,-0x190(%RBP) |
(739) 0x47f3ed CMP %RSI,%R12 |
(739) 0x47f3f0 JLE 480c1e |
(739) 0x47f3f6 SUB %RSI,%R12 |
(739) 0x47f3f9 AND $0x3,%R12D |
(739) 0x47f3fd JE 47fa37 |
(739) 0x47f403 CMP $0x1,%R12 |
(739) 0x47f407 JE 47f4ad |
(739) 0x47f40d CMP $0x2,%R12 |
(739) 0x47f411 JE 47f467 |
(739) 0x47f413 MOV -0x240(%RBP),%RSI |
(739) 0x47f41a MOV (%RSI,%R10,8),%R9 |
(739) 0x47f41e CMP %R9,-0x1a8(%RBP) |
(739) 0x47f425 JLE 480be4 |
(739) 0x47f42b MOV -0x1c0(%RBP),%RDI |
(739) 0x47f432 CMP %R9,%RDI |
(739) 0x47f435 JG 480be4 |
(739) 0x47f43b SUB %RDI,%R9 |
(739) 0x47f43e CMP (%R14,%R9,8),%R13 |
(739) 0x47f442 JLE 47f449 |
(739) 0x47f444 CMP %R9,%R8 |
(739) 0x47f447 JNE 47f45d |
(739) 0x47f449 MOV -0x248(%RBP),%R12 |
(739) 0x47f450 MOV -0x208(%RBP),%R10 |
(739) 0x47f457 VADDSD (%R12,%R10,8),%XMM3,%XMM8 |
(739) 0x47f45d MOV -0x208(%RBP),%RSI |
(739) 0x47f464 INC %RSI |
(739) 0x47f467 MOV -0x240(%RBP),%R9 |
(739) 0x47f46e MOV (%R9,%RSI,8),%RDI |
(739) 0x47f472 CMP %RDI,-0x1a8(%RBP) |
(739) 0x47f479 JLE 480a05 |
(739) 0x47f47f MOV -0x1c0(%RBP),%R12 |
(739) 0x47f486 CMP %RDI,%R12 |
(739) 0x47f489 JG 480a05 |
(739) 0x47f48f SUB %R12,%RDI |
(739) 0x47f492 CMP (%R14,%RDI,8),%R13 |
(739) 0x47f496 JLE 47f49d |
(739) 0x47f498 CMP %RDI,%R8 |
(739) 0x47f49b JNE 47f4aa |
(739) 0x47f49d MOV -0x248(%RBP),%R10 |
(739) 0x47f4a4 VADDSD (%R10,%RSI,8),%XMM8,%XMM8 |
(739) 0x47f4aa INC %RSI |
(739) 0x47f4ad MOV -0x240(%RBP),%R9 |
(739) 0x47f4b4 MOV (%R9,%RSI,8),%RDI |
(739) 0x47f4b8 CMP %RDI,-0x1a8(%RBP) |
(739) 0x47f4bf JLE 47fa11 |
(739) 0x47f4c5 MOV -0x1c0(%RBP),%R12 |
(739) 0x47f4cc CMP %RDI,%R12 |
(739) 0x47f4cf JG 47fa11 |
(739) 0x47f4d5 SUB %R12,%RDI |
(739) 0x47f4d8 CMP (%R14,%RDI,8),%R13 |
(739) 0x47f4dc JLE 47fa1a |
(739) 0x47f4e2 CMP %RDI,%R8 |
(739) 0x47f4e5 JE 47fa1a |
(739) 0x47f4eb JMP 47fa27 |
(742) 0x47f4f0 MOV -0x238(%RBP),%RCX |
(742) 0x47f4f7 MOV 0x8(%RCX,%RDI,1),%R10 |
(742) 0x47f4fc MOV (%RCX,%RAX,8),%R8 |
(742) 0x47f500 MOV %R10,-0x268(%RBP) |
(742) 0x47f507 CMP %R10,%R8 |
(742) 0x47f50a JGE 47e6bb |
(742) 0x47f510 SUB %R8,%R10 |
(742) 0x47f513 MOV %R8,-0x260(%RBP) |
(742) 0x47f51a LEA -0x1(%R10),%R9 |
(742) 0x47f51e MOV %R10,-0x230(%RBP) |
(742) 0x47f525 CMP $0x6,%R9 |
(742) 0x47f529 JBE 480ca4 |
(742) 0x47f52f MOV -0x1b8(%RBP),%R9 |
(742) 0x47f536 SHR $0x3,%R10 |
(742) 0x47f53a VXORPD %XMM1,%XMM1,%XMM1 |
(742) 0x47f53e VPBROADCASTQ -0x130(%RBP),%ZMM12 |
(742) 0x47f545 KXNORB %K0,%K0,%K0 |
(742) 0x47f549 SAL $0x6,%R10 |
(742) 0x47f54d VBROADCASTSD %XMM9,%ZMM11 |
(742) 0x47f553 VMOVAPD %ZMM1,%ZMM13 |
(742) 0x47f559 LEA (%R9,%R8,8),%RCX |
(742) 0x47f55d MOV %R10,-0x2f0(%RBP) |
(742) 0x47f564 MOV -0x1b0(%RBP),%R9 |
(742) 0x47f56b ADD %RCX,%R10 |
(742) 0x47f56e MOV %RCX,-0x270(%RBP) |
(742) 0x47f575 MOV %R10,-0x250(%RBP) |
(742) 0x47f57c MOV -0x1b8(%RBP),%R10 |
(742) 0x47f583 SUB %R10,%R9 |
(742) 0x47f586 MOV %R9,%R10 |
(742) 0x47f589 MOV -0x2f0(%RBP),%R9 |
(742) 0x47f590 SUB $0x40,%R9 |
(742) 0x47f594 SHR $0x6,%R9 |
(742) 0x47f598 INC %R9 |
(742) 0x47f59b AND $0x3,%R9D |
(742) 0x47f59f JE 47f6d5 |
(742) 0x47f5a5 CMP $0x1,%R9 |
(742) 0x47f5a9 JE 47f670 |
(742) 0x47f5af CMP $0x2,%R9 |
(742) 0x47f5b3 JE 47f61b |
(742) 0x47f5b5 MOV -0x270(%RBP),%R9 |
(742) 0x47f5bc KMOVB %K0,%K5 |
(742) 0x47f5c0 VMOVAPD -0x2b0(%RBP),%ZMM2 |
(742) 0x47f5ca ADD $0x40,%RCX |
(742) 0x47f5ce VMOVDQU64 (%R9,%R10,1),%ZMM14 |
(742) 0x47f5d5 MOV -0x60(%RBP),%R9 |
(742) 0x47f5d9 VMOVDQA64 %ZMM14,-0x2f0(%RBP) |
(742) 0x47f5e3 VPGATHERQQ (%R9,%ZMM14,8),%ZMM0{%K5} |
(742) 0x47f5ea MOV -0x270(%RBP),%R9 |
(742) 0x47f5f1 VPCMPNLTQ %ZMM12,%ZMM0,%K3 |
(742) 0x47f5f8 VMOVUPD (%R9),%ZMM2{%K3} |
(742) 0x47f5fe VMULPD %ZMM2,%ZMM11,%ZMM14 |
(742) 0x47f604 VMOVAPD %ZMM2,-0x2b0(%RBP) |
(742) 0x47f60e VCMPPD $0x1,%ZMM1,%ZMM14,%K1{%K3} |
(742) 0x47f615 VMOVAPD %ZMM2,%ZMM1{%K1}{z} |
(742) 0x47f61b VMOVDQU64 (%RCX,%R10,1),%ZMM2 |
(742) 0x47f622 MOV -0x60(%RBP),%R9 |
(742) 0x47f626 KMOVB %K0,%K4 |
(742) 0x47f62a ADD $0x40,%RCX |
(742) 0x47f62e VMOVAPD -0x2b0(%RBP),%ZMM14 |
(742) 0x47f638 VPGATHERQQ (%R9,%ZMM2,8),%ZMM0{%K4} |
(742) 0x47f63f VPCMPNLTQ %ZMM12,%ZMM0,%K6 |
(742) 0x47f646 VMOVUPD -0x40(%RCX),%ZMM14{%K6} |
(742) 0x47f64d VMULPD %ZMM14,%ZMM11,%ZMM2 |
(742) 0x47f653 VMOVAPD %ZMM14,-0x2b0(%RBP) |
(742) 0x47f65d VCMPPD $0x1,%ZMM13,%ZMM2,%K7{%K6} |
(742) 0x47f664 VMOVAPD %ZMM14,%ZMM0{%K7}{z} |
(742) 0x47f66a VADDPD %ZMM0,%ZMM1,%ZMM1 |
(742) 0x47f670 VMOVDQU64 (%RCX,%R10,1),%ZMM14 |
(742) 0x47f677 MOV -0x60(%RBP),%R9 |
(742) 0x47f67b KMOVB %K0,%K5 |
(742) 0x47f67f ADD $0x40,%RCX |
(742) 0x47f683 VPGATHERQQ (%R9,%ZMM14,8),%ZMM2{%K5} |
(742) 0x47f68a VMOVAPD -0x2b0(%RBP),%ZMM14 |
(742) 0x47f694 MOV -0x250(%RBP),%R9 |
(742) 0x47f69b VPCMPNLTQ %ZMM12,%ZMM2,%K3 |
(742) 0x47f6a2 VMOVUPD -0x40(%RCX),%ZMM14{%K3} |
(742) 0x47f6a9 VMULPD %ZMM14,%ZMM11,%ZMM0 |
(742) 0x47f6af VMOVAPD %ZMM14,-0x2b0(%RBP) |
(742) 0x47f6b9 VCMPPD $0x1,%ZMM13,%ZMM0,%K1{%K3} |
(742) 0x47f6c0 VMOVAPD %ZMM14,%ZMM2{%K1}{z} |
(742) 0x47f6c6 VADDPD %ZMM2,%ZMM1,%ZMM1 |
(742) 0x47f6cc CMP %R9,%RCX |
(742) 0x47f6cf JE 47f7f9 |
(742) 0x47f6d5 MOV %RAX,-0x2f0(%RBP) |
(742) 0x47f6dc MOV -0x60(%RBP),%R9 |
(745) 0x47f6e0 VMOVDQU64 (%RCX,%R10,1),%ZMM14 |
(745) 0x47f6e7 KMOVB %K0,%K4 |
(745) 0x47f6eb KMOVB %K0,%K5 |
(745) 0x47f6ef MOV -0x250(%RBP),%RAX |
(745) 0x47f6f6 ADD $0x100,%RCX |
(745) 0x47f6fd VPGATHERQQ (%R9,%ZMM14,8),%ZMM0{%K4} |
(745) 0x47f704 KMOVB %K0,%K4 |
(745) 0x47f708 VPCMPNLTQ %ZMM12,%ZMM0,%K6 |
(745) 0x47f70f VMOVAPD -0x2b0(%RBP),%ZMM0 |
(745) 0x47f719 VMOVUPD -0x100(%RCX),%ZMM0{%K6} |
(745) 0x47f720 VMULPD %ZMM11,%ZMM0,%ZMM2 |
(745) 0x47f726 VCMPPD $0x1,%ZMM13,%ZMM2,%K7{%K6} |
(745) 0x47f72d VMOVAPD %ZMM0,%ZMM14{%K7}{z} |
(745) 0x47f733 VADDPD %ZMM14,%ZMM1,%ZMM1 |
(745) 0x47f739 VMOVDQU64 -0xc0(%RCX,%R10,1),%ZMM14 |
(745) 0x47f741 VPGATHERQQ (%R9,%ZMM14,8),%ZMM2{%K5} |
(745) 0x47f748 KMOVB %K0,%K5 |
(745) 0x47f74c VPCMPNLTQ %ZMM12,%ZMM2,%K3 |
(745) 0x47f753 VMOVUPD -0xc0(%RCX),%ZMM0{%K3} |
(745) 0x47f75a VMULPD %ZMM11,%ZMM0,%ZMM14 |
(745) 0x47f760 VCMPPD $0x1,%ZMM13,%ZMM14,%K1{%K3} |
(745) 0x47f767 VMOVDQU64 -0x80(%RCX,%R10,1),%ZMM14 |
(745) 0x47f76f VMOVAPD %ZMM0,%ZMM2{%K1}{z} |
(745) 0x47f775 VADDPD %ZMM2,%ZMM1,%ZMM1 |
(745) 0x47f77b VPGATHERQQ (%R9,%ZMM14,8),%ZMM2{%K4} |
(745) 0x47f782 VPCMPNLTQ %ZMM12,%ZMM2,%K6 |
(745) 0x47f789 VMOVUPD -0x80(%RCX),%ZMM0{%K6} |
(745) 0x47f790 VMULPD %ZMM11,%ZMM0,%ZMM14 |
(745) 0x47f796 VCMPPD $0x1,%ZMM13,%ZMM14,%K7{%K6} |
(745) 0x47f79d VMOVDQU64 -0x40(%RCX,%R10,1),%ZMM14 |
(745) 0x47f7a5 VMOVAPD %ZMM0,%ZMM2{%K7}{z} |
(745) 0x47f7ab VADDPD %ZMM2,%ZMM1,%ZMM1 |
(745) 0x47f7b1 VPGATHERQQ (%R9,%ZMM14,8),%ZMM2{%K5} |
(745) 0x47f7b8 VPCMPNLTQ %ZMM12,%ZMM2,%K3 |
(745) 0x47f7bf VBLENDMPD -0x40(%RCX),%ZMM0,%ZMM14{%K3} |
(745) 0x47f7c6 VMULPD %ZMM14,%ZMM11,%ZMM0 |
(745) 0x47f7cc VMOVAPD %ZMM14,-0x2b0(%RBP) |
(745) 0x47f7d6 VCMPPD $0x1,%ZMM13,%ZMM0,%K1{%K3} |
(745) 0x47f7dd VMOVAPD %ZMM14,%ZMM2{%K1}{z} |
(745) 0x47f7e3 VADDPD %ZMM2,%ZMM1,%ZMM1 |
(745) 0x47f7e9 CMP %RAX,%RCX |
(745) 0x47f7ec JNE 47f6e0 |
(742) 0x47f7f2 MOV -0x2f0(%RBP),%RAX |
(742) 0x47f7f9 VEXTRACTF64X4 $0x1,%ZMM1,%YMM12 |
(742) 0x47f800 MOV -0x230(%RBP),%R10 |
(742) 0x47f807 VADDPD %YMM1,%YMM12,%YMM11 |
(742) 0x47f80b VADDPD %YMM12,%YMM1,%YMM1 |
(742) 0x47f810 MOV %R10,%RCX |
(742) 0x47f813 AND $-0x8,%RCX |
(742) 0x47f817 VEXTRACTF64X2 $0x1,%YMM11,%XMM13 |
(742) 0x47f81e ADD %RCX,%R8 |
(742) 0x47f821 AND $0x7,%R10D |
(742) 0x47f825 VADDPD %XMM11,%XMM13,%XMM14 |
(742) 0x47f82a VUNPCKHPD %XMM14,%XMM14,%XMM0 |
(742) 0x47f82f VADDPD %XMM14,%XMM0,%XMM2 |
(742) 0x47f834 VADDSD %XMM2,%XMM10,%XMM2 |
(742) 0x47f838 JE 480c55 |
(742) 0x47f83e MOV -0x230(%RBP),%R9 |
(742) 0x47f845 SUB %RCX,%R9 |
(742) 0x47f848 LEA -0x1(%R9),%R10 |
(742) 0x47f84c CMP $0x2,%R10 |
(742) 0x47f850 JBE 480cc4 |
(742) 0x47f856 MOV -0x260(%RBP),%R10 |
(742) 0x47f85d VPBROADCASTQ -0x130(%RBP),%YMM11 |
(742) 0x47f866 KXNORB %K4,%K4,%K4 |
(742) 0x47f86a VBROADCASTSD %XMM9,%YMM12 |
(742) 0x47f86f VXORPD %XMM2,%XMM2,%XMM2 |
(742) 0x47f873 ADD %R10,%RCX |
(742) 0x47f876 MOV -0x1b0(%RBP),%R10 |
(742) 0x47f87d VMOVDQU (%R10,%RCX,8),%YMM13 |
(742) 0x47f883 MOV -0x60(%RBP),%R10 |
(742) 0x47f887 VMOVDQA %YMM13,-0x230(%RBP) |
(742) 0x47f88f VPGATHERQQ (%R10,%YMM13,8),%YMM14{%K4} |
(742) 0x47f896 VMOVAPD -0x310(%RBP),%YMM13 |
(742) 0x47f89e MOV -0x1b8(%RBP),%R10 |
(742) 0x47f8a5 VPCMPNLTQ %YMM11,%YMM14,%K6 |
(742) 0x47f8ac VMOVUPD (%R10,%RCX,8),%YMM13{%K6} |
(742) 0x47f8b3 MOV %R9,%RCX |
(742) 0x47f8b6 VMULPD %YMM13,%YMM12,%YMM0 |
(742) 0x47f8bb VMOVAPD %YMM13,-0x310(%RBP) |
(742) 0x47f8c3 AND $-0x4,%RCX |
(742) 0x47f8c7 ADD %RCX,%R8 |
(742) 0x47f8ca AND $0x3,%R9D |
(742) 0x47f8ce VCMPPD $0x1,%YMM2,%YMM0,%K7{%K6} |
(742) 0x47f8d5 VBLENDMPD %YMM13,%YMM2,%YMM12{%K7} |
(742) 0x47f8db VADDPD %YMM12,%YMM1,%YMM1 |
(742) 0x47f8e0 VEXTRACTF64X2 $0x1,%YMM1,%XMM14 |
(742) 0x47f8e7 VADDPD %XMM1,%XMM14,%XMM11 |
(742) 0x47f8eb VUNPCKHPD %XMM11,%XMM11,%XMM13 |
(742) 0x47f8f0 VADDPD %XMM11,%XMM13,%XMM0 |
(742) 0x47f8f5 VADDSD %XMM0,%XMM10,%XMM10 |
(742) 0x47f8f9 JE 47e6bb |
(742) 0x47f8ff MOV -0x1b0(%RBP),%R10 |
(742) 0x47f906 LEA (,%R8,8),%R9 |
(742) 0x47f90e MOV -0x130(%RBP),%RCX |
(742) 0x47f915 MOV %R9,-0x230(%RBP) |
(742) 0x47f91c MOV (%R10,%R8,8),%R9 |
(742) 0x47f920 MOV -0x60(%RBP),%R10 |
(742) 0x47f924 CMP %RCX,(%R10,%R9,8) |
(742) 0x47f928 JL 47f94b |
(742) 0x47f92a MOV -0x1b8(%RBP),%R9 |
(742) 0x47f931 VXORPD %XMM2,%XMM2,%XMM2 |
(742) 0x47f935 VMOVSD (%R9,%R8,8),%XMM12 |
(742) 0x47f93b VMULSD %XMM9,%XMM12,%XMM1 |
(742) 0x47f940 VCOMISD %XMM1,%XMM2 |
(742) 0x47f944 JBE 47f94b |
(742) 0x47f946 VADDSD %XMM12,%XMM10,%XMM10 |
(742) 0x47f94b LEA 0x1(%R8),%R10 |
(742) 0x47f94f CMP %R10,-0x268(%RBP) |
(742) 0x47f956 JLE 47e6bb |
(742) 0x47f95c MOV -0x1b0(%RBP),%RCX |
(742) 0x47f963 MOV -0x230(%RBP),%R9 |
(742) 0x47f96a MOV -0x130(%RBP),%R10 |
(742) 0x47f971 MOV 0x8(%RCX,%R9,1),%R9 |
(742) 0x47f976 MOV -0x60(%RBP),%RCX |
(742) 0x47f97a CMP %R10,(%RCX,%R9,8) |
(742) 0x47f97e JL 47f9ab |
(742) 0x47f980 MOV -0x1b8(%RBP),%R9 |
(742) 0x47f987 MOV -0x230(%RBP),%RCX |
(742) 0x47f98e VXORPD %XMM13,%XMM13,%XMM13 |
(742) 0x47f993 VMOVSD 0x8(%R9,%RCX,1),%XMM14 |
(742) 0x47f99a VMULSD %XMM9,%XMM14,%XMM11 |
(742) 0x47f99f VCOMISD %XMM11,%XMM13 |
(742) 0x47f9a4 JBE 47f9ab |
(742) 0x47f9a6 VADDSD %XMM14,%XMM10,%XMM10 |
(742) 0x47f9ab MOV -0x268(%RBP),%R10 |
(742) 0x47f9b2 ADD $0x2,%R8 |
(742) 0x47f9b6 CMP %R10,%R8 |
(742) 0x47f9b9 JGE 47e6bb |
(742) 0x47f9bf MOV -0x1b0(%RBP),%R8 |
(742) 0x47f9c6 MOV -0x230(%RBP),%R9 |
(742) 0x47f9cd MOV -0x60(%RBP),%RCX |
(742) 0x47f9d1 MOV -0x130(%RBP),%R10 |
(742) 0x47f9d8 MOV 0x10(%R8,%R9,1),%R8 |
(742) 0x47f9dd CMP (%RCX,%R8,8),%R10 |
(742) 0x47f9e1 JG 47e6bb |
(742) 0x47f9e7 MOV -0x1b8(%RBP),%R8 |
(742) 0x47f9ee VXORPD %XMM1,%XMM1,%XMM1 |
(742) 0x47f9f2 VMOVSD 0x10(%R8,%R9,1),%XMM0 |
(742) 0x47f9f9 VMULSD %XMM0,%XMM9,%XMM12 |
(742) 0x47f9fd VCOMISD %XMM12,%XMM1 |
(742) 0x47fa02 JBE 47e6bb |
(742) 0x47fa08 VADDSD %XMM0,%XMM10,%XMM10 |
(742) 0x47fa0c JMP 47e6bb |
(739) 0x47fa11 NOT %RDI |
(739) 0x47fa14 CMP (%RDX,%RDI,8),%R15 |
(739) 0x47fa18 JG 47fa27 |
(739) 0x47fa1a MOV -0x248(%RBP),%R10 |
(739) 0x47fa21 VADDSD (%R10,%RSI,8),%XMM8,%XMM8 |
(739) 0x47fa27 INC %RSI |
(739) 0x47fa2a CMP %RSI,-0x190(%RBP) |
(739) 0x47fa31 JE 47fb32 |
(739) 0x47fa37 MOV -0x240(%RBP),%R9 |
(739) 0x47fa3e MOV -0x1a8(%RBP),%RDI |
(739) 0x47fa45 MOV %RAX,-0x230(%RBP) |
(739) 0x47fa4c MOV %RCX,-0x250(%RBP) |
(739) 0x47fa53 MOV -0x1c0(%RBP),%R10 |
(739) 0x47fa5a MOV -0x248(%RBP),%RCX |
(740) 0x47fa61 MOV (%R9,%RSI,8),%RAX |
(740) 0x47fa65 CMP %RAX,%RDI |
(740) 0x47fa68 JLE 47fe28 |
(740) 0x47fa6e CMP %RAX,%R10 |
(740) 0x47fa71 JG 47fe28 |
(740) 0x47fa77 SUB %R10,%RAX |
(740) 0x47fa7a CMP (%R14,%RAX,8),%R13 |
(740) 0x47fa7e JLE 47fa85 |
(740) 0x47fa80 CMP %RAX,%R8 |
(740) 0x47fa83 JNE 47fa8a |
(740) 0x47fa85 VADDSD (%RCX,%RSI,8),%XMM8,%XMM8 |
(740) 0x47fa8a LEA 0x1(%RSI),%RAX |
(740) 0x47fa8e MOV (%R9,%RAX,8),%RSI |
(740) 0x47fa92 CMP %RSI,%RDI |
(740) 0x47fa95 JLE 47fe10 |
(740) 0x47fa9b CMP %RSI,%R10 |
(740) 0x47fa9e JG 47fe10 |
(740) 0x47faa4 SUB %R10,%RSI |
(740) 0x47faa7 CMP (%R14,%RSI,8),%R13 |
(740) 0x47faab JLE 47fab2 |
(740) 0x47faad CMP %RSI,%R8 |
(740) 0x47fab0 JNE 47fab7 |
(740) 0x47fab2 VADDSD (%RCX,%RAX,8),%XMM8,%XMM8 |
(740) 0x47fab7 LEA 0x1(%RAX),%R12 |
(740) 0x47fabb MOV (%R9,%R12,8),%RSI |
(740) 0x47fabf CMP %RSI,%RDI |
(740) 0x47fac2 JLE 47fdf8 |
(740) 0x47fac8 CMP %RSI,%R10 |
(740) 0x47facb JG 47fdf8 |
(740) 0x47fad1 SUB %R10,%RSI |
(740) 0x47fad4 CMP (%R14,%RSI,8),%R13 |
(740) 0x47fad8 JLE 47fadf |
(740) 0x47fada CMP %RSI,%R8 |
(740) 0x47fadd JNE 47fae5 |
(740) 0x47fadf VADDSD (%RCX,%R12,8),%XMM8,%XMM8 |
(740) 0x47fae5 LEA 0x2(%RAX),%R12 |
(740) 0x47fae9 MOV (%R9,%R12,8),%RSI |
(740) 0x47faed CMP %RSI,%RDI |
(740) 0x47faf0 JLE 47fde0 |
(740) 0x47faf6 CMP %RSI,%R10 |
(740) 0x47faf9 JG 47fde0 |
(740) 0x47faff SUB %R10,%RSI |
(740) 0x47fb02 CMP (%R14,%RSI,8),%R13 |
(740) 0x47fb06 JLE 47fb0d |
(740) 0x47fb08 CMP %RSI,%R8 |
(740) 0x47fb0b JNE 47fb13 |
(740) 0x47fb0d VADDSD (%RCX,%R12,8),%XMM8,%XMM8 |
(740) 0x47fb13 LEA 0x3(%RAX),%RSI |
(740) 0x47fb17 CMP %RSI,-0x190(%RBP) |
(740) 0x47fb1e JNE 47fa61 |
(739) 0x47fb24 MOV -0x230(%RBP),%RAX |
(739) 0x47fb2b MOV -0x250(%RBP),%RCX |
(739) 0x47fb32 VXORPD %XMM1,%XMM1,%XMM1 |
(739) 0x47fb36 VCOMISD %XMM1,%XMM8 |
(739) 0x47fb3a JE 47f26a |
(739) 0x47fb40 MOV -0x208(%RBP),%R9 |
(739) 0x47fb47 MOV -0x240(%RBP),%RDI |
(739) 0x47fb4e MOV -0x190(%RBP),%RSI |
(739) 0x47fb55 VMOVSD (%RCX),%XMM12 |
(739) 0x47fb59 SAL $0x3,%R9 |
(739) 0x47fb5d MOV -0x248(%RBP),%R10 |
(739) 0x47fb64 LEA (%RDI,%R9,1),%R12 |
(739) 0x47fb68 LEA (%RDI,%RSI,8),%RDI |
(739) 0x47fb6c VDIVSD %XMM8,%XMM12,%XMM2 |
(739) 0x47fb71 MOV %RDI,-0x190(%RBP) |
(739) 0x47fb78 SUB %R12,%RDI |
(739) 0x47fb7b ADD %R10,%R9 |
(739) 0x47fb7e SUB $0x8,%RDI |
(739) 0x47fb82 SHR $0x3,%RDI |
(739) 0x47fb86 INC %RDI |
(739) 0x47fb89 AND $0x3,%EDI |
(739) 0x47fb8c JE 47fcc3 |
(739) 0x47fb92 CMP $0x1,%RDI |
(739) 0x47fb96 JE 47fc58 |
(739) 0x47fb9c CMP $0x2,%RDI |
(739) 0x47fba0 JE 47fbfd |
(739) 0x47fba2 MOV (%R12),%RSI |
(739) 0x47fba6 CMP %RSI,-0x1a8(%RBP) |
(739) 0x47fbad JLE 480d30 |
(739) 0x47fbb3 MOV -0x1c0(%RBP),%R10 |
(739) 0x47fbba CMP %RSI,%R10 |
(739) 0x47fbbd JG 480d30 |
(739) 0x47fbc3 SUB %R10,%RSI |
(739) 0x47fbc6 MOV %RSI,%RDI |
(739) 0x47fbc9 MOV (%R14,%RSI,8),%RSI |
(739) 0x47fbcd CMP %RSI,%R13 |
(739) 0x47fbd0 JG 47fbeb |
(739) 0x47fbd2 MOV -0xb0(%RBP),%R10 |
(739) 0x47fbd9 VMOVSD (%R9),%XMM14 |
(739) 0x47fbde LEA (%R10,%RSI,8),%RSI |
(739) 0x47fbe2 VFMADD213SD (%RSI),%XMM2,%XMM14 |
(739) 0x47fbe7 VMOVSD %XMM14,(%RSI) |
(739) 0x47fbeb CMP %RDI,%R8 |
(739) 0x47fbee JNE 47fbf5 |
(739) 0x47fbf0 VFMADD231SD (%R9),%XMM2,%XMM4 |
(739) 0x47fbf5 ADD $0x8,%R12 |
(739) 0x47fbf9 ADD $0x8,%R9 |
(739) 0x47fbfd MOV (%R12),%RSI |
(739) 0x47fc01 CMP %RSI,-0x1a8(%RBP) |
(739) 0x47fc08 JLE 480ccd |
(739) 0x47fc0e MOV -0x1c0(%RBP),%R10 |
(739) 0x47fc15 CMP %RSI,%R10 |
(739) 0x47fc18 JG 480ccd |
(739) 0x47fc1e SUB %R10,%RSI |
(739) 0x47fc21 MOV %RSI,%RDI |
(739) 0x47fc24 MOV (%R14,%RSI,8),%RSI |
(739) 0x47fc28 CMP %RSI,%R13 |
(739) 0x47fc2b JG 47fc46 |
(739) 0x47fc2d MOV -0xb0(%RBP),%R10 |
(739) 0x47fc34 VMOVSD (%R9),%XMM11 |
(739) 0x47fc39 LEA (%R10,%RSI,8),%RSI |
(739) 0x47fc3d VFMADD213SD (%RSI),%XMM2,%XMM11 |
(739) 0x47fc42 VMOVSD %XMM11,(%RSI) |
(739) 0x47fc46 CMP %RDI,%R8 |
(739) 0x47fc49 JNE 47fc50 |
(739) 0x47fc4b VFMADD231SD (%R9),%XMM2,%XMM4 |
(739) 0x47fc50 ADD $0x8,%R12 |
(739) 0x47fc54 ADD $0x8,%R9 |
(739) 0x47fc58 MOV (%R12),%RSI |
(739) 0x47fc5c CMP %RSI,-0x1a8(%RBP) |
(739) 0x47fc63 JLE 480bf6 |
(739) 0x47fc69 MOV -0x1c0(%RBP),%R10 |
(739) 0x47fc70 CMP %RSI,%R10 |
(739) 0x47fc73 JG 480bf6 |
(739) 0x47fc79 SUB %R10,%RSI |
(739) 0x47fc7c MOV %RSI,%RDI |
(739) 0x47fc7f MOV (%R14,%RSI,8),%RSI |
(739) 0x47fc83 CMP %RSI,%R13 |
(739) 0x47fc86 JG 47fca1 |
(739) 0x47fc88 MOV -0xb0(%RBP),%R10 |
(739) 0x47fc8f VMOVSD (%R9),%XMM0 |
(739) 0x47fc94 LEA (%R10,%RSI,8),%RSI |
(739) 0x47fc98 VFMADD213SD (%RSI),%XMM2,%XMM0 |
(739) 0x47fc9d VMOVSD %XMM0,(%RSI) |
(739) 0x47fca1 CMP %RDI,%R8 |
(739) 0x47fca4 JNE 47fcab |
(739) 0x47fca6 VFMADD231SD (%R9),%XMM2,%XMM4 |
(739) 0x47fcab MOV -0x190(%RBP),%RSI |
(739) 0x47fcb2 ADD $0x8,%R12 |
(739) 0x47fcb6 ADD $0x8,%R9 |
(739) 0x47fcba CMP %RSI,%R12 |
(739) 0x47fcbd JE 47f202 |
(739) 0x47fcc3 MOV %RCX,-0x230(%RBP) |
(739) 0x47fcca MOV -0x1c0(%RBP),%R10 |
(739) 0x47fcd1 MOV %RAX,-0x208(%RBP) |
(739) 0x47fcd8 MOV -0x1a8(%RBP),%RAX |
(741) 0x47fcdf MOV (%R12),%RSI |
(741) 0x47fce3 CMP %RSI,%RAX |
(741) 0x47fce6 JLE 480a8e |
(741) 0x47fcec CMP %RSI,%R10 |
(741) 0x47fcef JG 480a8e |
(741) 0x47fcf5 SUB %R10,%RSI |
(741) 0x47fcf8 MOV (%R14,%RSI,8),%RDI |
(741) 0x47fcfc CMP %RDI,%R13 |
(741) 0x47fcff JLE 480b26 |
(741) 0x47fd05 CMP %RSI,%R8 |
(741) 0x47fd08 JNE 47fd0f |
(741) 0x47fd0a VFMADD231SD (%R9),%XMM2,%XMM4 |
(741) 0x47fd0f MOV 0x8(%R12),%RSI |
(741) 0x47fd14 LEA 0x8(%R12),%RDI |
(741) 0x47fd19 ADD $0x8,%R9 |
(741) 0x47fd1d CMP %RSI,%RAX |
(741) 0x47fd20 JLE 480a67 |
(741) 0x47fd26 CMP %RSI,%R10 |
(741) 0x47fd29 JG 480a67 |
(741) 0x47fd2f SUB %R10,%RSI |
(741) 0x47fd32 MOV (%R14,%RSI,8),%R12 |
(741) 0x47fd36 CMP %R12,%R13 |
(741) 0x47fd39 JLE 480b05 |
(741) 0x47fd3f CMP %RSI,%R8 |
(741) 0x47fd42 JNE 47fd49 |
(741) 0x47fd44 VFMADD231SD (%R9),%XMM2,%XMM4 |
(741) 0x47fd49 MOV 0x8(%RDI),%RSI |
(741) 0x47fd4d CMP %RSI,%RAX |
(741) 0x47fd50 JLE 480a3f |
(741) 0x47fd56 CMP %RSI,%R10 |
(741) 0x47fd59 JG 480a3f |
(741) 0x47fd5f SUB %R10,%RSI |
(741) 0x47fd62 MOV (%R14,%RSI,8),%R12 |
(741) 0x47fd66 CMP %R12,%R13 |
(741) 0x47fd69 JLE 480ae3 |
(741) 0x47fd6f CMP %RSI,%R8 |
(741) 0x47fd72 JNE 47fd7a |
(741) 0x47fd74 VFMADD231SD 0x8(%R9),%XMM2,%XMM4 |
(741) 0x47fd7a MOV 0x10(%RDI),%RSI |
(741) 0x47fd7e CMP %RSI,%RAX |
(741) 0x47fd81 JLE 480a17 |
(741) 0x47fd87 CMP %RSI,%R10 |
(741) 0x47fd8a JG 480a17 |
(741) 0x47fd90 SUB %R10,%RSI |
(741) 0x47fd93 MOV (%R14,%RSI,8),%R12 |
(741) 0x47fd97 CMP %R12,%R13 |
(741) 0x47fd9a JLE 480ac1 |
(741) 0x47fda0 CMP %RSI,%R8 |
(741) 0x47fda3 JNE 47fdab |
(741) 0x47fda5 VFMADD231SD 0x10(%R9),%XMM2,%XMM4 |
(741) 0x47fdab LEA 0x18(%RDI),%R12 |
(741) 0x47fdaf MOV -0x190(%RBP),%RDI |
(741) 0x47fdb6 ADD $0x18,%R9 |
(741) 0x47fdba CMP %RDI,%R12 |
(741) 0x47fdbd JNE 47fcdf |
(739) 0x47fdc3 MOV -0x208(%RBP),%RAX |
(739) 0x47fdca MOV -0x230(%RBP),%RCX |
(739) 0x47fdd1 JMP 47f202 |
0x47fdd6 NOPW %CS:(%RAX,%RAX,1) |
(740) 0x47fde0 NOT %RSI |
(740) 0x47fde3 CMP (%RDX,%RSI,8),%R15 |
(740) 0x47fde7 JG 47fb13 |
(740) 0x47fded JMP 47fb0d |
0x47fdf2 NOPW (%RAX,%RAX,1) |
(740) 0x47fdf8 NOT %RSI |
(740) 0x47fdfb CMP (%RDX,%RSI,8),%R15 |
(740) 0x47fdff JG 47fae5 |
(740) 0x47fe05 JMP 47fadf |
0x47fe0a NOPW (%RAX,%RAX,1) |
(740) 0x47fe10 NOT %RSI |
(740) 0x47fe13 CMP (%RDX,%RSI,8),%R15 |
(740) 0x47fe17 JG 47fab7 |
(740) 0x47fe1d JMP 47fab2 |
0x47fe22 NOPW (%RAX,%RAX,1) |
(740) 0x47fe28 NOT %RAX |
(740) 0x47fe2b CMP (%RDX,%RAX,8),%R15 |
(740) 0x47fe2f JG 47fa8a |
(740) 0x47fe35 JMP 47fa85 |
0x47fe3a NOPW (%RAX,%RAX,1) |
(742) 0x47fe40 MOV -0x1a0(%RBP),%R9 |
(742) 0x47fe47 MOV -0x190(%RBP),%RCX |
(742) 0x47fe4e VDIVSD %XMM10,%XMM2,%XMM0 |
(742) 0x47fe53 CMP %RCX,%R9 |
(742) 0x47fe56 JGE 47ff8a |
(742) 0x47fe5c SUB %R9,%RCX |
(742) 0x47fe5f VXORPD %XMM1,%XMM1,%XMM1 |
(742) 0x47fe63 AND $0x3,%ECX |
(742) 0x47fe66 JE 48075f |
(742) 0x47fe6c CMP $0x1,%RCX |
(742) 0x47fe70 JE 47fefe |
(742) 0x47fe76 CMP $0x2,%RCX |
(742) 0x47fe7a JE 47feca |
(742) 0x47fe7c MOV (%RDX,%R9,8),%RCX |
(742) 0x47fe80 MOV (%R14,%RCX,8),%R8 |
(742) 0x47fe84 CMP %R8,%R13 |
(742) 0x47fe87 JG 47feb0 |
(742) 0x47fe89 VMOVSD (%RBX,%R9,8),%XMM14 |
(742) 0x47fe8f VMULSD %XMM9,%XMM14,%XMM10 |
(742) 0x47fe94 VCOMISD %XMM10,%XMM1 |
(742) 0x47fe99 JBE 47feb9 |
(742) 0x47fe9b MOV -0xb0(%RBP),%R10 |
(742) 0x47fea2 LEA (%R10,%R8,8),%R9 |
(742) 0x47fea6 VFMADD213SD (%R9),%XMM0,%XMM14 |
(742) 0x47feab VMOVSD %XMM14,(%R9) |
(742) 0x47feb0 CMP %RCX,%R11 |
(742) 0x47feb3 JE 480d02 |
(742) 0x47feb9 MOV -0x1a0(%RBP),%R8 |
(742) 0x47fec0 INC %R8 |
(742) 0x47fec3 MOV %R8,-0x208(%RBP) |
(742) 0x47feca MOV -0x208(%RBP),%R10 |
(742) 0x47fed1 MOV (%RDX,%R10,8),%R9 |
(742) 0x47fed5 MOV (%R14,%R9,8),%RCX |
(742) 0x47fed9 CMP %RCX,%R13 |
(742) 0x47fedc JG 4809cd |
(742) 0x47fee2 VMOVSD (%RBX,%R10,8),%XMM12 |
(742) 0x47fee8 VMULSD %XMM9,%XMM12,%XMM2 |
(742) 0x47feed VCOMISD %XMM2,%XMM1 |
(742) 0x47fef1 JA 4809b8 |
(742) 0x47fef7 INCQ -0x208(%RBP) |
(742) 0x47fefe MOV -0x208(%RBP),%R10 |
(742) 0x47ff05 MOV (%RDX,%R10,8),%RCX |
(742) 0x47ff09 MOV (%R14,%RCX,8),%R8 |
(742) 0x47ff0d CMP %R8,%R13 |
(742) 0x47ff10 JG 480901 |
(742) 0x47ff16 VMOVSD (%RBX,%R10,8),%XMM11 |
(742) 0x47ff1c VMULSD %XMM9,%XMM11,%XMM13 |
(742) 0x47ff21 VCOMISD %XMM13,%XMM1 |
(742) 0x47ff26 JA 4808ec |
(742) 0x47ff2c INCQ -0x208(%RBP) |
(742) 0x47ff33 MOV -0x208(%RBP),%RCX |
(742) 0x47ff3a CMP %RCX,-0x190(%RBP) |
(742) 0x47ff41 JE 47ff8a |
(742) 0x47ff43 MOV %RAX,-0x1a0(%RBP) |
(742) 0x47ff4a MOV (%RDX,%RCX,8),%RAX |
(742) 0x47ff4e MOV (%R14,%RAX,8),%R8 |
(742) 0x47ff52 CMP %R8,%R13 |
(742) 0x47ff55 JLE 480778 |
(744) 0x47ff5b CMP %RAX,%R11 |
(744) 0x47ff5e JNE 48078d |
(744) 0x47ff64 VMOVSD (%RBX,%RCX,8),%XMM11 |
(744) 0x47ff69 VMULSD %XMM9,%XMM11,%XMM13 |
(744) 0x47ff6e VCOMISD %XMM13,%XMM1 |
(744) 0x47ff73 JBE 48078d |
(744) 0x47ff79 VFMADD231SD %XMM11,%XMM0,%XMM4 |
(744) 0x47ff7e JMP 48078d |
(742) 0x47ff83 MOV -0x1a0(%RBP),%RAX |
(742) 0x47ff8a CMPQ $0x1,-0x58(%RBP) |
(742) 0x47ff8f JLE 47db8a |
(742) 0x47ff95 MOV -0x238(%RBP),%RCX |
(742) 0x47ff9c MOV (%RCX,%RAX,8),%RAX |
(742) 0x47ffa0 MOV 0x8(%RCX,%RDI,1),%R9 |
(742) 0x47ffa5 CMP %R9,%RAX |
(742) 0x47ffa8 JGE 47db8a |
(742) 0x47ffae MOV -0x70(%RBP),%RDI |
(742) 0x47ffb2 MOV %R9,%R10 |
(742) 0x47ffb5 VXORPD %XMM1,%XMM1,%XMM1 |
(742) 0x47ffb9 SUB %RAX,%R10 |
(742) 0x47ffbc MOV 0xc8(%RDI),%R8 |
(742) 0x47ffc3 AND $0x7,%R10D |
(742) 0x47ffc7 JE 4801cd |
(742) 0x47ffcd CMP $0x1,%R10 |
(742) 0x47ffd1 JE 4801a1 |
(742) 0x47ffd7 CMP $0x2,%R10 |
(742) 0x47ffdb JE 48015c |
(742) 0x47ffe1 CMP $0x3,%R10 |
(742) 0x47ffe5 JE 480117 |
(742) 0x47ffeb CMP $0x4,%R10 |
(742) 0x47ffef JE 4800d3 |
(742) 0x47fff5 CMP $0x5,%R10 |
(742) 0x47fff9 JE 48008e |
(742) 0x47ffff CMP $0x6,%R10 |
(742) 0x480003 JE 480049 |
(742) 0x480005 MOV -0x1b0(%RBP),%RCX |
(742) 0x48000c MOV -0x60(%RBP),%RDI |
(742) 0x480010 MOV (%RCX,%RAX,8),%R10 |
(742) 0x480014 MOV (%RDI,%R10,8),%RCX |
(742) 0x480018 CMP %RCX,-0x130(%RBP) |
(742) 0x48001f JG 480046 |
(742) 0x480021 MOV -0x1b8(%RBP),%R10 |
(742) 0x480028 VMOVSD (%R10,%RAX,8),%XMM12 |
(742) 0x48002e VMULSD %XMM9,%XMM12,%XMM2 |
(742) 0x480033 VCOMISD %XMM2,%XMM1 |
(742) 0x480037 JBE 480046 |
(742) 0x480039 LEA (%R8,%RCX,8),%RDI |
(742) 0x48003d VFMADD213SD (%RDI),%XMM0,%XMM12 |
(742) 0x480042 VMOVSD %XMM12,(%RDI) |
(742) 0x480046 INC %RAX |
(742) 0x480049 MOV -0x1b0(%RBP),%RCX |
(742) 0x480050 MOV -0x60(%RBP),%RDI |
(742) 0x480054 MOV (%RCX,%RAX,8),%R10 |
(742) 0x480058 MOV (%RDI,%R10,8),%RCX |
(742) 0x48005c CMP %RCX,-0x130(%RBP) |
(742) 0x480063 JG 48008b |
(742) 0x480065 MOV -0x1b8(%RBP),%R10 |
(742) 0x48006c VMOVSD (%R10,%RAX,8),%XMM14 |
(742) 0x480072 VMULSD %XMM9,%XMM14,%XMM10 |
(742) 0x480077 VCOMISD %XMM10,%XMM1 |
(742) 0x48007c JBE 48008b |
(742) 0x48007e LEA (%R8,%RCX,8),%RDI |
(742) 0x480082 VFMADD213SD (%RDI),%XMM0,%XMM14 |
(742) 0x480087 VMOVSD %XMM14,(%RDI) |
(742) 0x48008b INC %RAX |
(742) 0x48008e MOV -0x1b0(%RBP),%RCX |
(742) 0x480095 MOV -0x60(%RBP),%RDI |
(742) 0x480099 MOV (%RCX,%RAX,8),%R10 |
(742) 0x48009d MOV (%RDI,%R10,8),%RCX |
(742) 0x4800a1 CMP %RCX,-0x130(%RBP) |
(742) 0x4800a8 JG 4800d0 |
(742) 0x4800aa MOV -0x1b8(%RBP),%R10 |
(742) 0x4800b1 VMOVSD (%R10,%RAX,8),%XMM11 |
(742) 0x4800b7 VMULSD %XMM9,%XMM11,%XMM13 |
(742) 0x4800bc VCOMISD %XMM13,%XMM1 |
(742) 0x4800c1 JBE 4800d0 |
(742) 0x4800c3 LEA (%R8,%RCX,8),%RDI |
(742) 0x4800c7 VFMADD213SD (%RDI),%XMM0,%XMM11 |
(742) 0x4800cc VMOVSD %XMM11,(%RDI) |
(742) 0x4800d0 INC %RAX |
(742) 0x4800d3 MOV -0x1b0(%RBP),%RCX |
(742) 0x4800da MOV -0x60(%RBP),%RDI |
(742) 0x4800de MOV (%RCX,%RAX,8),%R10 |
(742) 0x4800e2 MOV (%RDI,%R10,8),%RCX |
(742) 0x4800e6 CMP %RCX,-0x130(%RBP) |
(742) 0x4800ed JG 480114 |
(742) 0x4800ef MOV -0x1b8(%RBP),%R10 |
(742) 0x4800f6 VMOVSD (%R10,%RAX,8),%XMM12 |
(742) 0x4800fc VMULSD %XMM9,%XMM12,%XMM2 |
(742) 0x480101 VCOMISD %XMM2,%XMM1 |
(742) 0x480105 JBE 480114 |
(742) 0x480107 LEA (%R8,%RCX,8),%RDI |
(742) 0x48010b VFMADD213SD (%RDI),%XMM0,%XMM12 |
(742) 0x480110 VMOVSD %XMM12,(%RDI) |
(742) 0x480114 INC %RAX |
(742) 0x480117 MOV -0x1b0(%RBP),%RCX |
(742) 0x48011e MOV -0x60(%RBP),%RDI |
(742) 0x480122 MOV (%RCX,%RAX,8),%R10 |
(742) 0x480126 MOV (%RDI,%R10,8),%RCX |
(742) 0x48012a CMP %RCX,-0x130(%RBP) |
(742) 0x480131 JG 480159 |
(742) 0x480133 MOV -0x1b8(%RBP),%R10 |
(742) 0x48013a VMOVSD (%R10,%RAX,8),%XMM14 |
(742) 0x480140 VMULSD %XMM9,%XMM14,%XMM10 |
(742) 0x480145 VCOMISD %XMM10,%XMM1 |
(742) 0x48014a JBE 480159 |
(742) 0x48014c LEA (%R8,%RCX,8),%RDI |
(742) 0x480150 VFMADD213SD (%RDI),%XMM0,%XMM14 |
(742) 0x480155 VMOVSD %XMM14,(%RDI) |
(742) 0x480159 INC %RAX |
(742) 0x48015c MOV -0x1b0(%RBP),%RCX |
(742) 0x480163 MOV -0x60(%RBP),%RDI |
(742) 0x480167 MOV (%RCX,%RAX,8),%R10 |
(742) 0x48016b MOV (%RDI,%R10,8),%RCX |
(742) 0x48016f CMP %RCX,-0x130(%RBP) |
(742) 0x480176 JG 48019e |
(742) 0x480178 MOV -0x1b8(%RBP),%R10 |
(742) 0x48017f VMOVSD (%R10,%RAX,8),%XMM11 |
(742) 0x480185 VMULSD %XMM9,%XMM11,%XMM13 |
(742) 0x48018a VCOMISD %XMM13,%XMM1 |
(742) 0x48018f JBE 48019e |
(742) 0x480191 LEA (%R8,%RCX,8),%RDI |
(742) 0x480195 VFMADD213SD (%RDI),%XMM0,%XMM11 |
(742) 0x48019a VMOVSD %XMM11,(%RDI) |
(742) 0x48019e INC %RAX |
(742) 0x4801a1 MOV -0x1b0(%RBP),%RCX |
(742) 0x4801a8 MOV -0x60(%RBP),%RDI |
(742) 0x4801ac MOV (%RCX,%RAX,8),%R10 |
(742) 0x4801b0 MOV (%RDI,%R10,8),%RCX |
(742) 0x4801b4 CMP %RCX,-0x130(%RBP) |
(742) 0x4801bb JLE 480b7c |
(742) 0x4801c1 INC %RAX |
(742) 0x4801c4 CMP %RAX,%R9 |
(742) 0x4801c7 JE 47db8a |
(742) 0x4801cd MOV -0x1b0(%RBP),%RCX |
(742) 0x4801d4 MOV -0x130(%RBP),%RDI |
(742) 0x4801db MOV %R14,-0x190(%RBP) |
(742) 0x4801e2 MOV %RDX,-0x1a0(%RBP) |
(742) 0x4801e9 MOV -0x60(%RBP),%RDX |
(742) 0x4801ed MOV %RSI,-0x208(%RBP) |
(742) 0x4801f4 MOV -0x1b8(%RBP),%RSI |
(743) 0x4801fb MOV (%RCX,%RAX,8),%R14 |
(743) 0x4801ff MOV (%RDX,%R14,8),%R10 |
(743) 0x480203 CMP %R10,%RDI |
(743) 0x480206 JG 480227 |
(743) 0x480208 VMOVSD (%RSI,%RAX,8),%XMM14 |
(743) 0x48020d VMULSD %XMM9,%XMM14,%XMM10 |
(743) 0x480212 VCOMISD %XMM10,%XMM1 |
(743) 0x480217 JBE 480227 |
(743) 0x480219 LEA (%R8,%R10,8),%R14 |
(743) 0x48021d VFMADD213SD (%R14),%XMM0,%XMM14 |
(743) 0x480222 VMOVSD %XMM14,(%R14) |
(743) 0x480227 INC %RAX |
(743) 0x48022a MOV (%RCX,%RAX,8),%R10 |
(743) 0x48022e MOV (%RDX,%R10,8),%R14 |
(743) 0x480232 CMP %R14,%RDI |
(743) 0x480235 JG 480256 |
(743) 0x480237 VMOVSD (%RSI,%RAX,8),%XMM11 |
(743) 0x48023c VMULSD %XMM9,%XMM11,%XMM13 |
(743) 0x480241 VCOMISD %XMM13,%XMM1 |
(743) 0x480246 JBE 480256 |
(743) 0x480248 LEA (%R8,%R14,8),%R10 |
(743) 0x48024c VFMADD213SD (%R10),%XMM0,%XMM11 |
(743) 0x480251 VMOVSD %XMM11,(%R10) |
(743) 0x480256 LEA 0x1(%RAX),%R10 |
(743) 0x48025a MOV (%RCX,%R10,8),%R14 |
(743) 0x48025e MOV (%RDX,%R14,8),%R14 |
(743) 0x480262 CMP %R14,%RDI |
(743) 0x480265 JG 480286 |
(743) 0x480267 VMOVSD (%RSI,%R10,8),%XMM12 |
(743) 0x48026d VMULSD %XMM9,%XMM12,%XMM2 |
(743) 0x480272 VCOMISD %XMM2,%XMM1 |
(743) 0x480276 JBE 480286 |
(743) 0x480278 LEA (%R8,%R14,8),%R10 |
(743) 0x48027c VFMADD213SD (%R10),%XMM0,%XMM12 |
(743) 0x480281 VMOVSD %XMM12,(%R10) |
(743) 0x480286 LEA 0x2(%RAX),%R10 |
(743) 0x48028a MOV (%RCX,%R10,8),%R14 |
(743) 0x48028e MOV (%RDX,%R14,8),%R14 |
(743) 0x480292 CMP %R14,%RDI |
(743) 0x480295 JG 4802b7 |
(743) 0x480297 VMOVSD (%RSI,%R10,8),%XMM14 |
(743) 0x48029d VMULSD %XMM9,%XMM14,%XMM10 |
(743) 0x4802a2 VCOMISD %XMM10,%XMM1 |
(743) 0x4802a7 JBE 4802b7 |
(743) 0x4802a9 LEA (%R8,%R14,8),%R10 |
(743) 0x4802ad VFMADD213SD (%R10),%XMM0,%XMM14 |
(743) 0x4802b2 VMOVSD %XMM14,(%R10) |
(743) 0x4802b7 LEA 0x3(%RAX),%R10 |
(743) 0x4802bb MOV (%RCX,%R10,8),%R14 |
(743) 0x4802bf MOV (%RDX,%R14,8),%R14 |
(743) 0x4802c3 CMP %R14,%RDI |
(743) 0x4802c6 JG 4802e8 |
(743) 0x4802c8 VMOVSD (%RSI,%R10,8),%XMM11 |
(743) 0x4802ce VMULSD %XMM9,%XMM11,%XMM13 |
(743) 0x4802d3 VCOMISD %XMM13,%XMM1 |
(743) 0x4802d8 JBE 4802e8 |
(743) 0x4802da LEA (%R8,%R14,8),%R10 |
(743) 0x4802de VFMADD213SD (%R10),%XMM0,%XMM11 |
(743) 0x4802e3 VMOVSD %XMM11,(%R10) |
(743) 0x4802e8 LEA 0x4(%RAX),%R10 |
(743) 0x4802ec MOV (%RCX,%R10,8),%R14 |
(743) 0x4802f0 MOV (%RDX,%R14,8),%R14 |
(743) 0x4802f4 CMP %R14,%RDI |
(743) 0x4802f7 JG 480318 |
(743) 0x4802f9 VMOVSD (%RSI,%R10,8),%XMM12 |
(743) 0x4802ff VMULSD %XMM9,%XMM12,%XMM2 |
(743) 0x480304 VCOMISD %XMM2,%XMM1 |
(743) 0x480308 JBE 480318 |
(743) 0x48030a LEA (%R8,%R14,8),%R10 |
(743) 0x48030e VFMADD213SD (%R10),%XMM0,%XMM12 |
(743) 0x480313 VMOVSD %XMM12,(%R10) |
(743) 0x480318 LEA 0x5(%RAX),%R10 |
(743) 0x48031c MOV (%RCX,%R10,8),%R14 |
(743) 0x480320 MOV (%RDX,%R14,8),%R14 |
(743) 0x480324 CMP %R14,%RDI |
(743) 0x480327 JG 480349 |
(743) 0x480329 VMOVSD (%RSI,%R10,8),%XMM14 |
(743) 0x48032f VMULSD %XMM9,%XMM14,%XMM10 |
(743) 0x480334 VCOMISD %XMM10,%XMM1 |
(743) 0x480339 JBE 480349 |
(743) 0x48033b LEA (%R8,%R14,8),%R10 |
(743) 0x48033f VFMADD213SD (%R10),%XMM0,%XMM14 |
(743) 0x480344 VMOVSD %XMM14,(%R10) |
(743) 0x480349 LEA 0x6(%RAX),%R10 |
(743) 0x48034d MOV (%RCX,%R10,8),%R14 |
(743) 0x480351 MOV (%RDX,%R14,8),%R14 |
(743) 0x480355 CMP %R14,%RDI |
(743) 0x480358 JG 48037a |
(743) 0x48035a VMOVSD (%RSI,%R10,8),%XMM11 |
(743) 0x480360 VMULSD %XMM9,%XMM11,%XMM13 |
(743) 0x480365 VCOMISD %XMM13,%XMM1 |
(743) 0x48036a JBE 48037a |
(743) 0x48036c LEA (%R8,%R14,8),%R10 |
(743) 0x480370 VFMADD213SD (%R10),%XMM0,%XMM11 |
(743) 0x480375 VMOVSD %XMM11,(%R10) |
(743) 0x48037a ADD $0x7,%RAX |
(743) 0x48037e CMP %RAX,%R9 |
(743) 0x480381 JNE 4801fb |
(742) 0x480387 MOV -0x190(%RBP),%R14 |
(742) 0x48038e MOV -0x1a0(%RBP),%RDX |
(742) 0x480395 MOV -0x208(%RBP),%RSI |
(742) 0x48039c JMP 47db8a |
0x4803a1 NOPL (%RAX) |
(749) 0x4803a8 MOV %RDI,-0x1a0(%RBP) |
(749) 0x4803af MOV -0x128(%RBP),%R14 |
(749) 0x4803b6 MOV %RCX,-0x1c8(%RBP) |
(749) 0x4803bd MOV -0xf8(%RBP),%RCX |
(749) 0x4803c4 NOPL (%RAX) |
(750) 0x4803c8 MOV (%RCX,%RAX,8),%R8 |
(750) 0x4803cc CMPQ $0,(%R15,%R8,8) |
(750) 0x4803d1 LEA (,%R8,8),%R11 |
(750) 0x4803d9 JS 480402 |
(750) 0x4803db MOV -0x60(%RBP),%RDI |
(750) 0x4803df ADD %RDI,%R11 |
(750) 0x4803e2 CMP (%R11),%RDX |
(750) 0x4803e5 JLE 480402 |
(750) 0x4803e7 MOV %R14,(%R11) |
(750) 0x4803ea MOV -0x58(%RBP),%R11 |
(750) 0x4803ee MOV %R8,(%R11,%R14,8) |
(750) 0x4803f2 MOV -0x108(%RBP),%R8 |
(750) 0x4803f9 VMOVSD %XMM3,(%R8,%R14,8) |
(750) 0x4803ff INC %R14 |
(750) 0x480402 INC %RAX |
(750) 0x480405 CMP %RAX,(%RSI) |
(750) 0x480408 JG 4803c8 |
(749) 0x48040a MOV -0x1a0(%RBP),%RDI |
(749) 0x480411 MOV -0x1c8(%RBP),%RCX |
(749) 0x480418 MOV %R14,-0x128(%RBP) |
(749) 0x48041f MOV -0x190(%RBP),%R14 |
(749) 0x480426 JMP 47d92a |
0x48042b NOPL (%RAX,%RAX,1) |
(762) 0x480430 MOV %R10,-0x128(%RBP) |
(762) 0x480437 MOV %R8,-0x130(%RBP) |
(762) 0x48043e MOV %RSI,-0x2f0(%RBP) |
(762) 0x480445 MOV -0xf8(%RBP),%RSI |
(762) 0x48044c NOPL (%RAX) |
(763) 0x480450 MOV (%RSI,%RDX,8),%R9 |
(763) 0x480454 CMPQ $0,(%R15,%R9,8) |
(763) 0x480459 LEA (,%R9,8),%R12 |
(763) 0x480461 JS 48048e |
(763) 0x480463 MOV -0x60(%RBP),%R8 |
(763) 0x480467 ADD %R8,%R12 |
(763) 0x48046a MOV -0x38(%RBP),%R8 |
(763) 0x48046e MOV (%R12),%R10 |
(763) 0x480472 CMP %R10,(%R8,%RAX,8) |
(763) 0x480476 JLE 48048e |
(763) 0x480478 MOV -0xf0(%RBP),%R8 |
(763) 0x48047f MOVQ $0x1,(%R8,%R9,8) |
(763) 0x480487 MOV %RCX,(%R12) |
(763) 0x48048b INC %RCX |
(763) 0x48048e INC %RDX |
(763) 0x480491 CMP %RDX,(%RDI) |
(763) 0x480494 JG 480450 |
(762) 0x480496 MOV -0x128(%RBP),%R10 |
(762) 0x48049d MOV -0x130(%RBP),%R8 |
(762) 0x4804a4 MOV -0x2f0(%RBP),%RSI |
(762) 0x4804ab JMP 47cda8 |
0x4804b0 MOV $0x8,%ESI |
0x4804b5 MOV %RBX,%RDI |
0x4804b8 VMOVSD %XMM3,-0xb0(%RBP) |
0x4804c0 CALL 5b0890 <hypre_CAlloc> |
0x4804c5 MOV -0x70(%RBP),%R15 |
0x4804c9 MOV $0x8,%ESI |
0x4804ce MOV %RAX,0xc0(%R15) |
0x4804d5 MOV 0xe0(%R15),%RDI |
0x4804dc CALL 5b0890 <hypre_CAlloc> |
0x4804e1 MOV 0xe8(%R15),%RDI |
0x4804e8 VMOVSD -0xb0(%RBP),%XMM3 |
0x4804f0 MOV %RAX,0xb0(%R15) |
0x4804f7 TEST %RDI,%RDI |
0x4804fa JE 47ea6f |
0x480500 MOV $0x8,%ESI |
0x480505 VMOVSD %XMM3,-0xb0(%RBP) |
0x48050d CALL 5b0890 <hypre_CAlloc> |
0x480512 MOV -0x70(%RBP),%R12 |
0x480516 MOV $0x8,%ESI |
0x48051b MOV %RAX,0xd8(%R12) |
0x480523 MOV 0xe8(%R12),%RDI |
0x48052b CALL 5b0890 <hypre_CAlloc> |
0x480530 MOV 0x38(%R12),%RDI |
0x480535 VMOVSD -0xb0(%RBP),%XMM3 |
0x48053d MOV %RAX,0xc8(%R12) |
0x480545 CMPQ $0x1,(%RDI) |
0x480549 JG 47ea81 |
0x48054f JMP 47d775 |
(742) 0x480554 VADDSD %XMM12,%XMM10,%XMM10 |
(742) 0x480559 JMP 47e63c |
(742) 0x48055e VADDSD %XMM11,%XMM10,%XMM10 |
(742) 0x480563 JMP 47e673 |
(742) 0x480568 VADDSD %XMM0,%XMM10,%XMM10 |
(742) 0x48056c JMP 47e6b0 |
0x480571 VMOVSD %XMM3,-0xb0(%RBP) |
0x480579 CALL 5b3a30 <time_getWallclockSeconds> |
0x48057e MOV -0x70(%RBP),%R12 |
0x480582 MOV $0x5ba480,%EDI |
0x480587 MOV $0x1,%EAX |
0x48058c VSUBSD 0x178(%R12),%XMM0,%XMM0 |
0x480596 MOV 0x30(%R12),%R8 |
0x48059b MOV (%R8),%RSI |
0x48059e VMOVSD %XMM0,0x178(%R12) |
0x4805a8 CALL 5b0ac0 <hypre_printf> |
0x4805ad XOR %EDI,%EDI |
0x4805af CALL 4115b0 <fflush@plt> |
0x4805b4 CALL 5b3a30 <time_getWallclockSeconds> |
0x4805b9 VMOVSD -0xb0(%RBP),%XMM3 |
0x4805c1 VMOVSD %XMM0,0x178(%R12) |
0x4805cb JMP 47ea34 |
0x4805d0 MOV -0x40(%RBP),%RSI |
0x4805d4 LEA 0x1(%RSI),%RDI |
0x4805d8 SUB %RAX,%RSI |
0x4805db INC %RSI |
0x4805de AND $0x7,%ESI |
0x4805e1 JE 480cf5 |
0x4805e7 CMP $0x1,%RSI |
0x4805eb JE 4806a9 |
0x4805f1 CMP $0x2,%RSI |
0x4805f5 JE 480690 |
0x4805fb CMP $0x3,%RSI |
0x4805ff JE 480677 |
0x480601 CMP $0x4,%RSI |
0x480605 JE 48065e |
0x480607 CMP $0x5,%RSI |
0x48060b JE 480645 |
0x48060d CMP $0x6,%RSI |
0x480611 JE 48062c |
0x480613 MOV (%R11),%R12 |
0x480616 MOV -0x58(%RBP),%RCX |
0x48061a MOV -0x38(%RBP),%RBX |
0x48061e ADD %R12,(%RCX,%RAX,8) |
0x480622 MOV (%RDX),%R9 |
0x480625 ADD %R9,(%RBX,%RAX,8) |
0x480629 INC %RAX |
0x48062c MOV (%R11),%R8 |
0x48062f MOV -0x58(%RBP),%R15 |
0x480633 MOV -0x38(%RBP),%R12 |
0x480637 ADD %R8,(%R15,%RAX,8) |
0x48063b MOV (%RDX),%RSI |
0x48063e ADD %RSI,(%R12,%RAX,8) |
0x480642 INC %RAX |
0x480645 MOV (%R11),%RCX |
0x480648 MOV -0x58(%RBP),%R9 |
0x48064c MOV -0x38(%RBP),%RBX |
0x480650 ADD %RCX,(%R9,%RAX,8) |
0x480654 MOV (%RDX),%R8 |
0x480657 ADD %R8,(%RBX,%RAX,8) |
0x48065b INC %RAX |
0x48065e MOV (%R11),%R15 |
0x480661 MOV -0x58(%RBP),%RSI |
0x480665 MOV -0x38(%RBP),%RCX |
0x480669 ADD %R15,(%RSI,%RAX,8) |
0x48066d MOV (%RDX),%R12 |
0x480670 ADD %R12,(%RCX,%RAX,8) |
0x480674 INC %RAX |
0x480677 MOV (%R11),%R9 |
0x48067a MOV -0x58(%RBP),%R8 |
0x48067e MOV -0x38(%RBP),%RBX |
0x480682 ADD %R9,(%R8,%RAX,8) |
0x480686 MOV (%RDX),%R15 |
0x480689 ADD %R15,(%RBX,%RAX,8) |
0x48068d INC %RAX |
0x480690 MOV (%R11),%RSI |
0x480693 MOV -0x58(%RBP),%R12 |
0x480697 MOV -0x38(%RBP),%R9 |
0x48069b ADD %RSI,(%R12,%RAX,8) |
0x48069f MOV (%RDX),%RCX |
0x4806a2 ADD %RCX,(%R9,%RAX,8) |
0x4806a6 INC %RAX |
0x4806a9 MOV (%R11),%R8 |
0x4806ac MOV -0x58(%RBP),%R15 |
0x4806b0 MOV -0x38(%RBP),%RBX |
0x4806b4 ADD %R8,(%R15,%RAX,8) |
0x4806b8 MOV (%RDX),%RSI |
0x4806bb ADD %RSI,(%RBX,%RAX,8) |
0x4806bf INC %RAX |
0x4806c2 CMP %RDI,%RAX |
0x4806c5 JE 47d525 |
0x4806cb MOV -0x58(%RBP),%R12 |
(757) 0x4806cf MOV (%R11),%RCX |
(757) 0x4806d2 ADD %RCX,(%R12,%RAX,8) |
(757) 0x4806d6 MOV (%RDX),%R9 |
(757) 0x4806d9 ADD %R9,(%RBX,%RAX,8) |
(757) 0x4806dd MOV (%R11),%R8 |
(757) 0x4806e0 ADD %R8,0x8(%R12,%RAX,8) |
(757) 0x4806e5 MOV (%RDX),%R15 |
(757) 0x4806e8 ADD %R15,0x8(%RBX,%RAX,8) |
(757) 0x4806ed MOV (%R11),%RSI |
(757) 0x4806f0 ADD %RSI,0x10(%R12,%RAX,8) |
(757) 0x4806f5 MOV (%RDX),%RCX |
(757) 0x4806f8 ADD %RCX,0x10(%RBX,%RAX,8) |
(757) 0x4806fd MOV (%R11),%R9 |
(757) 0x480700 ADD %R9,0x18(%R12,%RAX,8) |
(757) 0x480705 MOV (%RDX),%R8 |
(757) 0x480708 ADD %R8,0x18(%RBX,%RAX,8) |
(757) 0x48070d MOV (%R11),%R15 |
(757) 0x480710 ADD %R15,0x20(%R12,%RAX,8) |
(757) 0x480715 MOV (%RDX),%RSI |
(757) 0x480718 ADD %RSI,0x20(%RBX,%RAX,8) |
(757) 0x48071d MOV (%R11),%RCX |
(757) 0x480720 ADD %RCX,0x28(%R12,%RAX,8) |
(757) 0x480725 MOV (%RDX),%R9 |
(757) 0x480728 ADD %R9,0x28(%RBX,%RAX,8) |
(757) 0x48072d MOV (%R11),%R8 |
(757) 0x480730 ADD %R8,0x30(%R12,%RAX,8) |
(757) 0x480735 MOV (%RDX),%R15 |
(757) 0x480738 ADD %R15,0x30(%RBX,%RAX,8) |
(757) 0x48073d MOV (%R11),%RSI |
(757) 0x480740 ADD %RSI,0x38(%R12,%RAX,8) |
(757) 0x480745 MOV (%RDX),%RCX |
(757) 0x480748 ADD %RCX,0x38(%RBX,%RAX,8) |
(757) 0x48074d ADD $0x8,%RAX |
(757) 0x480751 CMP %RDI,%RAX |
(757) 0x480754 JNE 4806cf |
0x48075a JMP 47d525 |
(742) 0x48075f MOV %RAX,-0x1a0(%RBP) |
(742) 0x480766 MOV -0x208(%RBP),%RCX |
(742) 0x48076d JMP 480814 |
0x480772 NOPW (%RAX,%RAX,1) |
(744) 0x480778 VMOVSD (%RBX,%RCX,8),%XMM14 |
(744) 0x48077d VMULSD %XMM9,%XMM14,%XMM10 |
(744) 0x480782 VCOMISD %XMM10,%XMM1 |
(744) 0x480787 JA 480987 |
(744) 0x48078d INC %RCX |
(744) 0x480790 MOV (%RDX,%RCX,8),%RAX |
(744) 0x480794 MOV (%R14,%RAX,8),%R8 |
(744) 0x480798 CMP %R8,%R13 |
(744) 0x48079b JG 4808b7 |
(744) 0x4807a1 VMOVSD (%RBX,%RCX,8),%XMM12 |
(744) 0x4807a6 VMULSD %XMM9,%XMM12,%XMM2 |
(744) 0x4807ab VCOMISD %XMM2,%XMM1 |
(744) 0x4807af JA 4808a2 |
(744) 0x4807b5 LEA 0x1(%RCX),%R8 |
(744) 0x4807b9 MOV (%RDX,%R8,8),%R9 |
(744) 0x4807bd MOV (%R14,%R9,8),%R10 |
(744) 0x4807c1 CMP %R10,%R13 |
(744) 0x4807c4 JG 48087a |
(744) 0x4807ca VMOVSD (%RBX,%R8,8),%XMM11 |
(744) 0x4807d0 VMULSD %XMM9,%XMM11,%XMM13 |
(744) 0x4807d5 VCOMISD %XMM13,%XMM1 |
(744) 0x4807da JA 480865 |
(744) 0x4807e0 LEA 0x2(%RCX),%R8 |
(744) 0x4807e4 MOV (%RDX,%R8,8),%R9 |
(744) 0x4807e8 MOV (%R14,%R9,8),%R10 |
(744) 0x4807ec CMP %R10,%R13 |
(744) 0x4807ef JG 480847 |
(744) 0x4807f1 VMOVSD (%RBX,%R8,8),%XMM14 |
(744) 0x4807f7 VMULSD %XMM9,%XMM14,%XMM10 |
(744) 0x4807fc VCOMISD %XMM10,%XMM1 |
(744) 0x480801 JA 480832 |
(744) 0x480803 ADD $0x3,%RCX |
(744) 0x480807 CMP %RCX,-0x190(%RBP) |
(744) 0x48080e JE 47ff83 |
(744) 0x480814 MOV (%RDX,%RCX,8),%RAX |
(744) 0x480818 MOV (%R14,%RAX,8),%R8 |
(744) 0x48081c CMP %R8,%R13 |
(744) 0x48081f JLE 480778 |
(744) 0x480825 JMP 47ff5b |
0x48082a VZEROUPPER |
0x48082d JMP 47d783 |
(744) 0x480832 MOV -0xb0(%RBP),%RAX |
(744) 0x480839 LEA (%RAX,%R10,8),%R10 |
(744) 0x48083d VFMADD213SD (%R10),%XMM0,%XMM14 |
(744) 0x480842 VMOVSD %XMM14,(%R10) |
(744) 0x480847 CMP %R9,%R11 |
(744) 0x48084a JNE 480803 |
(744) 0x48084c VMOVSD (%RBX,%R8,8),%XMM11 |
(744) 0x480852 VMULSD %XMM9,%XMM11,%XMM13 |
(744) 0x480857 VCOMISD %XMM13,%XMM1 |
(744) 0x48085c JBE 480803 |
(744) 0x48085e VFMADD231SD %XMM11,%XMM0,%XMM4 |
(744) 0x480863 JMP 480803 |
(744) 0x480865 MOV -0xb0(%RBP),%RAX |
(744) 0x48086c LEA (%RAX,%R10,8),%R10 |
(744) 0x480870 VFMADD213SD (%R10),%XMM0,%XMM11 |
(744) 0x480875 VMOVSD %XMM11,(%R10) |
(744) 0x48087a CMP %R9,%R11 |
(744) 0x48087d JNE 4807e0 |
(744) 0x480883 VMOVSD (%RBX,%R8,8),%XMM12 |
(744) 0x480889 VMULSD %XMM9,%XMM12,%XMM2 |
(744) 0x48088e VCOMISD %XMM2,%XMM1 |
(744) 0x480892 JBE 4807e0 |
(744) 0x480898 VFMADD231SD %XMM12,%XMM0,%XMM4 |
(744) 0x48089d JMP 4807e0 |
(744) 0x4808a2 MOV -0xb0(%RBP),%R9 |
(744) 0x4808a9 LEA (%R9,%R8,8),%R10 |
(744) 0x4808ad VFMADD213SD (%R10),%XMM0,%XMM12 |
(744) 0x4808b2 VMOVSD %XMM12,(%R10) |
(744) 0x4808b7 CMP %RAX,%R11 |
(744) 0x4808ba JNE 4807b5 |
(744) 0x4808c0 VMOVSD (%RBX,%RCX,8),%XMM14 |
(744) 0x4808c5 VMULSD %XMM9,%XMM14,%XMM10 |
(744) 0x4808ca VCOMISD %XMM10,%XMM1 |
(744) 0x4808cf JBE 4807b5 |
(744) 0x4808d5 VFMADD231SD %XMM14,%XMM0,%XMM4 |
(744) 0x4808da JMP 4807b5 |
0x4808df NOP |
(742) 0x4808e0 MOV -0x230(%RBP),%R8 |
(742) 0x4808e7 JMP 47e3dc |
(742) 0x4808ec MOV -0xb0(%RBP),%R9 |
(742) 0x4808f3 LEA (%R9,%R8,8),%R10 |
(742) 0x4808f7 VFMADD213SD (%R10),%XMM0,%XMM11 |
(742) 0x4808fc VMOVSD %XMM11,(%R10) |
(742) 0x480901 CMP %RCX,%R11 |
(742) 0x480904 JNE 47ff2c |
(742) 0x48090a MOV -0x208(%RBP),%RCX |
(742) 0x480911 VMOVSD (%RBX,%RCX,8),%XMM12 |
(742) 0x480916 VMULSD %XMM9,%XMM12,%XMM2 |
(742) 0x48091b VCOMISD %XMM2,%XMM1 |
(742) 0x48091f JBE 47ff2c |
(742) 0x480925 VFMADD231SD %XMM12,%XMM0,%XMM4 |
(742) 0x48092a JMP 47ff2c |
0x48092f MOV %RBX,%RAX |
0x480932 XOR %R15D,%R15D |
0x480935 JMP 47cfb0 |
0x48093a MOV (%R9),%RCX |
0x48093d MOV -0x260(%RBP),%R8 |
0x480944 VMOVSD %XMM3,-0xb0(%RBP) |
0x48094c MOV -0x48(%RBP),%RDX |
0x480950 MOV -0x268(%RBP),%RDI |
0x480957 CALL 54fbf0 <hypre_alt_insert_new_nodes> |
0x48095c VMOVSD -0xb0(%RBP),%XMM3 |
0x480964 MOV -0x70(%RBP),%RCX |
0x480968 MOV 0x130(%RCX),%R10 |
0x48096f CMPQ $0,(%R10) |
0x480973 JG 47d7c4 |
0x480979 JMP 47d7e0 |
(742) 0x48097e VMOVSD %XMM3,%XMM3,%XMM10 |
(742) 0x480982 JMP 47e6b0 |
(744) 0x480987 MOV -0xb0(%RBP),%R9 |
(744) 0x48098e LEA (%R9,%R8,8),%R10 |
(744) 0x480992 VFMADD213SD (%R10),%XMM0,%XMM14 |
(744) 0x480997 VMOVSD %XMM14,(%R10) |
(744) 0x48099c JMP 47ff5b |
(742) 0x4809a1 MOV -0x1a0(%RBP),%R8 |
(742) 0x4809a8 VMOVSD %XMM3,%XMM3,%XMM10 |
(742) 0x4809ac VXORPD %XMM11,%XMM11,%XMM11 |
(742) 0x4809b1 XOR %ECX,%ECX |
(742) 0x4809b3 JMP 47e56c |
(742) 0x4809b8 MOV -0xb0(%RBP),%R8 |
(742) 0x4809bf LEA (%R8,%RCX,8),%R10 |
(742) 0x4809c3 VFMADD213SD (%R10),%XMM0,%XMM12 |
(742) 0x4809c8 VMOVSD %XMM12,(%R10) |
(742) 0x4809cd CMP %R9,%R11 |
(742) 0x4809d0 JNE 47fef7 |
(742) 0x4809d6 MOV -0x208(%RBP),%R9 |
(742) 0x4809dd VMOVSD (%RBX,%R9,8),%XMM14 |
(742) 0x4809e3 VMULSD %XMM9,%XMM14,%XMM10 |
(742) 0x4809e8 VCOMISD %XMM10,%XMM1 |
(742) 0x4809ed JBE 47fef7 |
(742) 0x4809f3 VFMADD231SD %XMM14,%XMM0,%XMM4 |
(742) 0x4809f8 JMP 47fef7 |
0x4809fd VZEROUPPER |
0x480a00 JMP 47d525 |
(739) 0x480a05 NOT %RDI |
(739) 0x480a08 CMP (%RDX,%RDI,8),%R15 |
(739) 0x480a0c JG 47f4aa |
(739) 0x480a12 JMP 47f49d |
(741) 0x480a17 NOT %RSI |
(741) 0x480a1a MOV (%RDX,%RSI,8),%RSI |
(741) 0x480a1e CMP %RSI,%R15 |
(741) 0x480a21 JG 47fdab |
(741) 0x480a27 VMOVSD 0x10(%R9),%XMM13 |
(741) 0x480a2d LEA (%RBX,%RSI,8),%RCX |
(741) 0x480a31 VFMADD213SD (%RCX),%XMM2,%XMM13 |
(741) 0x480a36 VMOVSD %XMM13,(%RCX) |
(741) 0x480a3a JMP 47fdab |
(741) 0x480a3f NOT %RSI |
(741) 0x480a42 MOV (%RDX,%RSI,8),%RSI |
(741) 0x480a46 CMP %RSI,%R15 |
(741) 0x480a49 JG 47fd7a |
(741) 0x480a4f VMOVSD 0x8(%R9),%XMM10 |
(741) 0x480a55 LEA (%RBX,%RSI,8),%RCX |
(741) 0x480a59 VFMADD213SD (%RCX),%XMM2,%XMM10 |
(741) 0x480a5e VMOVSD %XMM10,(%RCX) |
(741) 0x480a62 JMP 47fd7a |
(741) 0x480a67 NOT %RSI |
(741) 0x480a6a MOV (%RDX,%RSI,8),%RSI |
(741) 0x480a6e CMP %RSI,%R15 |
(741) 0x480a71 JG 47fd49 |
(741) 0x480a77 VMOVSD (%R9),%XMM12 |
(741) 0x480a7c LEA (%RBX,%RSI,8),%RCX |
(741) 0x480a80 VFMADD213SD (%RCX),%XMM2,%XMM12 |
(741) 0x480a85 VMOVSD %XMM12,(%RCX) |
(741) 0x480a89 JMP 47fd49 |
(741) 0x480a8e NOT %RSI |
(741) 0x480a91 MOV (%RDX,%RSI,8),%RSI |
(741) 0x480a95 CMP %RSI,%R15 |
(741) 0x480a98 JG 47fd0f |
(741) 0x480a9e VMOVSD (%R9),%XMM8 |
(741) 0x480aa3 LEA (%RBX,%RSI,8),%RCX |
(741) 0x480aa7 VFMADD213SD (%RCX),%XMM2,%XMM8 |
(741) 0x480aac VMOVSD %XMM8,(%RCX) |
(741) 0x480ab0 JMP 47fd0f |
0x480ab5 MOV -0xb0(%RBP),%RBX |
0x480abc JMP 47e904 |
(741) 0x480ac1 MOV -0xb0(%RBP),%RCX |
(741) 0x480ac8 VMOVSD 0x10(%R9),%XMM11 |
(741) 0x480ace LEA (%RCX,%R12,8),%R12 |
(741) 0x480ad2 VFMADD213SD (%R12),%XMM2,%XMM11 |
(741) 0x480ad8 VMOVSD %XMM11,(%R12) |
(741) 0x480ade JMP 47fda0 |
(741) 0x480ae3 MOV -0xb0(%RBP),%RCX |
(741) 0x480aea VMOVSD 0x8(%R9),%XMM14 |
(741) 0x480af0 LEA (%RCX,%R12,8),%R12 |
(741) 0x480af4 VFMADD213SD (%R12),%XMM2,%XMM14 |
(741) 0x480afa VMOVSD %XMM14,(%R12) |
(741) 0x480b00 JMP 47fd6f |
(741) 0x480b05 MOV -0xb0(%RBP),%RCX |
(741) 0x480b0c VMOVSD (%R9),%XMM1 |
(741) 0x480b11 LEA (%RCX,%R12,8),%R12 |
(741) 0x480b15 VFMADD213SD (%R12),%XMM2,%XMM1 |
(741) 0x480b1b VMOVSD %XMM1,(%R12) |
(741) 0x480b21 JMP 47fd3f |
(741) 0x480b26 MOV -0xb0(%RBP),%RCX |
(741) 0x480b2d VMOVSD (%R9),%XMM7 |
(741) 0x480b32 LEA (%RCX,%RDI,8),%RDI |
(741) 0x480b36 VFMADD213SD (%RDI),%XMM2,%XMM7 |
(741) 0x480b3b VMOVSD %XMM7,(%RDI) |
(741) 0x480b3f JMP 47fd05 |
(736) 0x480b44 VMULPD (%RDX),%ZMM1,%ZMM7 |
(736) 0x480b4a ADD $0x40,%RDX |
(736) 0x480b4e VXORPD %ZMM12,%ZMM7,%ZMM14 |
(736) 0x480b54 VMOVUPD %ZMM14,-0x40(%RDX) |
(736) 0x480b5b JMP 47dcb6 |
(736) 0x480b60 VMULPD (%RSI),%ZMM9,%ZMM4 |
(736) 0x480b66 ADD $0x40,%RSI |
(736) 0x480b6a VXORPD %ZMM0,%ZMM4,%ZMM7 |
(736) 0x480b70 VMOVUPD %ZMM7,-0x40(%RSI) |
(736) 0x480b77 JMP 47df57 |
(742) 0x480b7c MOV -0x1b8(%RBP),%R10 |
(742) 0x480b83 VMOVSD (%R10,%RAX,8),%XMM12 |
(742) 0x480b89 VMULSD %XMM9,%XMM12,%XMM2 |
(742) 0x480b8e VCOMISD %XMM2,%XMM1 |
(742) 0x480b92 JBE 4801c1 |
(742) 0x480b98 LEA (%R8,%RCX,8),%RDI |
(742) 0x480b9c VFMADD213SD (%RDI),%XMM0,%XMM12 |
(742) 0x480ba1 VMOVSD %XMM12,(%RDI) |
(742) 0x480ba5 JMP 4801c1 |
0x480baa VMOVDQU64 (%R9),%ZMM6 |
0x480bb0 ADD $0x40,%RAX |
0x480bb4 VPSUBQ %ZMM12,%ZMM6,%ZMM0 |
0x480bba VMOVDQA64 %ZMM6,-0xb0(%RBP) |
0x480bc4 VMOVDQU64 %ZMM0,(%R9) |
0x480bca JMP 47ed25 |
0x480bcf VPADDQ (%R11),%ZMM12,%ZMM13 |
0x480bd5 ADD $0x40,%R10 |
0x480bd9 VMOVDQU64 %ZMM13,(%R11) |
0x480bdf JMP 47eb12 |
(739) 0x480be4 NOT %R9 |
(739) 0x480be7 CMP (%RDX,%R9,8),%R15 |
(739) 0x480beb JG 47f45d |
(739) 0x480bf1 JMP 47f449 |
(739) 0x480bf6 NOT %RSI |
(739) 0x480bf9 MOV (%RDX,%RSI,8),%RSI |
(739) 0x480bfd CMP %RSI,%R15 |
(739) 0x480c00 JG 47fcab |
(739) 0x480c06 VMOVSD (%R9),%XMM9 |
(739) 0x480c0b LEA (%RBX,%RSI,8),%R10 |
(739) 0x480c0f VFMADD213SD (%R10),%XMM2,%XMM9 |
(739) 0x480c14 VMOVSD %XMM9,(%R10) |
(739) 0x480c19 JMP 47fcab |
(739) 0x480c1e VXORPD %XMM7,%XMM7,%XMM7 |
(739) 0x480c22 VCOMISD %XMM7,%XMM3 |
(739) 0x480c26 JE 47f26a |
(739) 0x480c2c JMP 47f202 |
0x480c31 MOV -0x108(%RBP),%R12 |
0x480c38 CMP %R12,-0x40(%RBP) |
0x480c3c JG 47d525 |
0x480c42 JMP 47d760 |
(736) 0x480c47 XOR %EBX,%EBX |
(736) 0x480c49 JMP 47de0c |
(736) 0x480c4e XOR %EBX,%EBX |
(736) 0x480c50 JMP 47e0ac |
(742) 0x480c55 VMOVSD %XMM2,%XMM2,%XMM10 |
(742) 0x480c59 JMP 47e6bb |
0x480c5e MOV (%R9),%RCX |
0x480c61 MOV -0x260(%RBP),%R8 |
0x480c68 VMOVDQA64 %ZMM12,-0xf0(%RBP) |
0x480c72 MOV -0x48(%RBP),%RDX |
0x480c76 MOV -0x268(%RBP),%RDI |
0x480c7d VMOVSD %XMM3,-0xb0(%RBP) |
0x480c85 VZEROUPPER |
0x480c88 CALL 54fbf0 <hypre_alt_insert_new_nodes> |
0x480c8d VMOVSD -0xb0(%RBP),%XMM3 |
0x480c95 VMOVDQA64 -0xf0(%RBP),%ZMM12 |
0x480c9f JMP 47eccb |
(742) 0x480ca4 VMOVSD %XMM10,%XMM10,%XMM2 |
(742) 0x480ca8 VXORPD %XMM1,%XMM1,%XMM1 |
(742) 0x480cac XOR %ECX,%ECX |
(742) 0x480cae JMP 47f83e |
0x480cb3 XOR %ESI,%ESI |
0x480cb5 JMP 47ee87 |
0x480cba XOR %EAX,%EAX |
0x480cbc XOR %R12D,%R12D |
0x480cbf JMP 47ec12 |
(742) 0x480cc4 VMOVSD %XMM2,%XMM2,%XMM10 |
(742) 0x480cc8 JMP 47f8ff |
(739) 0x480ccd NOT %RSI |
(739) 0x480cd0 MOV (%RDX,%RSI,8),%RSI |
(739) 0x480cd4 CMP %RSI,%R15 |
(739) 0x480cd7 JG 47fc50 |
(739) 0x480cdd VMOVSD (%R9),%XMM13 |
(739) 0x480ce2 LEA (%RBX,%RSI,8),%R10 |
(739) 0x480ce6 VFMADD213SD (%R10),%XMM2,%XMM13 |
(739) 0x480ceb VMOVSD %XMM13,(%R10) |
(739) 0x480cf0 JMP 47fc50 |
0x480cf5 MOV -0x38(%RBP),%RBX |
0x480cf9 MOV -0x58(%RBP),%R12 |
0x480cfd JMP 4806cf |
(742) 0x480d02 MOV -0x1a0(%RBP),%RCX |
(742) 0x480d09 VMOVSD (%RBX,%RCX,8),%XMM11 |
(742) 0x480d0e VMULSD %XMM9,%XMM11,%XMM13 |
(742) 0x480d13 VCOMISD %XMM13,%XMM1 |
(742) 0x480d18 JBE 47feb9 |
(742) 0x480d1e VFMADD231SD %XMM11,%XMM0,%XMM4 |
(742) 0x480d23 JMP 47feb9 |
0x480d28 XOR %R9D,%R9D |
0x480d2b JMP 47d46a |
(739) 0x480d30 NOT %RSI |
(739) 0x480d33 MOV (%RDX,%RSI,8),%RSI |
(739) 0x480d37 CMP %RSI,%R15 |
(739) 0x480d3a JG 47fbf5 |
(739) 0x480d40 VMOVSD (%R9),%XMM10 |
(739) 0x480d45 LEA (%RBX,%RSI,8),%R10 |
(739) 0x480d49 VFMADD213SD (%R10),%XMM2,%XMM10 |
(739) 0x480d4e VMOVSD %XMM10,(%R10) |
(739) 0x480d53 JMP 47fbf5 |
0x480d58 NOPL (%RAX,%RAX,1) |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
○99.04 | gomp_thread_start | team.c:130 | libgomp.so.1.0.0 |
Path / |
Source file and lines | par_lr_interp.c:1196-1757 |
Module | exec |
nb instructions | 1058 |
nb uops | 1144 |
loop length | 5162 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 6 |
used ymm registers | 9 |
used zmm registers | 15 |
nb stack references | 43 |
micro-operation queue | 194.00 cycles |
front end | 194.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 76.20 | 76.20 | 137.67 | 137.67 | 107.50 | 76.20 | 76.20 | 107.50 | 107.50 | 107.50 | 76.20 | 137.67 |
cycles | 76.20 | 76.20 | 137.67 | 137.67 | 107.50 | 76.20 | 76.20 | 107.50 | 107.50 | 107.50 | 76.20 | 137.67 |
Cycles executing div or sqrt instructions | 10.00 |
FE+BE cycles | 211.03-211.02 |
Stall cycles | 0.00 |
Front-end | 194.00 |
Dispatch | 137.67 |
DIV/SQRT | 10.00 |
Overall L1 | 194.00 |
all | 25% |
load | 31% |
store | 20% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 5% |
all | 4% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 23% |
load | 26% |
store | 18% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 96% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 7% |
all | 31% |
load | 38% |
store | 29% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 93% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 13% |
all | 13% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 29% |
load | 34% |
store | 27% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 91% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 13% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x10(%RSP),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
PUSHQ -0x8(%R13) | 2 | 0 | 0 | 0.33 | 0.33 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0.33 | 5-12 | 0.62 |
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x308,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDI,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x158(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x140(%RDI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x138(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x128(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x120(%RDI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x118(%RDI),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x110(%RDI),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x170(%RDI),%XMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,-0x210(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x108(%RDI),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x168(%RDI),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x1f8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x160(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x150(%RDI),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,-0x260(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x148(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,-0x240(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,-0x258(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM6,-0x1d0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14,-0x248(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xf8(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xd0(%RDI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa8(%RAX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb8(%RDI),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa0(%RAX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R15,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RAX),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x90(%RAX),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x80(%RAX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%RAX),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RAX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%RAX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x60(%RAX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,-0x198(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RAX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RAX),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RAX),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,-0x1a8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,-0x1c0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0x1b0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0x238(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,-0x1b8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,-0x190(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,-0x200(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,-0x120(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RAX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RAX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RAX),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RAX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,-0x188(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%RAX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,-0x268(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,-0x178(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RAX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,-0x250(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0x180(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RSI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 47f290 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x28a0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x70(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x130(%RSI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R10),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 47f360 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2970> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R8,-0x1a0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM3,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 5b39c0 <hypre_GetThreadNum> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 5b39b0 <hypre_NumActiveThreads> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %R12,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVSD -0x128(%RBP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x1a0(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x100(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x1(%RSI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %RSI | 5 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 10 |
IMUL %RAX,%R9 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R9,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %RCX,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x130(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMOVE -0x100(%RBP),%RAX | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.50 |
CMP %R9,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JLE 48092f <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3f3f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x70(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x108(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x1c8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %R15D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R8,-0x208(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x38(%R10),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,-0x230(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x58(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 47ccab <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2bb> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RCX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x208(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x230(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x1c8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,-0x1c8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,-0x1a0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM0,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 411290 <GOMP_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x40(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x1c8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x118(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xb0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (,%R11,8),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,(%R9,%R11,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%R8,8),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDX,(%RDI,%R11,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,(%RSI,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x128(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,-0x1c8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R15,%R10,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xf0(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x208(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RBX,%R10,1),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDX,(%RBX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 411290 <GOMP_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x118(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xf0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x128(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD -0x130(%RBP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R15,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV -0x1a0(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 47e7a8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1db8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RCX,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM1,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 411290 <GOMP_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
TEST %R15,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
VMOVSD -0xf0(%RBP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x118(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x128(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x1c8(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JLE 47d760 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xd70> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x108(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RAX,-0x40(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 480c31 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x4241> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x40(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x108(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x8(%R10),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%RDI,%RDX,1),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %R9,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RSI,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%R15),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R15,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x2,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 4805d0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3be0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x38(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (,%RAX,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x58(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x8(%R12),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R8,%RSI,1),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R8,%RDI,1),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%RCX,%RDI,1),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%RCX,%RSI,1),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x40,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RBX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETAE %R8B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %R15,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SETAE %DIL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
OR %EDI,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R12,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETAE %DIL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %RBX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x58(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SETAE %BL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
OR %EBX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x38(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
AND %R8D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RCX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x208(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SETAE %R8B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADD %RBX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xf0(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RSI,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETAE %SIL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
OR %ESI,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
AND %EDI,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RCX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETAE %SIL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %R15,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETAE %R15B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
OR %R15D,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
TEST %SIL,%R8B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 4805d0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3be0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP %RCX,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETAE %R8B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %R12,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETAE %R12B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
OR %R8B,%R12B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 4805d0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3be0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x6,-0x130(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JBE 480d28 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x4338> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x118(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ (%R11),%ZMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPBROADCASTQ (%RDX),%ZMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
SHR $0x3,%R8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SAL $0x6,%R8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA -0x40(%R8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SHR $0x6,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
INC %RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $0x7,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 47d32f <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x93f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x1,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47d2ff <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x90f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x2,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47d2d8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x8e8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x3,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47d2b1 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x8c1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47d28a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x89a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x5,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47d263 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x873> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x6,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47d23c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x84c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VPADDQ (%RBX),%ZMM4,%ZMM2 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
MOV $0x40,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVDQU64 %ZMM2,(%RBX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPADDQ (%R9),%ZMM5,%ZMM7 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VMOVDQU64 %ZMM7,(%R9) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV -0xf0(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPADDQ (%RBX,%RSI,1),%ZMM4,%ZMM8 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VMOVDQU64 %ZMM8,(%RBX,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPADDQ (%R9,%RSI,1),%ZMM5,%ZMM9 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VMOVDQU64 %ZMM9,(%R9,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
ADD $0x40,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xf0(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPADDQ (%R15,%RSI,1),%ZMM4,%ZMM10 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VMOVDQU64 %ZMM10,(%R15,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPADDQ (%R9,%RSI,1),%ZMM5,%ZMM11 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VMOVDQU64 %ZMM11,(%R9,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
ADD $0x40,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xf0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPADDQ (%RCX,%RSI,1),%ZMM4,%ZMM12 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VMOVDQU64 %ZMM12,(%RCX,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPADDQ (%R9,%RSI,1),%ZMM5,%ZMM13 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VMOVDQU64 %ZMM13,(%R9,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
ADD $0x40,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xf0(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPADDQ (%R12,%RSI,1),%ZMM4,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VMOVDQU64 %ZMM14,(%R12,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPADDQ (%R9,%RSI,1),%ZMM5,%ZMM15 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VMOVDQU64 %ZMM15,(%R9,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
ADD $0x40,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xf0(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPADDQ (%RDI,%RSI,1),%ZMM4,%ZMM6 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VMOVDQU64 %ZMM6,(%RDI,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPADDQ (%R9,%RSI,1),%ZMM5,%ZMM0 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VMOVDQU64 %ZMM0,(%R9,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
ADD $0x40,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xf0(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPADDQ (%RBX,%RSI,1),%ZMM4,%ZMM1 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VMOVDQU64 %ZMM1,(%RBX,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPADDQ (%R9,%RSI,1),%ZMM5,%ZMM2 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VMOVDQU64 %ZMM2,(%R9,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
ADD $0x40,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R8,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47d43b <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xa4b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x118(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x8,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %R9,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST $0x7,%R8B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 4809fd <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x400d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SUB %R9,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%R8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R8,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x2,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 47d4c6 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xad6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x128(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ (%R11),%YMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
MOV (%RDX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R15,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x38(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SAL $0x3,%R9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
VPBROADCASTQ %RBX,%YMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%RCX,%R9,1),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RDI,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPADDQ (%R12),%YMM4,%YMM5 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VMOVDQU %YMM5,(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPADDQ (%R9),%YMM10,%YMM11 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VMOVDQU %YMM11,(%R9) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV -0x118(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %R8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
AND $0x3,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 4809fd <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x400d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R11),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (,%RAX,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x38(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R15,(%R12,%RSI,1) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV (%RDX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDI,(%RCX,%RSI,1) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
CMP %RAX,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 4809fd <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x400d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R11),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x8(%RSI),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x2,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD %R8,(%R12,%R9,1) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV (%RDX),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R15,(%RCX,%R9,1) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
CMP %RAX,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 4809fd <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x400d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R11),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x10,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD %RAX,(%R12,%RSI,1) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV (%RDX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDX,(%RCX,%RSI,1) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV -0x108(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV (%R11,%RAX,8),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOT %RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
AND $0x7,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
TEST %R12,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 47d564 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xb74> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x108(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD -0x8(%RBX,%R10,1),%R12 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %R12,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x108(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R15,-0x40(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 47d760 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xd70> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 47d69b <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xcab> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x1,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47d671 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xc81> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x2,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47d651 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xc61> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x3,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47d631 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xc41> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47d611 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xc21> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x5,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47d5f1 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xc01> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x6,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47d5d1 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xbe1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x48(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI,%R15,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 47d5ce <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xbde> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD -0x8(%RCX,%R10,1),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RSI,%R15,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x48(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDI,%R15,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 47d5ee <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xbfe> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD -0x8(%R11,%R10,1),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RDX,(%RDI,%R15,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x48(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12,%R15,8),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RBX,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 47d60e <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xc1e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD -0x8(%R9,%R10,1),%RBX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RBX,(%R12,%R15,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x48(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8,%R15,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RSI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 47d62e <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xc3e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD -0x8(%RAX,%R10,1),%RSI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RSI,(%R8,%R15,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x48(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDI,%R15,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 47d64e <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xc5e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD -0x8(%RCX,%R10,1),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RDX,(%RDI,%R15,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x48(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R11,%R15,8),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R12,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 47d66e <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xc7e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD -0x8(%RBX,%R10,1),%R12 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %R12,(%R11,%R15,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x48(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R9,%R15,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R8,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 47d68e <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xc9e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD -0x8(%RSI,%R10,1),%R8 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %R8,(%R9,%R15,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R15,-0x40(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 47d760 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xd70> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVSD %XMM3,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 411290 <GOMP_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
VMOVSD -0xb0(%RBP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0,-0x100(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 480964 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3f74> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x100(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R13,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVSD %XMM3,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%R8,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 4110a0 <memset@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x70(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD -0xb0(%RBP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x130(%RCX),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0,(%R10) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 47f320 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2930> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x60(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XOR %R15D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVSD %XMM3,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 411290 <GOMP_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x108(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD -0xb0(%RBP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RBX,-0x40(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 47e176 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1786> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x70(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $-0x2,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x48(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
KXNORB %K2,%K2,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV %RDX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD -0x1d0(%RBP),%XMM15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM6,%XMM6,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VXORPD %XMM5,%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xc0(%R11),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%R11),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x38(%R11),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x108(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 47d89d <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xead> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CMPQ $0,-0x100(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 47f350 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2960> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x70(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x130(%R8),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0,(%R14) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 47f300 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2910> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD $0x308,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
LEA -0x10(%R9),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP $0x1,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 47ea0c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x201c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x1,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R12,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
AND $0x7,%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 480ab5 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x40c5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x1,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47e8d3 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ee3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x2,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47e8ae <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ebe> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x3,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47e889 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1e99> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47e864 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1e74> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x5,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47e83f <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1e4f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x6,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47e81a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1e2a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R11),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xb0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x2,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R15,0x8(%R11) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV (%RDX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RAX,0x8(%RDX) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV (%RCX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,0x8(%RCX) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x8(%R11,%R12,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xb0(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDI,(%R11,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x8(%RBX,%R12,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R9,(%RBX,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x8(%RCX,%R12,8),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R10,(%RCX,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
INC %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x8(%R11,%R12,8),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R15,(%R11,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x8(%RAX,%R12,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDX,(%RAX,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x8(%RCX,%R12,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,(%RCX,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
INC %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x8(%R11,%R12,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xb0(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDI,(%R11,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x8(%RBX,%R12,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R9,(%RBX,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x8(%RCX,%R12,8),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R10,(%RCX,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
INC %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x8(%R11,%R12,8),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R15,(%R11,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x8(%RAX,%R12,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDX,(%RAX,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x8(%RCX,%R12,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,(%RCX,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
INC %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x8(%R11,%R12,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xb0(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDI,(%R11,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x8(%RBX,%R12,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R9,(%RBX,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x8(%RCX,%R12,8),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R10,(%RCX,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
INC %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x8(%R11,%R12,8),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R15,(%R11,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x8(%RAX,%R12,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDX,(%RAX,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x8(%RCX,%R12,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,(%RCX,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
INC %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R12,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47ea0c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x201c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVSD %XMM1,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 411290 <GOMP_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CALL 411290 <GOMP_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0x4,-0x250(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
VMOVSD -0xb0(%RBP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 480571 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3b81> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x100(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%R11,8),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%R11,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,0xe0(%R9) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,0xe8(%R9) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RBX,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 4804b0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3ac0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 480500 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3b10> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RDX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0x1,(%RSI) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 47d775 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xd85> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x70(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0,-0x100(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV 0x180(%R10),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x130(%R10),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JLE 48093a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3f4a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x100(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x1(%R15),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP $0x6,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 480cba <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x42ca> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SHR $0x3,%R15 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x48(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ -0x190(%RBP),%ZMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x6,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R11,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%RDX,%R11,1),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB $0x40,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x6,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
INC %RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $0x7,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 47eb7d <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x218d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x1,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47eb67 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2177> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x2,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47eb56 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2166> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x3,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47eb45 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2155> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47eb34 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2144> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x5,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47eb23 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2133> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x6,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 480bcf <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x41df> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VPADDQ (%R10),%ZMM12,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
ADD $0x40,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVDQU64 %ZMM14,-0x40(%R10) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPADDQ (%R10),%ZMM12,%ZMM15 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
ADD $0x40,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVDQU64 %ZMM15,-0x40(%R10) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPADDQ (%R10),%ZMM12,%ZMM6 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
ADD $0x40,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVDQU64 %ZMM6,-0x40(%R10) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPADDQ (%R10),%ZMM12,%ZMM0 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
ADD $0x40,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVDQU64 %ZMM0,-0x40(%R10) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPADDQ (%R10),%ZMM12,%ZMM1 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
ADD $0x40,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVDQU64 %ZMM1,-0x40(%R10) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPADDQ (%R10),%ZMM12,%ZMM2 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
ADD $0x40,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVDQU64 %ZMM2,-0x40(%R10) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
CMP %RDI,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47ebf8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2208> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x100(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RAX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RAX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 480c5e <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x426e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x100(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %R12,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%R15),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP $0x2,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 47ec53 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2263> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x48(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ -0x190(%RBP),%YMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%R11,%R12,8),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
AND $0x3,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
VPADDQ (%R12),%YMM14,%YMM15 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VMOVDQU %YMM15,(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
JE 47ec8d <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x229d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x48(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x190(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (,%RAX,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x1(%RAX),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x100(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R15,(%R8,%RDI,1) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
CMP %RCX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 47ec8d <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x229d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD $0x2,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD %R15,0x8(%R8,%RDI,1) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
CMP %RAX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 47ec8d <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x229d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %R15,0x10(%R8,%RDI,1) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV (%R9),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x260(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD %XMM3,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x268(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 54fbf0 <hypre_alt_insert_new_nodes> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMP $0x6,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD -0xb0(%RBP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JBE 480cb3 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x42c3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VPBROADCASTQ -0x190(%RBP),%ZMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
MOV -0x100(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SHR $0x3,%RBX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R9,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x6,%RBX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA (%RBX,%R9,1),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB $0x40,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x6,%RBX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
INC %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $0x7,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 47edb8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x23c8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x1,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47ed98 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x23a8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x2,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47ed81 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2391> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x3,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47ed6a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x237a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47ed53 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2363> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x5,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47ed3c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x234c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x6,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 480baa <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x41ba> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVDQU64 (%RAX),%ZMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VPSUBQ %ZMM12,%ZMM1,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VMOVDQU64 %ZMM2,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVDQU64 (%RAX),%ZMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VPSUBQ %ZMM12,%ZMM7,%ZMM8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VMOVDQU64 %ZMM8,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVDQU64 (%RAX),%ZMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VPSUBQ %ZMM12,%ZMM9,%ZMM4 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VMOVDQU64 %ZMM4,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVDQU64 (%RAX),%ZMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VPSUBQ %ZMM12,%ZMM5,%ZMM10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VMOVDQU64 %ZMM10,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVDQU64 (%RAX),%ZMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VPSUBQ %ZMM12,%ZMM11,%ZMM13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VMOVDQU64 %ZMM13,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVDQU64 (%RAX),%ZMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VPSUBQ %ZMM12,%ZMM14,%ZMM15 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VMOVDQU64 %ZMM15,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
CMP %R11,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47ee66 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2476> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x100(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x8,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RDI,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 48082a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3e3a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x100(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %RSI,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%R8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP $0x2,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 47eed5 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x24e5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x48(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ -0x190(%RBP),%YMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
MOV %R8,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%R10,%RSI,8),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %R15,-0x118(%RBP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
VMOVDQU (%R12),%YMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VPSUBQ %YMM12,%YMM1,%YMM2 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMOVDQU %YMM2,(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
TEST $0x3,%R8B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 48082a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3e3a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x118(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x190(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x100(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (,%R9,8),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x1(%R9),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %RSI,(%R11,%RBX,1) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
CMP %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 48082a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3e3a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD $0x2,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RSI,0x8(%R11,%RBX,1) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
CMP %R9,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 48082a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3e3a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SUB %RSI,0x10(%R11,%RBX,1) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 47d783 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xd93> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RSI,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM3,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 5b0890 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
TEST %R12,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
VMOVSD -0x40(%RBP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x108(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x118(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JLE 47cbc1 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1d1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA (,%R12,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4110a0 <memset@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
VMOVSD -0x40(%RBP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x108(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x118(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 47cbc1 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1d1> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x60(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x308,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
LEA -0x10(%R10),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP 5b0950 <hypre_Free> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VMOVSD %XMM3,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 411290 <GOMP_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x108(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD -0xb0(%RBP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R12,-0x40(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JG 47d806 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xe16> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R13,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 5b0950 <hypre_Free> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
JMP 47e184 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1794> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM3,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 5b0890 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x70(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD -0x40(%RBP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x108(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x118(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x130(%R15),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0,(%RDI) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 47cbd8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1e8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 47cbd8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1e8> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVSD %XMM3,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 5b0890 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x70(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0xc0(%R15) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe0(%R15),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 5b0890 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0xe8(%R15),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD -0xb0(%RBP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xb0(%R15) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 47ea6f <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x207f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD %XMM3,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 5b0890 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x70(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0xd8(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe8(%R12),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 5b0890 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x38(%R12),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD -0xb0(%RBP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xc8(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMPQ $0x1,(%RDI) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JG 47ea81 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2091> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 47d775 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xd85> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VMOVSD %XMM3,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 5b3a30 <time_getWallclockSeconds> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x70(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x5ba480,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VSUBSD 0x178(%R12),%XMM0,%XMM0 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
MOV 0x30(%R12),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD %XMM0,0x178(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 5b0ac0 <hypre_printf> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 4115b0 <fflush@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CALL 5b3a30 <time_getWallclockSeconds> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
VMOVSD -0xb0(%RBP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD %XMM0,0x178(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 47ea34 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2044> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0x40(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RSI),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %RAX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
INC %RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $0x7,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 480cf5 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x4305> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x1,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 4806a9 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3cb9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x2,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 480690 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3ca0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x3,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 480677 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3c87> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 48065e <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3c6e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x5,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 480645 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3c55> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x6,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 48062c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3c3c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R11),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R12,(%RCX,%RAX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV (%RDX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R9,(%RBX,%RAX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV (%R11),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R8,(%R15,%RAX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV (%RDX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,(%R12,%RAX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV (%R11),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,(%R9,%RAX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV (%RDX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R8,(%RBX,%RAX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV (%R11),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R15,(%RSI,%RAX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV (%RDX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R12,(%RCX,%RAX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV (%R11),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R9,(%R8,%RAX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV (%RDX),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R15,(%RBX,%RAX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV (%R11),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,(%R12,%RAX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV (%RDX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,(%R9,%RAX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV (%R11),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R8,(%R15,%RAX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV (%RDX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,(%RBX,%RAX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47d525 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xb35> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x58(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 47d525 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xb35> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 47d783 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xd93> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %R15D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 47cfb0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x5c0> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV (%R9),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x260(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD %XMM3,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x268(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 54fbf0 <hypre_alt_insert_new_nodes> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
VMOVSD -0xb0(%RBP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x130(%RCX),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0,(%R10) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JG 47d7c4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xdd4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 47d7e0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xdf0> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 47d525 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xb35> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0xb0(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 47e904 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f14> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VMOVDQU64 (%R9),%ZMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VPSUBQ %ZMM12,%ZMM6,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VMOVDQA64 %ZMM6,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVDQU64 %ZMM0,(%R9) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
JMP 47ed25 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2335> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VPADDQ (%R11),%ZMM12,%ZMM13 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
ADD $0x40,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVDQU64 %ZMM13,(%R11) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
JMP 47eb12 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2122> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0x108(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R12,-0x40(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JG 47d525 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xb35> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 47d760 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xd70> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV (%R9),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x260(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDQA64 %ZMM12,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x268(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD %XMM3,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 54fbf0 <hypre_alt_insert_new_nodes> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
VMOVSD -0xb0(%RBP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDQA64 -0xf0(%RBP),%ZMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
JMP 47eccb <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x22db> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 47ee87 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2497> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 47ec12 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2222> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0x38(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4806cf <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3cdf> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 47d46a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xa7a> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | par_lr_interp.c:1196-1757 |
Module | exec |
nb instructions | 1058 |
nb uops | 1144 |
loop length | 5162 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 6 |
used ymm registers | 9 |
used zmm registers | 15 |
nb stack references | 43 |
micro-operation queue | 194.00 cycles |
front end | 194.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 76.20 | 76.20 | 137.67 | 137.67 | 107.50 | 76.20 | 76.20 | 107.50 | 107.50 | 107.50 | 76.20 | 137.67 |
cycles | 76.20 | 76.20 | 137.67 | 137.67 | 107.50 | 76.20 | 76.20 | 107.50 | 107.50 | 107.50 | 76.20 | 137.67 |
Cycles executing div or sqrt instructions | 10.00 |
FE+BE cycles | 211.03-211.02 |
Stall cycles | 0.00 |
Front-end | 194.00 |
Dispatch | 137.67 |
DIV/SQRT | 10.00 |
Overall L1 | 194.00 |
all | 25% |
load | 31% |
store | 20% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 5% |
all | 4% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 23% |
load | 26% |
store | 18% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 96% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 7% |
all | 31% |
load | 38% |
store | 29% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 93% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 13% |
all | 13% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 29% |
load | 34% |
store | 27% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 91% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 13% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x10(%RSP),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
PUSHQ -0x8(%R13) | 2 | 0 | 0 | 0.33 | 0.33 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0.33 | 5-12 | 0.62 |
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x308,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDI,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x158(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x140(%RDI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x138(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x128(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x120(%RDI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x118(%RDI),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x110(%RDI),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x170(%RDI),%XMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,-0x210(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x108(%RDI),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x168(%RDI),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x1f8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x160(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x150(%RDI),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,-0x260(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x148(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,-0x240(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,-0x258(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM6,-0x1d0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14,-0x248(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xf8(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xd0(%RDI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa8(%RAX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb8(%RDI),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa0(%RAX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R15,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RAX),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x90(%RAX),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x80(%RAX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%RAX),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RAX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%RAX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x60(%RAX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,-0x198(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RAX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RAX),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RAX),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,-0x1a8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,-0x1c0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0x1b0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0x238(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,-0x1b8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,-0x190(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,-0x200(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,-0x120(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RAX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RAX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RAX),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RAX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,-0x188(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%RAX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,-0x268(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,-0x178(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RAX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,-0x250(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0x180(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RSI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 47f290 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x28a0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x70(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x130(%RSI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R10),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 47f360 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2970> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R8,-0x1a0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM3,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 5b39c0 <hypre_GetThreadNum> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 5b39b0 <hypre_NumActiveThreads> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %R12,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVSD -0x128(%RBP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x1a0(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x100(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x1(%RSI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %RSI | 5 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 10 |
IMUL %RAX,%R9 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R9,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %RCX,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x130(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMOVE -0x100(%RBP),%RAX | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.50 |
CMP %R9,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JLE 48092f <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3f3f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x70(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x108(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x1c8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %R15D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R8,-0x208(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x38(%R10),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,-0x230(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x58(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 47ccab <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2bb> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RCX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x208(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x230(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x1c8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,-0x1c8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,-0x1a0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM0,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 411290 <GOMP_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x40(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x1c8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x118(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xb0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (,%R11,8),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,(%R9,%R11,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%R8,8),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDX,(%RDI,%R11,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,(%RSI,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x128(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,-0x1c8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R15,%R10,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xf0(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x208(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RBX,%R10,1),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDX,(%RBX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 411290 <GOMP_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x118(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xf0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x128(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD -0x130(%RBP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R15,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV -0x1a0(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 47e7a8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1db8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RCX,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM1,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 411290 <GOMP_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
TEST %R15,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
VMOVSD -0xf0(%RBP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x118(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x128(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x1c8(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JLE 47d760 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xd70> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x108(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RAX,-0x40(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 480c31 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x4241> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x40(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x108(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x8(%R10),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%RDI,%RDX,1),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %R9,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RSI,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%R15),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R15,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x2,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 4805d0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3be0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x38(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (,%RAX,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x58(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x8(%R12),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R8,%RSI,1),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R8,%RDI,1),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%RCX,%RDI,1),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%RCX,%RSI,1),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x40,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RBX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETAE %R8B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %R15,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SETAE %DIL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
OR %EDI,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R12,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETAE %DIL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %RBX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x58(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SETAE %BL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
OR %EBX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x38(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
AND %R8D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RCX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x208(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SETAE %R8B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADD %RBX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xf0(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RSI,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETAE %SIL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
OR %ESI,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
AND %EDI,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RCX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETAE %SIL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %R15,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETAE %R15B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
OR %R15D,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
TEST %SIL,%R8B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 4805d0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3be0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP %RCX,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETAE %R8B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %R12,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETAE %R12B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
OR %R8B,%R12B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 4805d0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3be0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x6,-0x130(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JBE 480d28 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x4338> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x118(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ (%R11),%ZMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPBROADCASTQ (%RDX),%ZMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
SHR $0x3,%R8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SAL $0x6,%R8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA -0x40(%R8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SHR $0x6,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
INC %RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $0x7,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 47d32f <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x93f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x1,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47d2ff <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x90f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x2,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47d2d8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x8e8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x3,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47d2b1 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x8c1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47d28a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x89a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x5,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47d263 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x873> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x6,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47d23c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x84c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VPADDQ (%RBX),%ZMM4,%ZMM2 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
MOV $0x40,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVDQU64 %ZMM2,(%RBX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPADDQ (%R9),%ZMM5,%ZMM7 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VMOVDQU64 %ZMM7,(%R9) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV -0xf0(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPADDQ (%RBX,%RSI,1),%ZMM4,%ZMM8 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VMOVDQU64 %ZMM8,(%RBX,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPADDQ (%R9,%RSI,1),%ZMM5,%ZMM9 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VMOVDQU64 %ZMM9,(%R9,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
ADD $0x40,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xf0(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPADDQ (%R15,%RSI,1),%ZMM4,%ZMM10 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VMOVDQU64 %ZMM10,(%R15,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPADDQ (%R9,%RSI,1),%ZMM5,%ZMM11 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VMOVDQU64 %ZMM11,(%R9,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
ADD $0x40,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xf0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPADDQ (%RCX,%RSI,1),%ZMM4,%ZMM12 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VMOVDQU64 %ZMM12,(%RCX,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPADDQ (%R9,%RSI,1),%ZMM5,%ZMM13 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VMOVDQU64 %ZMM13,(%R9,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
ADD $0x40,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xf0(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPADDQ (%R12,%RSI,1),%ZMM4,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VMOVDQU64 %ZMM14,(%R12,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPADDQ (%R9,%RSI,1),%ZMM5,%ZMM15 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VMOVDQU64 %ZMM15,(%R9,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
ADD $0x40,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xf0(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPADDQ (%RDI,%RSI,1),%ZMM4,%ZMM6 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VMOVDQU64 %ZMM6,(%RDI,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPADDQ (%R9,%RSI,1),%ZMM5,%ZMM0 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VMOVDQU64 %ZMM0,(%R9,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
ADD $0x40,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xf0(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPADDQ (%RBX,%RSI,1),%ZMM4,%ZMM1 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VMOVDQU64 %ZMM1,(%RBX,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPADDQ (%R9,%RSI,1),%ZMM5,%ZMM2 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VMOVDQU64 %ZMM2,(%R9,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
ADD $0x40,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R8,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47d43b <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xa4b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x118(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x8,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %R9,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST $0x7,%R8B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 4809fd <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x400d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SUB %R9,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%R8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R8,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x2,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 47d4c6 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xad6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x128(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ (%R11),%YMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
MOV (%RDX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R15,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x38(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SAL $0x3,%R9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
VPBROADCASTQ %RBX,%YMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%RCX,%R9,1),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RDI,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPADDQ (%R12),%YMM4,%YMM5 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VMOVDQU %YMM5,(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPADDQ (%R9),%YMM10,%YMM11 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VMOVDQU %YMM11,(%R9) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV -0x118(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %R8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
AND $0x3,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 4809fd <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x400d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R11),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (,%RAX,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x38(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R15,(%R12,%RSI,1) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV (%RDX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDI,(%RCX,%RSI,1) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
CMP %RAX,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 4809fd <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x400d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R11),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x8(%RSI),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x2,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD %R8,(%R12,%R9,1) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV (%RDX),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R15,(%RCX,%R9,1) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
CMP %RAX,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 4809fd <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x400d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R11),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x10,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD %RAX,(%R12,%RSI,1) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV (%RDX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDX,(%RCX,%RSI,1) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV -0x108(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV (%R11,%RAX,8),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOT %RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
AND $0x7,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
TEST %R12,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 47d564 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xb74> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x108(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD -0x8(%RBX,%R10,1),%R12 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %R12,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x108(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R15,-0x40(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 47d760 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xd70> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 47d69b <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xcab> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x1,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47d671 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xc81> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x2,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47d651 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xc61> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x3,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47d631 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xc41> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47d611 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xc21> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x5,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47d5f1 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xc01> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x6,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47d5d1 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xbe1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x48(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI,%R15,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 47d5ce <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xbde> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD -0x8(%RCX,%R10,1),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RSI,%R15,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x48(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDI,%R15,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 47d5ee <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xbfe> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD -0x8(%R11,%R10,1),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RDX,(%RDI,%R15,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x48(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12,%R15,8),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RBX,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 47d60e <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xc1e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD -0x8(%R9,%R10,1),%RBX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RBX,(%R12,%R15,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x48(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8,%R15,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RSI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 47d62e <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xc3e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD -0x8(%RAX,%R10,1),%RSI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RSI,(%R8,%R15,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x48(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDI,%R15,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 47d64e <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xc5e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD -0x8(%RCX,%R10,1),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RDX,(%RDI,%R15,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x48(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R11,%R15,8),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R12,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 47d66e <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xc7e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD -0x8(%RBX,%R10,1),%R12 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %R12,(%R11,%R15,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x48(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R9,%R15,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R8,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 47d68e <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xc9e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD -0x8(%RSI,%R10,1),%R8 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %R8,(%R9,%R15,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R15,-0x40(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 47d760 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xd70> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVSD %XMM3,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 411290 <GOMP_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
VMOVSD -0xb0(%RBP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0,-0x100(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 480964 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3f74> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x100(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R13,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVSD %XMM3,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%R8,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 4110a0 <memset@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x70(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD -0xb0(%RBP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x130(%RCX),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0,(%R10) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 47f320 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2930> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x60(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XOR %R15D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVSD %XMM3,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 411290 <GOMP_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x108(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD -0xb0(%RBP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RBX,-0x40(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 47e176 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1786> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x70(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $-0x2,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x48(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
KXNORB %K2,%K2,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV %RDX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD -0x1d0(%RBP),%XMM15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM6,%XMM6,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VXORPD %XMM5,%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xc0(%R11),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%R11),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x38(%R11),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x108(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 47d89d <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xead> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CMPQ $0,-0x100(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 47f350 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2960> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x70(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x130(%R8),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0,(%R14) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 47f300 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2910> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD $0x308,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
LEA -0x10(%R9),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP $0x1,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 47ea0c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x201c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x1,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R12,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
AND $0x7,%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 480ab5 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x40c5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x1,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47e8d3 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ee3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x2,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47e8ae <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1ebe> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x3,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47e889 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1e99> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47e864 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1e74> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x5,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47e83f <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1e4f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x6,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47e81a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1e2a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R11),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xb0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x2,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R15,0x8(%R11) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV (%RDX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RAX,0x8(%RDX) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV (%RCX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,0x8(%RCX) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x8(%R11,%R12,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xb0(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDI,(%R11,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x8(%RBX,%R12,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R9,(%RBX,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x8(%RCX,%R12,8),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R10,(%RCX,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
INC %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x8(%R11,%R12,8),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R15,(%R11,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x8(%RAX,%R12,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDX,(%RAX,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x8(%RCX,%R12,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,(%RCX,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
INC %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x8(%R11,%R12,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xb0(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDI,(%R11,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x8(%RBX,%R12,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R9,(%RBX,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x8(%RCX,%R12,8),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R10,(%RCX,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
INC %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x8(%R11,%R12,8),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R15,(%R11,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x8(%RAX,%R12,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDX,(%RAX,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x8(%RCX,%R12,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,(%RCX,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
INC %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x8(%R11,%R12,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xb0(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDI,(%R11,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x8(%RBX,%R12,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R9,(%RBX,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x8(%RCX,%R12,8),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R10,(%RCX,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
INC %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x8(%R11,%R12,8),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R15,(%R11,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x8(%RAX,%R12,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDX,(%RAX,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x8(%RCX,%R12,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,(%RCX,%R12,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
INC %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R12,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47ea0c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x201c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVSD %XMM1,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 411290 <GOMP_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CALL 411290 <GOMP_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0x4,-0x250(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
VMOVSD -0xb0(%RBP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 480571 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3b81> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x100(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%R11,8),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%R11,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,0xe0(%R9) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,0xe8(%R9) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RBX,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 4804b0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3ac0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 480500 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3b10> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RDX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0x1,(%RSI) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 47d775 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xd85> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x70(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0,-0x100(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV 0x180(%R10),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x130(%R10),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JLE 48093a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3f4a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x100(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x1(%R15),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP $0x6,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 480cba <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x42ca> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SHR $0x3,%R15 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x48(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ -0x190(%RBP),%ZMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x6,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R11,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%RDX,%R11,1),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB $0x40,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x6,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
INC %RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $0x7,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 47eb7d <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x218d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x1,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47eb67 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2177> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x2,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47eb56 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2166> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x3,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47eb45 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2155> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47eb34 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2144> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x5,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47eb23 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2133> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x6,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 480bcf <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x41df> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VPADDQ (%R10),%ZMM12,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
ADD $0x40,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVDQU64 %ZMM14,-0x40(%R10) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPADDQ (%R10),%ZMM12,%ZMM15 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
ADD $0x40,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVDQU64 %ZMM15,-0x40(%R10) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPADDQ (%R10),%ZMM12,%ZMM6 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
ADD $0x40,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVDQU64 %ZMM6,-0x40(%R10) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPADDQ (%R10),%ZMM12,%ZMM0 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
ADD $0x40,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVDQU64 %ZMM0,-0x40(%R10) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPADDQ (%R10),%ZMM12,%ZMM1 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
ADD $0x40,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVDQU64 %ZMM1,-0x40(%R10) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPADDQ (%R10),%ZMM12,%ZMM2 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
ADD $0x40,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVDQU64 %ZMM2,-0x40(%R10) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
CMP %RDI,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47ebf8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2208> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x100(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RAX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RAX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 480c5e <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x426e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x100(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %R12,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%R15),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP $0x2,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 47ec53 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2263> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x48(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ -0x190(%RBP),%YMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%R11,%R12,8),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
AND $0x3,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
VPADDQ (%R12),%YMM14,%YMM15 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VMOVDQU %YMM15,(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
JE 47ec8d <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x229d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x48(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x190(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (,%RAX,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x1(%RAX),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x100(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R15,(%R8,%RDI,1) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
CMP %RCX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 47ec8d <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x229d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD $0x2,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD %R15,0x8(%R8,%RDI,1) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
CMP %RAX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 47ec8d <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x229d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %R15,0x10(%R8,%RDI,1) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV (%R9),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x260(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD %XMM3,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x268(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 54fbf0 <hypre_alt_insert_new_nodes> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMP $0x6,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD -0xb0(%RBP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JBE 480cb3 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x42c3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VPBROADCASTQ -0x190(%RBP),%ZMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
MOV -0x100(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SHR $0x3,%RBX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R9,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x6,%RBX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA (%RBX,%R9,1),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB $0x40,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x6,%RBX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
INC %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $0x7,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 47edb8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x23c8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x1,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47ed98 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x23a8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x2,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47ed81 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2391> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x3,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47ed6a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x237a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47ed53 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2363> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x5,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47ed3c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x234c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x6,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 480baa <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x41ba> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVDQU64 (%RAX),%ZMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VPSUBQ %ZMM12,%ZMM1,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VMOVDQU64 %ZMM2,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVDQU64 (%RAX),%ZMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VPSUBQ %ZMM12,%ZMM7,%ZMM8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VMOVDQU64 %ZMM8,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVDQU64 (%RAX),%ZMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VPSUBQ %ZMM12,%ZMM9,%ZMM4 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VMOVDQU64 %ZMM4,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVDQU64 (%RAX),%ZMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VPSUBQ %ZMM12,%ZMM5,%ZMM10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VMOVDQU64 %ZMM10,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVDQU64 (%RAX),%ZMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VPSUBQ %ZMM12,%ZMM11,%ZMM13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VMOVDQU64 %ZMM13,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVDQU64 (%RAX),%ZMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VPSUBQ %ZMM12,%ZMM14,%ZMM15 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VMOVDQU64 %ZMM15,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
CMP %R11,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47ee66 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2476> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x100(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x8,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RDI,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 48082a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3e3a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x100(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %RSI,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%R8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP $0x2,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 47eed5 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x24e5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x48(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ -0x190(%RBP),%YMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
MOV %R8,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%R10,%RSI,8),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %R15,-0x118(%RBP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
VMOVDQU (%R12),%YMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VPSUBQ %YMM12,%YMM1,%YMM2 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMOVDQU %YMM2,(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
TEST $0x3,%R8B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 48082a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3e3a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x118(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x190(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x100(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (,%R9,8),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x1(%R9),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %RSI,(%R11,%RBX,1) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
CMP %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 48082a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3e3a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD $0x2,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RSI,0x8(%R11,%RBX,1) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
CMP %R9,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 48082a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3e3a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SUB %RSI,0x10(%R11,%RBX,1) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 47d783 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xd93> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RSI,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM3,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 5b0890 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
TEST %R12,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
VMOVSD -0x40(%RBP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x108(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x118(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JLE 47cbc1 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1d1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA (,%R12,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4110a0 <memset@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
VMOVSD -0x40(%RBP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x108(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x118(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 47cbc1 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1d1> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x60(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x308,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
LEA -0x10(%R10),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP 5b0950 <hypre_Free> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VMOVSD %XMM3,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 411290 <GOMP_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x108(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD -0xb0(%RBP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R12,-0x40(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JG 47d806 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xe16> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R13,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 5b0950 <hypre_Free> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
JMP 47e184 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1794> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM3,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 5b0890 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x70(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD -0x40(%RBP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x108(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x118(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x130(%R15),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0,(%RDI) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 47cbd8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1e8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 47cbd8 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1e8> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVSD %XMM3,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 5b0890 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x70(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0xc0(%R15) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe0(%R15),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 5b0890 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0xe8(%R15),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD -0xb0(%RBP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xb0(%R15) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 47ea6f <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x207f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD %XMM3,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 5b0890 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x70(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0xd8(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe8(%R12),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 5b0890 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x38(%R12),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD -0xb0(%RBP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xc8(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMPQ $0x1,(%RDI) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JG 47ea81 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2091> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 47d775 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xd85> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VMOVSD %XMM3,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 5b3a30 <time_getWallclockSeconds> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x70(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x5ba480,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VSUBSD 0x178(%R12),%XMM0,%XMM0 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
MOV 0x30(%R12),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD %XMM0,0x178(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 5b0ac0 <hypre_printf> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 4115b0 <fflush@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CALL 5b3a30 <time_getWallclockSeconds> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
VMOVSD -0xb0(%RBP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD %XMM0,0x178(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 47ea34 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2044> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0x40(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RSI),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %RAX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
INC %RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $0x7,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 480cf5 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x4305> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x1,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 4806a9 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3cb9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x2,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 480690 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3ca0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x3,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 480677 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3c87> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 48065e <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3c6e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x5,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 480645 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3c55> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x6,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 48062c <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3c3c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R11),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R12,(%RCX,%RAX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV (%RDX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R9,(%RBX,%RAX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV (%R11),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R8,(%R15,%RAX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV (%RDX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,(%R12,%RAX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV (%R11),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,(%R9,%RAX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV (%RDX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R8,(%RBX,%RAX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV (%R11),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R15,(%RSI,%RAX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV (%RDX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R12,(%RCX,%RAX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV (%R11),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R9,(%R8,%RAX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV (%RDX),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R15,(%RBX,%RAX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV (%R11),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,(%R12,%RAX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV (%RDX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,(%R9,%RAX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV (%R11),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R8,(%R15,%RAX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV (%RDX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,(%RBX,%RAX,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 47d525 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xb35> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x58(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 47d525 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xb35> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 47d783 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xd93> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %R15D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 47cfb0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x5c0> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV (%R9),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x260(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD %XMM3,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x268(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 54fbf0 <hypre_alt_insert_new_nodes> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
VMOVSD -0xb0(%RBP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x130(%RCX),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0,(%R10) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JG 47d7c4 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xdd4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 47d7e0 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xdf0> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 47d525 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xb35> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0xb0(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 47e904 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1f14> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VMOVDQU64 (%R9),%ZMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VPSUBQ %ZMM12,%ZMM6,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VMOVDQA64 %ZMM6,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVDQU64 %ZMM0,(%R9) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
JMP 47ed25 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2335> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VPADDQ (%R11),%ZMM12,%ZMM13 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
ADD $0x40,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVDQU64 %ZMM13,(%R11) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
JMP 47eb12 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2122> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0x108(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R12,-0x40(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JG 47d525 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xb35> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 47d760 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xd70> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV (%R9),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x260(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDQA64 %ZMM12,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x268(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD %XMM3,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 54fbf0 <hypre_alt_insert_new_nodes> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
VMOVSD -0xb0(%RBP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDQA64 -0xf0(%RBP),%ZMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
JMP 47eccb <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x22db> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 47ee87 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2497> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 47ec12 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x2222> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0x38(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4806cf <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x3cdf> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 47d46a <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0xa7a> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼hypre_BoomerAMGBuildExtPIInterp._omp_fn.0– | 0.45 | 0.12 |
▼Loop 736 - par_lr_interp.c:1393-1748 - exec– | 0.01 | 0 |
▼Loop 742 - par_lr_interp.c:1393-1675 - exec– | 0.18 | 0.03 |
○Loop 744 - par_lr_interp.c:1644-1651 - exec | 0.05 | 0.01 |
○Loop 746 - par_lr_interp.c:1624-1628 - exec | 0.04 | 0.01 |
○Loop 743 - par_lr_interp.c:1655-1660 - exec | 0 | 0 |
○Loop 745 - par_lr_interp.c:1632-1637 - exec | 0 | 0 |
▼Loop 749 - par_lr_interp.c:1494-1655 - exec– | 0.02 | 0.01 |
○Loop 752 - par_lr_interp.c:1516-1526 - exec | 0.08 | 0.01 |
○Loop 750 - par_lr_interp.c:1532-1545 - exec | 0 | 0 |
○Loop 751 - par_lr_interp.c:1532-1545 - exec | 0 | 0 |
○Loop 737 - par_lr_interp.c:1744-1745 - exec | 0 | 0 |
▼Loop 747 - par_lr_interp.c:1555-1596 - exec– | 0 | 0 |
○Loop 748 - par_lr_interp.c:1573-1596 - exec | 0 | 0 |
○Loop 738 - par_lr_interp.c:1742-1743 - exec | 0 | 0 |
▼Loop 739 - par_lr_interp.c:1680-1735 - exec– | 0 | 0 |
○Loop 741 - par_lr_interp.c:1707-1723 - exec | 0 | 0 |
○Loop 740 - par_lr_interp.c:1688-1700 - exec | 0 | 0 |
○Loop 735 - par_lr_interp.c:1458-1459 - exec | 0 | 0 |
○Loop 766 - par_lr_interp.c:1230-1231 - exec | 0 | 0 |
○Loop 755 - par_lr_interp.c:1378-1382 - exec | 0 | 0 |
▼Loop 759 - par_lr_interp.c:1244-1532 - exec– | 0 | 0 |
▼Loop 762 - par_lr_interp.c:1264-1532 - exec– | 0.01 | 0.01 |
○Loop 765 - par_lr_interp.c:1277-1285 - exec | 0.05 | 0.01 |
○Loop 763 - par_lr_interp.c:1291-1303 - exec | 0 | 0.01 |
○Loop 764 - par_lr_interp.c:1291-1303 - exec | 0 | 0 |
▼Loop 760 - par_lr_interp.c:1313-1350 - exec– | 0 | 0 |
○Loop 761 - par_lr_interp.c:1331-1350 - exec | 0 | 0 |
○Loop 758 - par_lr_interp.c:1393-1396 - exec | 0 | 0 |
○Loop 757 - par_lr_interp.c:1393-1396 - exec | 0 | 0 |
○Loop 754 - par_lr_interp.c:1444-1445 - exec | 0 | 0 |
○Loop 753 - par_lr_interp.c:1451-1452 - exec | 0 | 0 |
○Loop 756 - par_lr_interp.c:1400-1403 - exec | 0 | 0 |