Loop Id: 864 | Module: exec | Source: par_multi_interp.c:646-661 | Coverage: 0.01% |
---|
Loop Id: 864 | Module: exec | Source: par_multi_interp.c:646-661 | Coverage: 0.01% |
---|
0x43dbc0 INC %RDX |
0x43dbc3 MOV -0x100(%RBP),%RSI |
0x43dbca CMP 0x10(%RSI),%RDX |
0x43dbce JGE 43dcbd |
0x43dbd4 MOV -0x128(%RBP),%RSI |
0x43dbdb MOV (%RSI,%RDX,8),%RSI |
0x43dbdf MOV -0x1d0(%RBP),%RDI |
0x43dbe6 MOV %RCX,(%RDI,%RSI,8) |
0x43dbea MOV -0x1c8(%RBP),%RDI |
0x43dbf1 MOV %RAX,(%RDI,%RSI,8) |
0x43dbf5 MOV -0x1c0(%RBP),%R8 |
0x43dbfc MOV (%R8,%RSI,8),%RDI |
0x43dc00 MOV 0x8(%R8,%RSI,8),%R8 |
0x43dc05 JMP 43dc13 |
(866) 0x43dc10 INC %RDI |
(866) 0x43dc13 CMP %R8,%RDI |
(866) 0x43dc16 JGE 43dc50 |
(866) 0x43dc18 MOV -0x200(%RBP),%R9 |
(866) 0x43dc1f MOV (%R9,%RDI,8),%R9 |
(866) 0x43dc23 CMPQ $0x1,(%R10,%R9,8) |
(866) 0x43dc28 JNE 43dc10 |
(866) 0x43dc2a MOV (%R11,%R9,8),%R8 |
(866) 0x43dc2e MOV -0x180(%RBP),%R9 |
(866) 0x43dc35 MOV 0x8(%R9),%R9 |
(866) 0x43dc39 MOV %R8,(%R9,%RCX,8) |
(866) 0x43dc3d INC %RCX |
(866) 0x43dc40 MOV -0x1c0(%RBP),%R8 |
(866) 0x43dc47 MOV 0x8(%R8,%RSI,8),%R8 |
(866) 0x43dc4c JMP 43dc10 |
0x43dc50 MOV -0x1b0(%RBP),%R8 |
0x43dc57 MOV (%R8,%RSI,8),%RDI |
0x43dc5b MOV 0x8(%R8,%RSI,8),%R8 |
0x43dc60 JMP 43dc73 |
(865) 0x43dc70 INC %RDI |
(865) 0x43dc73 CMP %R8,%RDI |
(865) 0x43dc76 JGE 43dbc0 |
(865) 0x43dc7c MOV -0x1b8(%RBP),%R9 |
(865) 0x43dc83 MOV (%R9,%RDI,8),%R9 |
(865) 0x43dc87 CMPQ $0x1,(%R14,%R9,8) |
(865) 0x43dc8c JNE 43dc70 |
(865) 0x43dc8e MOV -0x1f8(%RBP),%R8 |
(865) 0x43dc95 MOV (%R8,%R9,8),%R8 |
(865) 0x43dc99 MOV -0x108(%RBP),%R9 |
(865) 0x43dca0 MOV 0x8(%R9),%R9 |
(865) 0x43dca4 MOV %R8,(%R9,%RAX,8) |
(865) 0x43dca8 INC %RAX |
(865) 0x43dcab MOV -0x1b0(%RBP),%R8 |
(865) 0x43dcb2 MOV 0x8(%R8,%RSI,8),%R8 |
(865) 0x43dcb7 JMP 43dc70 |
/scratch_na/users/xoserete/qaas_runs/171-415-3661/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 646 - 661 |
-------------------------------------------------------------------------------- |
646: for (i=pass_pointer[1]; i < pass_pointer[2]; i++) |
647: { |
648: i1 = pass_array[i]; |
649: P_diag_start[i1] = cnt_nz; |
650: P_offd_start[i1] = cnt_nz_offd; |
651: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
652: { |
653: j1 = S_diag_j[j]; |
654: if (CF_marker[j1] == 1) |
655: { P_diag_pass[1][cnt_nz++] = fine_to_coarse[j1]; } |
656: } |
657: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
658: { |
659: j1 = S_offd_j[j]; |
660: if (CF_marker_offd[j1] == 1) |
661: { P_offd_pass[1][cnt_nz_offd++] = map_S_to_new[j1]; } |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | hypre_BoomerAMGSetup | par_amg_setup.c:737 | exec |
○ | hypre_PCGSetup | pcg.c:234 | exec |
○ | main | amg.c:398 | exec |
○ | __libc_start_main | libc-2.28.so |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.33 |
Bottlenecks | P2, P3, P11, |
Function | hypre_BoomerAMGBuildMultipass |
Source | par_multi_interp.c:646-651,par_multi_interp.c:657-657 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 4.00 |
CQA cycles if no scalar integer | 4.00 |
CQA cycles if FP arith vectorized | 4.00 |
CQA cycles if fully vectorized | 0.50 |
Front-end cycles | 3.00 |
DIV/SQRT cycles | 0.50 |
P0 cycles | 0.40 |
P1 cycles | 4.00 |
P2 cycles | 4.00 |
P3 cycles | 1.00 |
P4 cycles | 0.40 |
P5 cycles | 0.50 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 0.20 |
P10 cycles | 4.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 5.06 |
Stall cycles (UFS) | 1.95 |
Nb insns | 18.00 |
Nb uops | 18.00 |
Nb loads | 12.00 |
Nb stores | 2.00 |
Nb stack references | 6.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 28.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 96.00 |
Bytes stored | 16.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | NA |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | NA |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | NA |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.33 |
Bottlenecks | P2, P3, P11, |
Function | hypre_BoomerAMGBuildMultipass |
Source | par_multi_interp.c:646-651,par_multi_interp.c:657-657 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 4.00 |
CQA cycles if no scalar integer | 4.00 |
CQA cycles if FP arith vectorized | 4.00 |
CQA cycles if fully vectorized | 0.50 |
Front-end cycles | 3.00 |
DIV/SQRT cycles | 0.50 |
P0 cycles | 0.40 |
P1 cycles | 4.00 |
P2 cycles | 4.00 |
P3 cycles | 1.00 |
P4 cycles | 0.40 |
P5 cycles | 0.50 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 0.20 |
P10 cycles | 4.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 5.06 |
Stall cycles (UFS) | 1.95 |
Nb insns | 18.00 |
Nb uops | 18.00 |
Nb loads | 12.00 |
Nb stores | 2.00 |
Nb stack references | 6.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 28.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 96.00 |
Bytes stored | 16.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | NA |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | NA |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | NA |
Path / |
Function | hypre_BoomerAMGBuildMultipass |
Source file and lines | par_multi_interp.c:646-661 |
Module | exec |
nb instructions | 18 |
nb uops | 18 |
loop length | 89 |
used x86 registers | 7 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 6 |
micro-operation queue | 3.00 cycles |
front end | 3.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 0.50 | 0.40 | 4.00 | 4.00 | 1.00 | 0.40 | 0.50 | 1.00 | 1.00 | 1.00 | 0.20 | 4.00 |
cycles | 0.50 | 0.40 | 4.00 | 4.00 | 1.00 | 0.40 | 0.50 | 1.00 | 1.00 | 1.00 | 0.20 | 4.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 5.06 |
Stall cycles | 1.95 |
LM full (events) | 4.77 |
Front-end | 3.00 |
Dispatch | 4.00 |
Overall L1 | 4.00 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | NA (no load vectorizable/vectorized instructions) |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
INC %RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x100(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP 0x10(%RSI),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 43dcbd <hypre_BoomerAMGBuildMultipass+0x196d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x128(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI,%RDX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x1d0(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,(%RDI,%RSI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x1c8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RDI,%RSI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x1c0(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8,%RSI,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R8,%RSI,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 43dc13 <hypre_BoomerAMGBuildMultipass+0x18c3> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x1b0(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8,%RSI,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R8,%RSI,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 43dc73 <hypre_BoomerAMGBuildMultipass+0x1923> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
Function | hypre_BoomerAMGBuildMultipass |
Source file and lines | par_multi_interp.c:646-661 |
Module | exec |
nb instructions | 18 |
nb uops | 18 |
loop length | 89 |
used x86 registers | 7 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 6 |
micro-operation queue | 3.00 cycles |
front end | 3.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 0.50 | 0.40 | 4.00 | 4.00 | 1.00 | 0.40 | 0.50 | 1.00 | 1.00 | 1.00 | 0.20 | 4.00 |
cycles | 0.50 | 0.40 | 4.00 | 4.00 | 1.00 | 0.40 | 0.50 | 1.00 | 1.00 | 1.00 | 0.20 | 4.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 5.06 |
Stall cycles | 1.95 |
LM full (events) | 4.77 |
Front-end | 3.00 |
Dispatch | 4.00 |
Overall L1 | 4.00 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | NA (no load vectorizable/vectorized instructions) |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
INC %RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x100(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP 0x10(%RSI),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 43dcbd <hypre_BoomerAMGBuildMultipass+0x196d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x128(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI,%RDX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x1d0(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,(%RDI,%RSI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x1c8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RDI,%RSI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x1c0(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8,%RSI,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R8,%RSI,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 43dc13 <hypre_BoomerAMGBuildMultipass+0x18c3> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x1b0(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8,%RSI,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R8,%RSI,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 43dc73 <hypre_BoomerAMGBuildMultipass+0x1923> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |