Function: hypre_BoomerAMGCorrectCFMarker | Module: exec | Source: par_strength.c:2311-2320 | Coverage: 0.01% |
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Function: hypre_BoomerAMGCorrectCFMarker | Module: exec | Source: par_strength.c:2311-2320 | Coverage: 0.01% |
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/scratch_na/users/xoserete/qaas_runs/171-415-3661/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c: 2311 - 2320 |
-------------------------------------------------------------------------------- |
2311: for (i=0; i < num_var; i++) |
2312: { |
2313: if (CF_marker[i] > 0 ) |
2314: { |
2315: if (CF_marker[i] == 1) CF_marker[i] = new_CF_marker[cnt++]; |
2316: else { CF_marker[i] = 1; cnt++;} |
2317: } |
2318: } |
2319: |
2320: return 0; |
0x483530 TEST %RSI,%RSI |
0x483533 JLE 48363d |
0x483539 CMP $0x4,%RSI |
0x48353d JAE 483546 |
0x48353f XOR %EAX,%EAX |
0x483541 JMP 483631 |
0x483546 PUSH %RBP |
0x483547 MOV %RSP,%RBP |
0x48354a MOV %RSI,%RCX |
0x48354d SHR $0x2,%RCX |
0x483551 LEA 0x18(%RDI),%R8 |
0x483555 XOR %EAX,%EAX |
0x483557 JMP 483577 |
0x483559 NOPL (%RAX) |
(2303) 0x483560 MOVQ $0x1,(%R8) |
(2303) 0x483567 INC %RAX |
(2303) 0x48356a ADD $0x20,%R8 |
(2303) 0x48356e DEC %RCX |
(2303) 0x483571 JE 483630 |
(2303) 0x483577 MOV -0x18(%R8),%R9 |
(2303) 0x48357b TEST %R9,%R9 |
(2303) 0x48357e JLE 4835ab |
(2303) 0x483580 CMP $0x1,%R9 |
(2303) 0x483584 JNE 4835a0 |
(2303) 0x483586 MOV (%RDX,%RAX,8),%R9 |
(2303) 0x48358a INC %RAX |
(2303) 0x48358d MOV %R9,-0x18(%R8) |
(2303) 0x483591 JMP 4835ab |
0x483593 NOPW %CS:(%RAX,%RAX,1) |
(2303) 0x4835a0 MOVQ $0x1,-0x18(%R8) |
(2303) 0x4835a8 INC %RAX |
(2303) 0x4835ab MOV -0x10(%R8),%R9 |
(2303) 0x4835af TEST %R9,%R9 |
(2303) 0x4835b2 JLE 4835db |
(2303) 0x4835b4 CMP $0x1,%R9 |
(2303) 0x4835b8 JNE 4835d0 |
(2303) 0x4835ba MOV (%RDX,%RAX,8),%R9 |
(2303) 0x4835be INC %RAX |
(2303) 0x4835c1 MOV %R9,-0x10(%R8) |
(2303) 0x4835c5 JMP 4835db |
0x4835c7 NOPW (%RAX,%RAX,1) |
(2303) 0x4835d0 MOVQ $0x1,-0x10(%R8) |
(2303) 0x4835d8 INC %RAX |
(2303) 0x4835db MOV -0x8(%R8),%R9 |
(2303) 0x4835df TEST %R9,%R9 |
(2303) 0x4835e2 JLE 48360b |
(2303) 0x4835e4 CMP $0x1,%R9 |
(2303) 0x4835e8 JNE 483600 |
(2303) 0x4835ea MOV (%RDX,%RAX,8),%R9 |
(2303) 0x4835ee INC %RAX |
(2303) 0x4835f1 MOV %R9,-0x8(%R8) |
(2303) 0x4835f5 JMP 48360b |
0x4835f7 NOPW (%RAX,%RAX,1) |
(2303) 0x483600 MOVQ $0x1,-0x8(%R8) |
(2303) 0x483608 INC %RAX |
(2303) 0x48360b MOV (%R8),%R9 |
(2303) 0x48360e TEST %R9,%R9 |
(2303) 0x483611 JLE 48356a |
(2303) 0x483617 CMP $0x1,%R9 |
(2303) 0x48361b JNE 483560 |
(2303) 0x483621 MOV (%RDX,%RAX,8),%R9 |
(2303) 0x483625 INC %RAX |
(2303) 0x483628 MOV %R9,(%R8) |
(2303) 0x48362b JMP 48356a |
0x483630 POP %RBP |
0x483631 MOV %RSI,%RCX |
0x483634 AND $-0x4,%RCX |
0x483638 CMP %RSI,%RCX |
0x48363b JNE 483653 |
0x48363d XOR %EAX,%EAX |
0x48363f RET |
(2302) 0x483640 MOVQ $0x1,(%RDI,%RCX,8) |
(2302) 0x483648 INC %RAX |
(2302) 0x48364b INC %RCX |
(2302) 0x48364e CMP %RCX,%RSI |
(2302) 0x483651 JE 48363d |
(2302) 0x483653 MOV (%RDI,%RCX,8),%R8 |
(2302) 0x483657 TEST %R8,%R8 |
(2302) 0x48365a JLE 48364b |
(2302) 0x48365c CMP $0x1,%R8 |
(2302) 0x483660 JNE 483640 |
(2302) 0x483662 MOV (%RDX,%RAX,8),%R8 |
(2302) 0x483666 INC %RAX |
(2302) 0x483669 MOV %R8,(%RDI,%RCX,8) |
(2302) 0x48366d JMP 48364b |
0x48366f NOP |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | hypre_BoomerAMGSetup | par_amg_setup.c:730 | exec |
○ | hypre_PCGSetup | pcg.c:234 | exec |
○ | main | amg.c:398 | exec |
○ | __libc_start_main | libc-2.28.so |
Path / |
Source file and lines | par_strength.c:2311-2320 |
Module | exec |
nb instructions | 25 |
nb uops | 25 |
loop length | 96 |
used x86 registers | 7 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 4.17 cycles |
front end | 4.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.50 | 1.40 | 0.67 | 0.67 | 0.50 | 1.40 | 2.50 | 0.50 | 0.50 | 0.50 | 1.20 | 0.67 |
cycles | 2.50 | 1.40 | 0.67 | 0.67 | 0.50 | 1.40 | 2.50 | 0.50 | 0.50 | 0.50 | 1.20 | 0.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 4.26 |
Stall cycles | 0.00 |
Front-end | 4.17 |
Dispatch | 2.50 |
Overall L1 | 4.17 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
TEST %RSI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 48363d <hypre_BoomerAMGCorrectCFMarker+0x10d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 483546 <hypre_BoomerAMGCorrectCFMarker+0x16> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 483631 <hypre_BoomerAMGCorrectCFMarker+0x101> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RSI,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(%RDI),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 483577 <hypre_BoomerAMGCorrectCFMarker+0x47> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
MOV %RSI,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 483653 <hypre_BoomerAMGCorrectCFMarker+0x123> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | par_strength.c:2311-2320 |
Module | exec |
nb instructions | 25 |
nb uops | 25 |
loop length | 96 |
used x86 registers | 7 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 4.17 cycles |
front end | 4.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.50 | 1.40 | 0.67 | 0.67 | 0.50 | 1.40 | 2.50 | 0.50 | 0.50 | 0.50 | 1.20 | 0.67 |
cycles | 2.50 | 1.40 | 0.67 | 0.67 | 0.50 | 1.40 | 2.50 | 0.50 | 0.50 | 0.50 | 1.20 | 0.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 4.26 |
Stall cycles | 0.00 |
Front-end | 4.17 |
Dispatch | 2.50 |
Overall L1 | 4.17 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
TEST %RSI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 48363d <hypre_BoomerAMGCorrectCFMarker+0x10d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 483546 <hypre_BoomerAMGCorrectCFMarker+0x16> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 483631 <hypre_BoomerAMGCorrectCFMarker+0x101> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RSI,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(%RDI),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 483577 <hypre_BoomerAMGCorrectCFMarker+0x47> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
MOV %RSI,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 483653 <hypre_BoomerAMGCorrectCFMarker+0x123> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼hypre_BoomerAMGCorrectCFMarker– | 0.01 | 0 |
○Loop 2303 - par_strength.c:2311-2316 - exec | 0.01 | 0.06 |
○Loop 2302 - par_strength.c:2311-2316 - exec | 0 | 0 |