Loop Id: 926 | Module: exec | Source: par_multi_interp.c:1747-1876 [...] | Coverage: 0.18% |
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Loop Id: 926 | Module: exec | Source: par_multi_interp.c:1747-1876 [...] | Coverage: 0.18% |
---|
0x4423d0 MOV -0xb8(%RBP),%R8 |
0x4423d7 INC %R8 |
0x4423da CMP -0xb0(%RBP),%R8 |
0x4423e1 JGE 442e89 |
0x4423e7 MOV %R8,-0xb8(%RBP) |
0x4423ee MOV -0x118(%RBP),%RAX |
0x4423f5 MOV (%RAX,%R8,8),%RCX |
0x4423f9 MOV -0x130(%RBP),%RAX |
0x442400 MOV (%RAX,%RCX,8),%R14 |
0x442404 MOV -0x70(%RBP),%RAX |
0x442408 MOV (%RAX,%RCX,8),%R13 |
0x44240c MOV %RCX,-0x30(%RBP) |
0x442410 MOV 0x8(%RAX,%RCX,8),%RSI |
0x442415 LEA (%RSI,%R14,1),%RAX |
0x442419 SUB %R13,%RAX |
0x44241c CMP %RAX,%R14 |
0x44241f JGE 442586 |
0x442425 MOV -0xf8(%RBP),%RAX |
0x44242c MOV (%RAX),%RBX |
0x44242f MOV -0x80(%RBP),%RAX |
0x442433 MOV (%RAX),%RAX |
0x442436 MOV %RSI,%RCX |
0x442439 SUB %R13,%RCX |
0x44243c CMP $0xc,%RCX |
0x442440 JBE 442550 |
0x442446 MOV %RSI,-0x40(%RBP) |
0x44244a LEA (%RAX,%R13,8),%RDI |
0x44244e LEA (,%RCX,8),%RDX |
0x442456 XOR %ESI,%ESI |
0x442458 MOV %RCX,-0xa0(%RBP) |
0x44245f VZEROUPPER |
0x442462 CALL 4e0430 <__intel_avx_rep_memset> |
0x442467 MOV -0xa0(%RBP),%R10 |
0x44246e MOV -0x50(%RBP),%R9 |
0x442472 MOV %R10,%RAX |
0x442475 SHR $0x2,%RAX |
0x442479 LEA (,%R14,8),%RCX |
0x442481 MOV -0xf0(%RBP),%RDX |
0x442488 LEA (%RDX,%R13,8),%RDX |
0x44248c XOR %ESI,%ESI |
0x44248e XCHG %AX,%AX |
(944) 0x442490 MOV (%R9),%RDI |
(944) 0x442493 MOV (%RBX,%RDI,8),%RDI |
(944) 0x442497 ADD %RCX,%RDI |
(944) 0x44249a MOV (%RDI,%RSI,8),%RDI |
(944) 0x44249e LEA (%R13,%RSI,1),%R8 |
(944) 0x4424a3 MOV %R8,(%R12,%RDI,8) |
(944) 0x4424a7 MOV %RDI,-0x18(%RDX,%RSI,8) |
(944) 0x4424ac MOV (%R9),%RDI |
(944) 0x4424af MOV (%RBX,%RDI,8),%RDI |
(944) 0x4424b3 ADD %RCX,%RDI |
(944) 0x4424b6 MOV 0x8(%RDI,%RSI,8),%RDI |
(944) 0x4424bb LEA 0x1(%R13,%RSI,1),%R8 |
(944) 0x4424c0 MOV %R8,(%R12,%RDI,8) |
(944) 0x4424c4 MOV %RDI,-0x10(%RDX,%RSI,8) |
(944) 0x4424c9 MOV (%R9),%RDI |
(944) 0x4424cc MOV (%RBX,%RDI,8),%RDI |
(944) 0x4424d0 ADD %RCX,%RDI |
(944) 0x4424d3 MOV 0x10(%RDI,%RSI,8),%RDI |
(944) 0x4424d8 LEA 0x2(%R13,%RSI,1),%R8 |
(944) 0x4424dd MOV %R8,(%R12,%RDI,8) |
(944) 0x4424e1 MOV %RDI,-0x8(%RDX,%RSI,8) |
(944) 0x4424e6 MOV (%R9),%RDI |
(944) 0x4424e9 MOV (%RBX,%RDI,8),%RDI |
(944) 0x4424ed ADD %RCX,%RDI |
(944) 0x4424f0 MOV 0x18(%RDI,%RSI,8),%RDI |
(944) 0x4424f5 LEA 0x3(%R13,%RSI,1),%R8 |
(944) 0x4424fa MOV %R8,(%R12,%RDI,8) |
(944) 0x4424fe MOV %RDI,(%RDX,%RSI,8) |
(944) 0x442502 ADD $0x4,%RSI |
(944) 0x442506 DEC %RAX |
(944) 0x442509 JNE 442490 |
0x44250b MOV %R10,%RAX |
0x44250e AND $-0x4,%RAX |
0x442512 CMP %R10,%RAX |
0x442515 MOV -0x48(%RBP),%R11 |
0x442519 MOV -0x58(%RBP),%RCX |
0x44251d MOV -0x40(%RBP),%RDX |
0x442521 JAE 442586 |
0x442523 ADD %RAX,%R13 |
0x442526 ADD %RAX,%R14 |
0x442529 NOPL (%RAX) |
(945) 0x442530 MOV (%R9),%RAX |
(945) 0x442533 MOV (%RBX,%RAX,8),%RAX |
(945) 0x442537 MOV (%RAX,%R14,8),%RAX |
(945) 0x44253b MOV %R13,(%R12,%RAX,8) |
(945) 0x44253f MOV %RAX,(%RCX,%R13,8) |
(945) 0x442543 INC %R13 |
(945) 0x442546 INC %R14 |
(945) 0x442549 CMP %R13,%RDX |
(945) 0x44254c JNE 442530 |
0x44254e JMP 442586 |
0x442550 MOV -0x58(%RBP),%RDX |
0x442554 NOPW %CS:(%RAX,%RAX,1) |
(943) 0x442560 MOV (%R9),%RCX |
(943) 0x442563 MOV (%RBX,%RCX,8),%RCX |
(943) 0x442567 MOV (%RCX,%R14,8),%RCX |
(943) 0x44256b MOV %R13,(%R12,%RCX,8) |
(943) 0x44256f MOVQ $0,(%RAX,%R13,8) |
(943) 0x442577 MOV %RCX,(%RDX,%R13,8) |
(943) 0x44257b INC %R13 |
(943) 0x44257e INC %R14 |
(943) 0x442581 CMP %R13,%RSI |
(943) 0x442584 JNE 442560 |
0x442586 MOV -0xa8(%RBP),%RAX |
0x44258d MOV -0x30(%RBP),%RCX |
0x442591 MOV (%RAX,%RCX,8),%R14 |
0x442595 MOV -0x68(%RBP),%RAX |
0x442599 MOV (%RAX,%RCX,8),%R13 |
0x44259d MOV 0x8(%RAX,%RCX,8),%RSI |
0x4425a2 LEA (%RSI,%R14,1),%RAX |
0x4425a6 SUB %R13,%RAX |
0x4425a9 CMP %RAX,%R14 |
0x4425ac MOV -0x38(%RBP),%RDX |
0x4425b0 JGE 442726 |
0x4425b6 MOV -0x100(%RBP),%RAX |
0x4425bd MOV (%RAX),%RBX |
0x4425c0 MOV -0x88(%RBP),%RAX |
0x4425c7 MOV (%RAX),%RAX |
0x4425ca MOV %RSI,%RCX |
0x4425cd SUB %R13,%RCX |
0x4425d0 CMP $0xc,%RCX |
0x4425d4 JBE 4426f0 |
0x4425da MOV %RSI,-0x40(%RBP) |
0x4425de LEA (%RAX,%R13,8),%RDI |
0x4425e2 LEA (,%RCX,8),%RDX |
0x4425ea XOR %ESI,%ESI |
0x4425ec MOV %RCX,-0xa0(%RBP) |
0x4425f3 VZEROUPPER |
0x4425f6 CALL 4e0430 <__intel_avx_rep_memset> |
0x4425fb MOV -0xa0(%RBP),%R10 |
0x442602 MOV -0x50(%RBP),%R9 |
0x442606 MOV %R10,%RAX |
0x442609 SHR $0x2,%RAX |
0x44260d LEA (,%R14,8),%RCX |
0x442615 MOV -0xe8(%RBP),%RDX |
0x44261c LEA (%RDX,%R13,8),%RDX |
0x442620 XOR %ESI,%ESI |
0x442622 NOPW %CS:(%RAX,%RAX,1) |
(941) 0x442630 MOV (%R9),%RDI |
(941) 0x442633 MOV (%RBX,%RDI,8),%RDI |
(941) 0x442637 ADD %RCX,%RDI |
(941) 0x44263a MOV (%RDI,%RSI,8),%RDI |
(941) 0x44263e LEA (%R13,%RSI,1),%R8 |
(941) 0x442643 MOV %R8,(%R15,%RDI,8) |
(941) 0x442647 MOV %RDI,-0x18(%RDX,%RSI,8) |
(941) 0x44264c MOV (%R9),%RDI |
(941) 0x44264f MOV (%RBX,%RDI,8),%RDI |
(941) 0x442653 ADD %RCX,%RDI |
(941) 0x442656 MOV 0x8(%RDI,%RSI,8),%RDI |
(941) 0x44265b LEA 0x1(%R13,%RSI,1),%R8 |
(941) 0x442660 MOV %R8,(%R15,%RDI,8) |
(941) 0x442664 MOV %RDI,-0x10(%RDX,%RSI,8) |
(941) 0x442669 MOV (%R9),%RDI |
(941) 0x44266c MOV (%RBX,%RDI,8),%RDI |
(941) 0x442670 ADD %RCX,%RDI |
(941) 0x442673 MOV 0x10(%RDI,%RSI,8),%RDI |
(941) 0x442678 LEA 0x2(%R13,%RSI,1),%R8 |
(941) 0x44267d MOV %R8,(%R15,%RDI,8) |
(941) 0x442681 MOV %RDI,-0x8(%RDX,%RSI,8) |
(941) 0x442686 MOV (%R9),%RDI |
(941) 0x442689 MOV (%RBX,%RDI,8),%RDI |
(941) 0x44268d ADD %RCX,%RDI |
(941) 0x442690 MOV 0x18(%RDI,%RSI,8),%RDI |
(941) 0x442695 LEA 0x3(%R13,%RSI,1),%R8 |
(941) 0x44269a MOV %R8,(%R15,%RDI,8) |
(941) 0x44269e MOV %RDI,(%RDX,%RSI,8) |
(941) 0x4426a2 ADD $0x4,%RSI |
(941) 0x4426a6 DEC %RAX |
(941) 0x4426a9 JNE 442630 |
0x4426ab MOV %R10,%RAX |
0x4426ae AND $-0x4,%RAX |
0x4426b2 CMP %R10,%RAX |
0x4426b5 MOV -0x48(%RBP),%R11 |
0x4426b9 MOV -0x38(%RBP),%RDX |
0x4426bd MOV -0x40(%RBP),%RCX |
0x4426c1 JAE 442726 |
0x4426c3 ADD %RAX,%R13 |
0x4426c6 ADD %RAX,%R14 |
0x4426c9 NOPL (%RAX) |
(942) 0x4426d0 MOV (%R9),%RAX |
(942) 0x4426d3 MOV (%RBX,%RAX,8),%RAX |
(942) 0x4426d7 MOV (%RAX,%R14,8),%RAX |
(942) 0x4426db MOV %R13,(%R15,%RAX,8) |
(942) 0x4426df MOV %RAX,(%RDX,%R13,8) |
(942) 0x4426e3 INC %R13 |
(942) 0x4426e6 INC %R14 |
(942) 0x4426e9 CMP %R13,%RCX |
(942) 0x4426ec JNE 4426d0 |
0x4426ee JMP 442726 |
0x4426f0 MOV -0x38(%RBP),%RDX |
0x4426f4 NOPW %CS:(%RAX,%RAX,1) |
(940) 0x442700 MOV (%R9),%RCX |
(940) 0x442703 MOV (%RBX,%RCX,8),%RCX |
(940) 0x442707 MOV (%RCX,%R14,8),%RCX |
(940) 0x44270b MOV %R13,(%R15,%RCX,8) |
(940) 0x44270f MOVQ $0,(%RAX,%R13,8) |
(940) 0x442717 MOV %RCX,(%RDX,%R13,8) |
(940) 0x44271b INC %R13 |
(940) 0x44271e INC %R14 |
(940) 0x442721 CMP %R13,%RSI |
(940) 0x442724 JNE 442700 |
0x442726 MOV -0xd0(%RBP),%RCX |
0x44272d MOV -0x30(%RBP),%RSI |
0x442731 MOV (%RCX,%RSI,8),%RAX |
0x442735 MOV 0x8(%RCX,%RSI,8),%RCX |
0x44273a CMP %RCX,%RAX |
0x44273d MOV -0xc0(%RBP),%R13 |
0x442744 MOV %RDX,%RBX |
0x442747 MOV -0x60(%RBP),%R14 |
0x44274b JGE 4427a0 |
0x44274d MOV -0x108(%RBP),%RDX |
0x442754 MOV (%RDX),%RDX |
0x442757 JMP 442768 |
(939) 0x442760 INC %RAX |
(939) 0x442763 CMP %RCX,%RAX |
(939) 0x442766 JGE 4427a0 |
(939) 0x442768 MOV -0x180(%RBP),%RSI |
(939) 0x44276f MOV (%RSI,%RAX,8),%RSI |
(939) 0x442773 MOV (%R9),%RDI |
(939) 0x442776 DEC %RDI |
(939) 0x442779 CMP %RDI,(%RDX,%RSI,8) |
(939) 0x44277d JNE 442760 |
(939) 0x44277f MOV -0x98(%RBP),%RCX |
(939) 0x442786 MOV -0x30(%RBP),%RDI |
(939) 0x44278a MOV %RDI,(%RCX,%RSI,8) |
(939) 0x44278e MOV -0xd0(%RBP),%RCX |
(939) 0x442795 MOV 0x8(%RCX,%RDI,8),%RCX |
(939) 0x44279a JMP 442760 |
0x4427a0 MOV -0xd8(%RBP),%RCX |
0x4427a7 MOV -0x30(%RBP),%RDX |
0x4427ab MOV (%RCX,%RDX,8),%RAX |
0x4427af MOV 0x8(%RCX,%RDX,8),%RCX |
0x4427b4 JMP 4427c3 |
(938) 0x4427c0 INC %RAX |
(938) 0x4427c3 CMP %RCX,%RAX |
(938) 0x4427c6 JGE 442800 |
(938) 0x4427c8 MOV -0x188(%RBP),%RDX |
(938) 0x4427cf MOV (%RDX,%RAX,8),%RDX |
(938) 0x4427d3 MOV (%R9),%RSI |
(938) 0x4427d6 DEC %RSI |
(938) 0x4427d9 MOV -0x190(%RBP),%RDI |
(938) 0x4427e0 CMP %RSI,(%RDI,%RDX,8) |
(938) 0x4427e4 JNE 4427c0 |
(938) 0x4427e6 MOV -0x78(%RBP),%RCX |
(938) 0x4427ea MOV -0x30(%RBP),%RSI |
(938) 0x4427ee MOV %RSI,(%RCX,%RDX,8) |
(938) 0x4427f2 MOV -0xd8(%RBP),%RCX |
(938) 0x4427f9 MOV 0x8(%RCX,%RSI,8),%RCX |
(938) 0x4427fe JMP 4427c0 |
0x442800 MOV -0x120(%RBP),%RAX |
0x442807 MOV -0x30(%RBP),%RCX |
0x44280b MOV (%RAX,%RCX,8),%RSI |
0x44280f MOV 0x8(%RAX,%RCX,8),%RCX |
0x442814 LEA 0x1(%RSI),%RDX |
0x442818 VXORPD %XMM1,%XMM1,%XMM1 |
0x44281c CMP %RCX,%RDX |
0x44281f MOV %RSI,-0x40(%RBP) |
0x442823 VXORPD %XMM0,%XMM0,%XMM0 |
0x442827 JGE 442be0 |
0x44282d MOV -0x58(%RBP),%RAX |
0x442831 JMP 442854 |
(933) 0x442840 MOV -0x48(%RBP),%R11 |
(933) 0x442844 INC %RDX |
(933) 0x442847 CMP %RCX,%RDX |
(933) 0x44284a MOV -0x50(%RBP),%R9 |
(933) 0x44284e JE 442be0 |
(933) 0x442854 MOV -0x170(%RBP),%RSI |
(933) 0x44285b MOV (%RSI,%RDX,8),%RSI |
(933) 0x44285f MOV -0x98(%RBP),%RDI |
(933) 0x442866 MOV -0x30(%RBP),%R8 |
(933) 0x44286a CMP %R8,(%RDI,%RSI,8) |
(933) 0x44286e JNE 4428b0 |
(933) 0x442870 MOV -0x70(%RBP),%R8 |
(933) 0x442874 MOV (%R8,%RSI,8),%RDI |
(933) 0x442878 MOV 0x8(%R8,%RSI,8),%R8 |
(933) 0x44287d MOV %R8,%R11 |
(933) 0x442880 SUB %RDI,%R11 |
(933) 0x442883 JLE 442a47 |
(933) 0x442889 MOV -0x90(%RBP),%R9 |
(933) 0x442890 MOV (%R9),%R9 |
(933) 0x442893 MOV -0x80(%RBP),%R10 |
(933) 0x442897 MOV (%R10),%R10 |
(933) 0x44289a CMP $0x4,%R11 |
(933) 0x44289e JAE 4428f5 |
(933) 0x4428a0 JMP 4429d4 |
(933) 0x4428b0 MOV -0x158(%RBP),%RDI |
(933) 0x4428b7 CMPQ $-0x3,(%RDI,%RSI,8) |
(933) 0x4428bc JE 442844 |
(933) 0x4428be CMPQ $0x1,-0xe0(%RBP) |
(933) 0x4428c6 JE 4428e1 |
(933) 0x4428c8 MOV -0xc8(%RBP),%R8 |
(933) 0x4428cf MOV -0x30(%RBP),%RDI |
(933) 0x4428d3 MOV (%R8,%RDI,8),%RDI |
(933) 0x4428d7 CMP (%R8,%RSI,8),%RDI |
(933) 0x4428db JNE 442844 |
(933) 0x4428e1 MOV -0x90(%RBP),%RSI |
(933) 0x4428e8 MOV (%RSI),%RSI |
(933) 0x4428eb VADDSD (%RSI,%RDX,8),%XMM0,%XMM0 |
(933) 0x4428f0 JMP 442844 |
(933) 0x4428f5 MOV %R11,%RBX |
(933) 0x4428f8 SHR $0x2,%RBX |
(933) 0x4428fc LEA 0x18(,%RDI,8),%R14 |
(933) 0x442904 NOPW %CS:(%RAX,%RAX,1) |
(936) 0x442910 MOV -0x18(%RAX,%R14,1),%R13 |
(936) 0x442915 VMOVSD -0x18(%R10,%R14,1),%XMM2 |
(936) 0x44291c VMOVSD (%R9,%RDX,8),%XMM3 |
(936) 0x442922 MOV (%R12,%R13,8),%R13 |
(936) 0x442926 VMOVSD (%R10,%R13,8),%XMM4 |
(936) 0x44292c VFMADD231SD %XMM2,%XMM3,%XMM4 |
(936) 0x442931 VMOVSD %XMM4,(%R10,%R13,8) |
(936) 0x442937 MOV -0x10(%RAX,%R14,1),%R13 |
(936) 0x44293c VMOVSD -0x10(%R10,%R14,1),%XMM4 |
(936) 0x442943 VMOVSD (%R9,%RDX,8),%XMM5 |
(936) 0x442949 MOV (%R12,%R13,8),%R13 |
(936) 0x44294d VMOVSD (%R10,%R13,8),%XMM6 |
(936) 0x442953 VFMADD231SD %XMM4,%XMM5,%XMM6 |
(936) 0x442958 VMOVSD %XMM6,(%R10,%R13,8) |
(936) 0x44295e VMOVSD -0x8(%R10,%R14,1),%XMM6 |
(936) 0x442965 VMULSD (%R9,%RDX,8),%XMM6,%XMM6 |
(936) 0x44296b MOV -0x8(%RAX,%R14,1),%R13 |
(936) 0x442970 MOV (%R12,%R13,8),%R13 |
(936) 0x442974 VADDSD (%R10,%R13,8),%XMM6,%XMM7 |
(936) 0x44297a VMOVSD %XMM7,(%R10,%R13,8) |
(936) 0x442980 VFMADD213SD %XMM6,%XMM5,%XMM4 |
(936) 0x442985 MOV (%RAX,%R14,1),%R13 |
(936) 0x442989 VMOVSD (%R10,%R14,1),%XMM5 |
(936) 0x44298f VMULSD (%R9,%RDX,8),%XMM5,%XMM18 |
(936) 0x442996 MOV (%R12,%R13,8),%R13 |
(936) 0x44299a VADDSD (%R10,%R13,8),%XMM18,%XMM5 |
(936) 0x4429a1 VMOVSD %XMM5,(%R10,%R13,8) |
(936) 0x4429a7 VADDSD %XMM1,%XMM4,%XMM1 |
(936) 0x4429ab VMOVAPD %XMM2,%XMM5 |
(936) 0x4429af VFMADD213SD %XMM18,%XMM3,%XMM5 |
(936) 0x4429b5 VADDSD %XMM1,%XMM5,%XMM1 |
(936) 0x4429b9 VADDSD %XMM0,%XMM4,%XMM0 |
(936) 0x4429bd VFMADD213SD %XMM18,%XMM3,%XMM2 |
(936) 0x4429c3 VADDSD %XMM0,%XMM2,%XMM0 |
(936) 0x4429c7 ADD $0x20,%R14 |
(936) 0x4429cb DEC %RBX |
(936) 0x4429ce JNE 442910 |
(933) 0x4429d4 MOV %R11,%RBX |
(933) 0x4429d7 AND $-0x4,%RBX |
(933) 0x4429db CMP %R11,%RBX |
(933) 0x4429de JAE 442a38 |
(933) 0x4429e0 ADD %RBX,%RDI |
(933) 0x4429e3 MOV -0xc0(%RBP),%R13 |
(933) 0x4429ea MOV -0x38(%RBP),%RBX |
(933) 0x4429ee MOV -0x60(%RBP),%R14 |
(933) 0x4429f2 NOPW %CS:(%RAX,%RAX,1) |
(937) 0x442a00 MOV (%RAX,%RDI,8),%R11 |
(937) 0x442a04 VMOVSD (%R10,%RDI,8),%XMM2 |
(937) 0x442a0a VMULSD (%R9,%RDX,8),%XMM2,%XMM18 |
(937) 0x442a11 MOV (%R12,%R11,8),%R11 |
(937) 0x442a15 VADDSD (%R10,%R11,8),%XMM18,%XMM2 |
(937) 0x442a1c VMOVSD %XMM2,(%R10,%R11,8) |
(937) 0x442a22 VADDSD %XMM1,%XMM18,%XMM1 |
(937) 0x442a28 VADDSD %XMM0,%XMM18,%XMM0 |
(937) 0x442a2e INC %RDI |
(937) 0x442a31 CMP %RDI,%R8 |
(937) 0x442a34 JNE 442a00 |
(933) 0x442a36 JMP 442a47 |
(933) 0x442a38 MOV -0xc0(%RBP),%R13 |
(933) 0x442a3f MOV -0x38(%RBP),%RBX |
(933) 0x442a43 MOV -0x60(%RBP),%R14 |
(933) 0x442a47 MOV -0x68(%RBP),%R8 |
(933) 0x442a4b MOV (%R8,%RSI,8),%RDI |
(933) 0x442a4f MOV 0x8(%R8,%RSI,8),%RSI |
(933) 0x442a54 MOV %RSI,%R10 |
(933) 0x442a57 SUB %RDI,%R10 |
(933) 0x442a5a JLE 442840 |
(933) 0x442a60 MOV -0x90(%RBP),%RAX |
(933) 0x442a67 MOV (%RAX),%R8 |
(933) 0x442a6a MOV -0x88(%RBP),%RAX |
(933) 0x442a71 MOV (%RAX),%R9 |
(933) 0x442a74 CMP $0x4,%R10 |
(933) 0x442a78 JAE 442a7f |
(933) 0x442a7a JMP 442b64 |
(933) 0x442a7f MOV %R10,%R11 |
(933) 0x442a82 SHR $0x2,%R11 |
(933) 0x442a86 MOV %RBX,%RAX |
(933) 0x442a89 LEA 0x18(,%RDI,8),%RBX |
(933) 0x442a91 NOPW %CS:(%RAX,%RAX,1) |
(934) 0x442aa0 MOV -0x18(%RAX,%RBX,1),%R14 |
(934) 0x442aa5 VMOVSD -0x18(%R9,%RBX,1),%XMM2 |
(934) 0x442aac VMOVSD (%R8,%RDX,8),%XMM3 |
(934) 0x442ab2 MOV (%R15,%R14,8),%R14 |
(934) 0x442ab6 VMOVSD (%R9,%R14,8),%XMM4 |
(934) 0x442abc VFMADD231SD %XMM2,%XMM3,%XMM4 |
(934) 0x442ac1 VMOVSD %XMM4,(%R9,%R14,8) |
(934) 0x442ac7 MOV -0x10(%RAX,%RBX,1),%R14 |
(934) 0x442acc VMOVSD -0x10(%R9,%RBX,1),%XMM4 |
(934) 0x442ad3 VMOVSD (%R8,%RDX,8),%XMM5 |
(934) 0x442ad9 MOV (%R15,%R14,8),%R14 |
(934) 0x442add VMOVSD (%R9,%R14,8),%XMM6 |
(934) 0x442ae3 VFMADD231SD %XMM4,%XMM5,%XMM6 |
(934) 0x442ae8 VMOVSD %XMM6,(%R9,%R14,8) |
(934) 0x442aee VMOVSD -0x8(%R9,%RBX,1),%XMM6 |
(934) 0x442af5 VMULSD (%R8,%RDX,8),%XMM6,%XMM6 |
(934) 0x442afb MOV -0x8(%RAX,%RBX,1),%R14 |
(934) 0x442b00 MOV (%R15,%R14,8),%R14 |
(934) 0x442b04 VADDSD (%R9,%R14,8),%XMM6,%XMM7 |
(934) 0x442b0a VMOVSD %XMM7,(%R9,%R14,8) |
(934) 0x442b10 VFMADD213SD %XMM6,%XMM5,%XMM4 |
(934) 0x442b15 MOV (%RAX,%RBX,1),%R14 |
(934) 0x442b19 VMOVSD (%R9,%RBX,1),%XMM5 |
(934) 0x442b1f VMULSD (%R8,%RDX,8),%XMM5,%XMM18 |
(934) 0x442b26 MOV (%R15,%R14,8),%R14 |
(934) 0x442b2a VADDSD (%R9,%R14,8),%XMM18,%XMM5 |
(934) 0x442b31 VMOVSD %XMM5,(%R9,%R14,8) |
(934) 0x442b37 VADDSD %XMM1,%XMM4,%XMM1 |
(934) 0x442b3b VMOVAPD %XMM2,%XMM5 |
(934) 0x442b3f VFMADD213SD %XMM18,%XMM3,%XMM5 |
(934) 0x442b45 VADDSD %XMM1,%XMM5,%XMM1 |
(934) 0x442b49 VADDSD %XMM0,%XMM4,%XMM0 |
(934) 0x442b4d VFMADD213SD %XMM18,%XMM3,%XMM2 |
(934) 0x442b53 VADDSD %XMM0,%XMM2,%XMM0 |
(934) 0x442b57 ADD $0x20,%RBX |
(934) 0x442b5b DEC %R11 |
(934) 0x442b5e JNE 442aa0 |
(933) 0x442b64 MOV %R10,%R11 |
(933) 0x442b67 AND $-0x4,%R11 |
(933) 0x442b6b CMP %R10,%R11 |
(933) 0x442b6e JAE 442bcb |
(933) 0x442b70 ADD %R11,%RDI |
(933) 0x442b73 MOV -0x48(%RBP),%R11 |
(933) 0x442b77 MOV -0x38(%RBP),%RBX |
(933) 0x442b7b MOV -0x58(%RBP),%RAX |
(933) 0x442b7f MOV -0x60(%RBP),%R14 |
(933) 0x442b83 NOPW %CS:(%RAX,%RAX,1) |
(935) 0x442b90 MOV (%RBX,%RDI,8),%R10 |
(935) 0x442b94 VMOVSD (%R9,%RDI,8),%XMM2 |
(935) 0x442b9a VMULSD (%R8,%RDX,8),%XMM2,%XMM18 |
(935) 0x442ba1 MOV (%R15,%R10,8),%R10 |
(935) 0x442ba5 VADDSD (%R9,%R10,8),%XMM18,%XMM2 |
(935) 0x442bac VMOVSD %XMM2,(%R9,%R10,8) |
(935) 0x442bb2 VADDSD %XMM1,%XMM18,%XMM1 |
(935) 0x442bb8 VADDSD %XMM0,%XMM18,%XMM0 |
(935) 0x442bbe INC %RDI |
(935) 0x442bc1 CMP %RDI,%RSI |
(935) 0x442bc4 JNE 442b90 |
(933) 0x442bc6 JMP 442844 |
(933) 0x442bcb MOV -0x48(%RBP),%R11 |
(933) 0x442bcf MOV -0x38(%RBP),%RBX |
(933) 0x442bd3 MOV -0x58(%RBP),%RAX |
(933) 0x442bd7 MOV -0x60(%RBP),%R14 |
(933) 0x442bdb JMP 442844 |
0x442be0 MOV -0x128(%RBP),%RAX |
0x442be7 MOV -0x30(%RBP),%RDX |
0x442beb MOV (%RAX,%RDX,8),%RCX |
0x442bef MOV 0x8(%RAX,%RDX,8),%RDX |
0x442bf4 CMP %RDX,%RCX |
0x442bf7 JGE 442d50 |
0x442bfd MOV -0x88(%RBP),%RBX |
0x442c04 MOV -0x80(%RBP),%RAX |
0x442c08 JMP 442c26 |
(931) 0x442c10 VADDSD (%R14,%RCX,8),%XMM0,%XMM0 |
(931) 0x442c16 INC %RCX |
(931) 0x442c19 CMP %RDX,%RCX |
(931) 0x442c1c MOV -0x50(%RBP),%R9 |
(931) 0x442c20 JE 442d57 |
(931) 0x442c26 MOV -0x178(%RBP),%RSI |
(931) 0x442c2d LEA (%RSI,%RCX,8),%RSI |
(931) 0x442c31 TEST %R13,%R13 |
(931) 0x442c34 JE 442c44 |
(931) 0x442c36 MOV (%RSI),%RSI |
(931) 0x442c39 MOV -0x160(%RBP),%RDI |
(931) 0x442c40 LEA (%RDI,%RSI,8),%RSI |
(931) 0x442c44 MOV (%RSI),%RDI |
(931) 0x442c47 TEST %RDI,%RDI |
(931) 0x442c4a JS 442d00 |
(931) 0x442c50 MOV -0x78(%RBP),%RSI |
(931) 0x442c54 MOV -0x30(%RBP),%R8 |
(931) 0x442c58 CMP %R8,(%RSI,%RDI,8) |
(931) 0x442c5c JNE 442d00 |
(931) 0x442c62 MOV -0x150(%RBP),%RSI |
(931) 0x442c69 MOV 0x8(%RSI,%RDI,8),%RSI |
(931) 0x442c6e TEST %RSI,%RSI |
(931) 0x442c71 JLE 442c16 |
(931) 0x442c73 MOV -0x140(%RBP),%R8 |
(931) 0x442c7a MOV (%R8,%RDI,8),%RDI |
(931) 0x442c7e ADD %RDI,%RSI |
(931) 0x442c81 MOV -0x148(%RBP),%R8 |
(931) 0x442c88 MOV (%R8),%R8 |
(931) 0x442c8b MOV (%R9),%R9 |
(931) 0x442c8e MOV (%R8,%R9,8),%R8 |
(931) 0x442c92 NOPW %CS:(%RAX,%RAX,1) |
(932) 0x442ca0 MOV (%R8,%RDI,8),%R9 |
(932) 0x442ca4 VMOVSD (%R11,%RDI,8),%XMM2 |
(932) 0x442caa VMULSD (%R14,%RCX,8),%XMM2,%XMM18 |
(932) 0x442cb1 TEST %R9,%R9 |
(932) 0x442cb4 LEA (%R15,%R9,8),%R10 |
(932) 0x442cb8 NOT %R9 |
(932) 0x442cbb LEA (%R12,%R9,8),%R9 |
(932) 0x442cbf CMOVNS %R10,%R9 |
(932) 0x442cc3 MOV %RBX,%R10 |
(932) 0x442cc6 CMOVS %RAX,%R10 |
(932) 0x442cca MOV (%R10),%R10 |
(932) 0x442ccd MOV (%R9),%R9 |
(932) 0x442cd0 VADDSD (%R10,%R9,8),%XMM18,%XMM2 |
(932) 0x442cd7 VMOVSD %XMM2,(%R10,%R9,8) |
(932) 0x442cdd VADDSD %XMM1,%XMM18,%XMM1 |
(932) 0x442ce3 VADDSD %XMM0,%XMM18,%XMM0 |
(932) 0x442ce9 INC %RDI |
(932) 0x442cec CMP %RSI,%RDI |
(932) 0x442cef JL 442ca0 |
(931) 0x442cf1 JMP 442c16 |
(931) 0x442d00 MOV -0x168(%RBP),%RSI |
(931) 0x442d07 CMPQ $-0x3,(%RSI,%RDI,8) |
(931) 0x442d0c JE 442c16 |
(931) 0x442d12 CMPQ $0x1,-0xe0(%RBP) |
(931) 0x442d1a JE 442c10 |
(931) 0x442d20 MOV -0x138(%RBP),%RSI |
(931) 0x442d27 MOV (%RSI,%RDI,8),%RSI |
(931) 0x442d2b MOV -0xc8(%RBP),%RDI |
(931) 0x442d32 MOV -0x30(%RBP),%R8 |
(931) 0x442d36 CMP (%RDI,%R8,8),%RSI |
(931) 0x442d3a JE 442c10 |
(931) 0x442d40 JMP 442c16 |
0x442d50 MOV -0x88(%RBP),%RBX |
0x442d57 MOV -0x110(%RBP),%RAX |
0x442d5e MOV -0x40(%RBP),%RCX |
0x442d62 VMULSD (%RAX,%RCX,8),%XMM1,%XMM1 |
0x442d67 VUCOMISD %XMM16,%XMM1 |
0x442d6d JE 442d7b |
0x442d6f VXORPD %XMM17,%XMM0,%XMM0 |
0x442d75 VDIVSD %XMM1,%XMM0,%XMM18 |
0x442d7b MOV -0x70(%RBP),%RAX |
0x442d7f MOV -0x30(%RBP),%RCX |
0x442d83 MOV (%RAX,%RCX,8),%RSI |
0x442d87 MOV 0x8(%RAX,%RCX,8),%RAX |
0x442d8c MOV %RAX,%RDI |
0x442d8f SUB %RSI,%RDI |
0x442d92 JLE 442e04 |
0x442d94 MOV -0x80(%RBP),%RCX |
0x442d98 MOV (%RCX),%RCX |
0x442d9b MOV %RDI,%RDX |
0x442d9e AND $-0x4,%RDX |
0x442da2 JE 442de0 |
0x442da4 LEA -0x1(%RDX),%R8 |
0x442da8 VBROADCASTSD %XMM18,%YMM0 |
0x442dae LEA (%RCX,%RSI,8),%R9 |
0x442db2 XOR %R10D,%R10D |
0x442db5 NOPW %CS:(%RAX,%RAX,1) |
(930) 0x442dc0 VMULPD (%R9,%R10,8),%YMM0,%YMM1 |
(930) 0x442dc6 VMOVUPD %YMM1,(%R9,%R10,8) |
(930) 0x442dcc ADD $0x4,%R10 |
(930) 0x442dd0 CMP %R8,%R10 |
(930) 0x442dd3 JBE 442dc0 |
0x442dd5 CMP %RDX,%RDI |
0x442dd8 MOV -0x50(%RBP),%R9 |
0x442ddc JNE 442de2 |
0x442dde JMP 442e04 |
0x442de0 XOR %EDX,%EDX |
0x442de2 ADD %RSI,%RDX |
0x442de5 NOPW %CS:(%RAX,%RAX,1) |
(929) 0x442df0 VMULSD (%RCX,%RDX,8),%XMM18,%XMM0 |
(929) 0x442df7 VMOVSD %XMM0,(%RCX,%RDX,8) |
(929) 0x442dfc INC %RDX |
(929) 0x442dff CMP %RDX,%RAX |
(929) 0x442e02 JNE 442df0 |
0x442e04 MOV -0x68(%RBP),%RAX |
0x442e08 MOV -0x30(%RBP),%RCX |
0x442e0c MOV (%RAX,%RCX,8),%RSI |
0x442e10 MOV 0x8(%RAX,%RCX,8),%RAX |
0x442e15 MOV %RAX,%RDI |
0x442e18 SUB %RSI,%RDI |
0x442e1b JLE 4423d0 |
0x442e21 MOV (%RBX),%RCX |
0x442e24 MOV %RDI,%RDX |
0x442e27 AND $-0x4,%RDX |
0x442e2b JE 442e64 |
0x442e2d LEA -0x1(%RDX),%R8 |
0x442e31 VBROADCASTSD %XMM18,%YMM0 |
0x442e37 LEA (%RCX,%RSI,8),%R9 |
0x442e3b XOR %R10D,%R10D |
0x442e3e XCHG %AX,%AX |
(928) 0x442e40 VMULPD (%R9,%R10,8),%YMM0,%YMM1 |
(928) 0x442e46 VMOVUPD %YMM1,(%R9,%R10,8) |
(928) 0x442e4c ADD $0x4,%R10 |
(928) 0x442e50 CMP %R8,%R10 |
(928) 0x442e53 JBE 442e40 |
0x442e55 CMP %RDX,%RDI |
0x442e58 MOV -0x50(%RBP),%R9 |
0x442e5c JE 4423d0 |
0x442e62 JMP 442e66 |
0x442e64 XOR %EDX,%EDX |
0x442e66 ADD %RSI,%RDX |
0x442e69 NOPL (%RAX) |
(927) 0x442e70 VMULSD (%RCX,%RDX,8),%XMM18,%XMM0 |
(927) 0x442e77 VMOVSD %XMM0,(%RCX,%RDX,8) |
(927) 0x442e7c INC %RDX |
(927) 0x442e7f CMP %RDX,%RAX |
(927) 0x442e82 JNE 442e70 |
0x442e84 JMP 4423d0 |
/scratch_na/users/xoserete/qaas_runs/171-172-8217/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 1747 - 1876 |
-------------------------------------------------------------------------------- |
1747: if (n_fine) |
[...] |
1774: for (i=thread_start; i < thread_stop; i++) |
1775: { |
1776: i1 = pass_array[i]; |
1777: sum_C = 0; |
1778: sum_N = 0; |
1779: j_start = P_diag_start[i1]; |
1780: j_end = j_start+P_diag_i[i1+1]-P_diag_i[i1]; |
1781: cnt = P_diag_i[i1]; |
1782: for (j=j_start; j < j_end; j++) |
1783: { |
1784: k1 = P_diag_pass[pass][j]; |
1785: tmp_array[k1] = cnt; |
1786: P_diag_data[cnt] = 0; |
1787: P_diag_j[cnt++] = k1; |
1788: } |
1789: j_start = P_offd_start[i1]; |
1790: j_end = j_start+P_offd_i[i1+1]-P_offd_i[i1]; |
1791: cnt_offd = P_offd_i[i1]; |
1792: for (j=j_start; j < j_end; j++) |
1793: { |
1794: k1 = P_offd_pass[pass][j]; |
1795: tmp_array_offd[k1] = cnt_offd; |
1796: P_offd_data[cnt_offd] = 0; |
1797: P_offd_j[cnt_offd++] = k1; |
1798: } |
1799: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
1800: { |
1801: j1 = S_diag_j[j]; |
1802: if (assigned[j1] == pass-1) |
1803: tmp_marker[j1] = i1; |
1804: } |
1805: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
1806: { |
1807: j1 = S_offd_j[j]; |
1808: if (assigned_offd[j1] == pass-1) |
1809: tmp_marker_offd[j1] = i1; |
1810: } |
1811: for (j=A_diag_i[i1]+1; j < A_diag_i[i1+1]; j++) |
1812: { |
1813: j1 = A_diag_j[j]; |
1814: if (tmp_marker[j1] == i1) |
1815: { |
1816: for (k=P_diag_i[j1]; k < P_diag_i[j1+1]; k++) |
1817: { |
1818: k1 = P_diag_j[k]; |
1819: alfa = A_diag_data[j]*P_diag_data[k]; |
1820: P_diag_data[tmp_array[k1]] += alfa; |
1821: sum_C += alfa; |
1822: sum_N += alfa; |
1823: } |
1824: for (k=P_offd_i[j1]; k < P_offd_i[j1+1]; k++) |
1825: { |
1826: k1 = P_offd_j[k]; |
1827: alfa = A_diag_data[j]*P_offd_data[k]; |
1828: P_offd_data[tmp_array_offd[k1]] += alfa; |
1829: sum_C += alfa; |
1830: sum_N += alfa; |
1831: } |
1832: } |
1833: else |
1834: { |
1835: if (CF_marker[j1] != -3 && |
1836: (num_functions == 1 || dof_func[i1] == dof_func[j1])) |
1837: sum_N += A_diag_data[j]; |
1838: } |
1839: } |
1840: for (j=A_offd_i[i1]; j < A_offd_i[i1+1]; j++) |
1841: { |
1842: if (col_offd_S_to_A) |
1843: j1 = map_A_to_S[A_offd_j[j]]; |
1844: else |
1845: j1 = A_offd_j[j]; |
1846: |
1847: if (j1 > -1 && tmp_marker_offd[j1] == i1) |
1848: { |
1849: j_start = Pext_start[j1]; |
1850: j_end = j_start+Pext_i[j1+1]; |
1851: for (k=j_start; k < j_end; k++) |
1852: { |
1853: k1 = Pext_pass[pass][k]; |
1854: alfa = A_offd_data[j]*Pext_data[k]; |
1855: if (k1 < 0) |
1856: P_diag_data[tmp_array[-k1-1]] += alfa; |
1857: else |
1858: P_offd_data[tmp_array_offd[k1]] += alfa; |
1859: sum_C += alfa; |
1860: sum_N += alfa; |
1861: } |
1862: } |
1863: else |
1864: { |
1865: if (CF_marker_offd[j1] != -3 && |
1866: (num_functions == 1 || dof_func_offd[j1] == dof_func[i1])) |
1867: sum_N += A_offd_data[j]; |
1868: } |
1869: } |
1870: diagonal = A_diag_data[A_diag_i[i1]]; |
1871: if (sum_C*diagonal) alfa = -sum_N/(sum_C*diagonal); |
1872: |
1873: for (j=P_diag_i[i1]; j < P_diag_i[i1+1]; j++) |
1874: P_diag_data[j] *= alfa; |
1875: for (j=P_offd_i[i1]; j < P_offd_i[i1+1]; j++) |
1876: P_offd_data[j] *= alfa; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 3.41 |
CQA speedup if FP arith vectorized | 3.58 |
CQA speedup if fully vectorized | 13.29 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.29 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass.extracted.28 |
Source | par_multi_interp.c:1747-1747,par_multi_interp.c:1774-1776,par_multi_interp.c:1779-1786,par_multi_interp.c:1789-1796,par_multi_interp.c:1799-1799,par_multi_interp.c:1802-1802,par_multi_interp.c:1805-1805,par_multi_interp.c:1811-1811,par_multi_interp.c:1824-1824,par_multi_interp.c:1840-1840,par_multi_interp.c:1865-1865,par_multi_interp.c:1871-1876 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 33.50 |
CQA cycles if no scalar integer | 9.83 |
CQA cycles if FP arith vectorized | 9.35 |
CQA cycles if fully vectorized | 2.52 |
Front-end cycles | 33.50 |
DIV/SQRT cycles | 10.70 |
P0 cycles | 10.60 |
P1 cycles | 26.00 |
P2 cycles | 26.00 |
P3 cycles | 4.50 |
P4 cycles | 10.60 |
P5 cycles | 10.50 |
P6 cycles | 4.50 |
P7 cycles | 4.50 |
P8 cycles | 4.50 |
P9 cycles | 10.60 |
P10 cycles | 26.00 |
P11 cycles | 4.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 33.34 - 33.36 |
Stall cycles (UFS) | 0.17 |
Nb insns | 196.00 |
Nb uops | 200.00 |
Nb loads | 78.00 |
Nb stores | 7.00 |
Nb stack references | 28.00 |
FLOP/cycle | 0.06 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 1.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 1.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 20.30 |
Bytes prefetched | 0.00 |
Bytes loaded | 624.00 |
Bytes stored | 56.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 11.63 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 20.83 |
Vector-efficiency ratio all | 13.66 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 14.58 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 3.41 |
CQA speedup if FP arith vectorized | 3.58 |
CQA speedup if fully vectorized | 13.29 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.29 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass.extracted.28 |
Source | par_multi_interp.c:1747-1747,par_multi_interp.c:1774-1776,par_multi_interp.c:1779-1786,par_multi_interp.c:1789-1796,par_multi_interp.c:1799-1799,par_multi_interp.c:1802-1802,par_multi_interp.c:1805-1805,par_multi_interp.c:1811-1811,par_multi_interp.c:1824-1824,par_multi_interp.c:1840-1840,par_multi_interp.c:1865-1865,par_multi_interp.c:1871-1876 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 33.50 |
CQA cycles if no scalar integer | 9.83 |
CQA cycles if FP arith vectorized | 9.35 |
CQA cycles if fully vectorized | 2.52 |
Front-end cycles | 33.50 |
DIV/SQRT cycles | 10.70 |
P0 cycles | 10.60 |
P1 cycles | 26.00 |
P2 cycles | 26.00 |
P3 cycles | 4.50 |
P4 cycles | 10.60 |
P5 cycles | 10.50 |
P6 cycles | 4.50 |
P7 cycles | 4.50 |
P8 cycles | 4.50 |
P9 cycles | 10.60 |
P10 cycles | 26.00 |
P11 cycles | 4.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 33.34 - 33.36 |
Stall cycles (UFS) | 0.17 |
Nb insns | 196.00 |
Nb uops | 200.00 |
Nb loads | 78.00 |
Nb stores | 7.00 |
Nb stack references | 28.00 |
FLOP/cycle | 0.06 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 1.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 1.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 20.30 |
Bytes prefetched | 0.00 |
Bytes loaded | 624.00 |
Bytes stored | 56.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 11.63 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 20.83 |
Vector-efficiency ratio all | 13.66 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 14.58 |
Path / |
Function | hypre_BoomerAMGBuildMultipass.extracted.28 |
Source file and lines | par_multi_interp.c:1747-1876 |
Module | exec |
nb instructions | 196 |
nb uops | 200 |
loop length | 869 |
used x86 registers | 13 |
used mmx registers | 0 |
used xmm registers | 5 |
used ymm registers | 1 |
used zmm registers | 0 |
nb stack references | 28 |
micro-operation queue | 33.50 cycles |
front end | 33.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 10.70 | 10.60 | 26.00 | 26.00 | 4.50 | 10.60 | 10.50 | 4.50 | 4.50 | 4.50 | 10.60 | 26.00 |
cycles | 10.70 | 10.60 | 26.00 | 26.00 | 4.50 | 10.60 | 10.50 | 4.50 | 4.50 | 4.50 | 10.60 | 26.00 |
Cycles executing div or sqrt instructions | 4.00 |
FE+BE cycles | 33.34-33.36 |
Stall cycles | 0.17 |
LM full (events) | 0.67 |
Front-end | 33.50 |
Dispatch | 26.00 |
DIV/SQRT | 4.00 |
Overall L1 | 33.50 |
all | 5% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 37% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 50% |
all | 11% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 20% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 13% |
all | 17% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 18% |
all | 13% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 14% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0xb8(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP -0xb0(%RBP),%R8 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 442e89 <hypre_BoomerAMGBuildMultipass.extracted.28+0xe49> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R8,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x118(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%R8,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x130(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%RAX,%RCX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RSI,%R14,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %R13,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %RAX,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 442586 <hypre_BoomerAMGBuildMultipass.extracted.28+0x546> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xf8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R13,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0xc,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 442550 <hypre_BoomerAMGBuildMultipass.extracted.28+0x510> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RSI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RAX,%R13,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (,%RCX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RCX,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 4e0430 <__intel_avx_rep_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xa0(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA (,%R14,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xf0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RDX,%R13,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R10,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x48(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JAE 442586 <hypre_BoomerAMGBuildMultipass.extracted.28+0x546> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RAX,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RAX,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 442586 <hypre_BoomerAMGBuildMultipass.extracted.28+0x546> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xa8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX,%RCX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RSI,%R14,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %R13,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %RAX,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x38(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 442726 <hypre_BoomerAMGBuildMultipass.extracted.28+0x6e6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x100(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R13,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0xc,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 4426f0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x6b0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RSI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RAX,%R13,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (,%RCX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RCX,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 4e0430 <__intel_avx_rep_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xa0(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA (,%R14,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xe8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RDX,%R13,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R10,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x48(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JAE 442726 <hypre_BoomerAMGBuildMultipass.extracted.28+0x6e6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RAX,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RAX,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 442726 <hypre_BoomerAMGBuildMultipass.extracted.28+0x6e6> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x38(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xd0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RSI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%RSI,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xc0(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x60(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 4427a0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x760> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x108(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 442768 <hypre_BoomerAMGBuildMultipass.extracted.28+0x728> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0xd8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RDX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%RDX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4427c3 <hypre_BoomerAMGBuildMultipass.extracted.28+0x783> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x120(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX,%RCX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RSI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VXORPD %XMM1,%XMM1,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RSI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JGE 442be0 <hypre_BoomerAMGBuildMultipass.extracted.28+0xba0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 442854 <hypre_BoomerAMGBuildMultipass.extracted.28+0x814> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x128(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RDX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX,%RDX,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 442d50 <hypre_BoomerAMGBuildMultipass.extracted.28+0xd10> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x88(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 442c26 <hypre_BoomerAMGBuildMultipass.extracted.28+0xbe6> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x88(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x110(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD (%RAX,%RCX,8),%XMM1,%XMM1 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VUCOMISD %XMM16,%XMM1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JE 442d7b <hypre_BoomerAMGBuildMultipass.extracted.28+0xd3b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VXORPD %XMM17,%XMM0,%XMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VDIVSD %XMM1,%XMM0,%XMM18 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 4 |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX,%RCX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RSI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 442e04 <hypre_BoomerAMGBuildMultipass.extracted.28+0xdc4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x80(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 442de0 <hypre_BoomerAMGBuildMultipass.extracted.28+0xda0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%RDX),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VBROADCASTSD %XMM18,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%RCX,%RSI,8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x50(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 442de2 <hypre_BoomerAMGBuildMultipass.extracted.28+0xda2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 442e04 <hypre_BoomerAMGBuildMultipass.extracted.28+0xdc4> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX,%RCX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RSI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 4423d0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x390> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%RBX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 442e64 <hypre_BoomerAMGBuildMultipass.extracted.28+0xe24> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%RDX),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VBROADCASTSD %XMM18,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%RCX,%RSI,8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x50(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 4423d0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x390> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 442e66 <hypre_BoomerAMGBuildMultipass.extracted.28+0xe26> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4423d0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x390> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
Function | hypre_BoomerAMGBuildMultipass.extracted.28 |
Source file and lines | par_multi_interp.c:1747-1876 |
Module | exec |
nb instructions | 196 |
nb uops | 200 |
loop length | 869 |
used x86 registers | 13 |
used mmx registers | 0 |
used xmm registers | 5 |
used ymm registers | 1 |
used zmm registers | 0 |
nb stack references | 28 |
micro-operation queue | 33.50 cycles |
front end | 33.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 10.70 | 10.60 | 26.00 | 26.00 | 4.50 | 10.60 | 10.50 | 4.50 | 4.50 | 4.50 | 10.60 | 26.00 |
cycles | 10.70 | 10.60 | 26.00 | 26.00 | 4.50 | 10.60 | 10.50 | 4.50 | 4.50 | 4.50 | 10.60 | 26.00 |
Cycles executing div or sqrt instructions | 4.00 |
FE+BE cycles | 33.34-33.36 |
Stall cycles | 0.17 |
LM full (events) | 0.67 |
Front-end | 33.50 |
Dispatch | 26.00 |
DIV/SQRT | 4.00 |
Overall L1 | 33.50 |
all | 5% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 37% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 50% |
all | 11% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 20% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 13% |
all | 17% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 18% |
all | 13% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 14% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0xb8(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP -0xb0(%RBP),%R8 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 442e89 <hypre_BoomerAMGBuildMultipass.extracted.28+0xe49> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R8,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x118(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%R8,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x130(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%RAX,%RCX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RSI,%R14,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %R13,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %RAX,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 442586 <hypre_BoomerAMGBuildMultipass.extracted.28+0x546> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xf8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R13,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0xc,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 442550 <hypre_BoomerAMGBuildMultipass.extracted.28+0x510> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RSI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RAX,%R13,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (,%RCX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RCX,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 4e0430 <__intel_avx_rep_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xa0(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA (,%R14,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xf0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RDX,%R13,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R10,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x48(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JAE 442586 <hypre_BoomerAMGBuildMultipass.extracted.28+0x546> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RAX,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RAX,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 442586 <hypre_BoomerAMGBuildMultipass.extracted.28+0x546> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xa8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX,%RCX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RSI,%R14,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %R13,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %RAX,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x38(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 442726 <hypre_BoomerAMGBuildMultipass.extracted.28+0x6e6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x100(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R13,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0xc,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 4426f0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x6b0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RSI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RAX,%R13,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (,%RCX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RCX,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 4e0430 <__intel_avx_rep_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xa0(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA (,%R14,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xe8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RDX,%R13,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R10,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x48(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JAE 442726 <hypre_BoomerAMGBuildMultipass.extracted.28+0x6e6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RAX,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RAX,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 442726 <hypre_BoomerAMGBuildMultipass.extracted.28+0x6e6> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x38(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xd0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RSI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%RSI,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xc0(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x60(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 4427a0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x760> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x108(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 442768 <hypre_BoomerAMGBuildMultipass.extracted.28+0x728> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0xd8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RDX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%RDX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4427c3 <hypre_BoomerAMGBuildMultipass.extracted.28+0x783> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x120(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX,%RCX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RSI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VXORPD %XMM1,%XMM1,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RSI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JGE 442be0 <hypre_BoomerAMGBuildMultipass.extracted.28+0xba0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 442854 <hypre_BoomerAMGBuildMultipass.extracted.28+0x814> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x128(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RDX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX,%RDX,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 442d50 <hypre_BoomerAMGBuildMultipass.extracted.28+0xd10> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x88(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 442c26 <hypre_BoomerAMGBuildMultipass.extracted.28+0xbe6> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x88(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x110(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD (%RAX,%RCX,8),%XMM1,%XMM1 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VUCOMISD %XMM16,%XMM1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JE 442d7b <hypre_BoomerAMGBuildMultipass.extracted.28+0xd3b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VXORPD %XMM17,%XMM0,%XMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VDIVSD %XMM1,%XMM0,%XMM18 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 4 |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX,%RCX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RSI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 442e04 <hypre_BoomerAMGBuildMultipass.extracted.28+0xdc4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x80(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 442de0 <hypre_BoomerAMGBuildMultipass.extracted.28+0xda0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%RDX),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VBROADCASTSD %XMM18,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%RCX,%RSI,8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x50(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 442de2 <hypre_BoomerAMGBuildMultipass.extracted.28+0xda2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 442e04 <hypre_BoomerAMGBuildMultipass.extracted.28+0xdc4> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX,%RCX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RSI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 4423d0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x390> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%RBX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 442e64 <hypre_BoomerAMGBuildMultipass.extracted.28+0xe24> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%RDX),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VBROADCASTSD %XMM18,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%RCX,%RSI,8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x50(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 4423d0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x390> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 442e66 <hypre_BoomerAMGBuildMultipass.extracted.28+0xe26> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4423d0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x390> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |