Loop Id: 1324 | Module: libparcsr_ls.so | Source: par_multi_interp.c:917-999 [...] | Coverage: 0.05% |
---|
Loop Id: 1324 | Module: libparcsr_ls.so | Source: par_multi_interp.c:917-999 [...] | Coverage: 0.05% |
---|
0x4efd0 MOV -0x60(%RBP),%RDI |
0x4efd4 INC %RDI |
0x4efd7 CMP -0xe0(%RBP),%RDI |
0x4efde MOV -0x68(%RBP),%RDX |
0x4efe2 JGE 4f3d5 |
0x4efe8 MOV -0xf0(%RBP),%RSI |
0x4efef MOV %RDI,-0x60(%RBP) |
0x4eff3 MOV (%RSI,%RDI,8),%R8 |
0x4eff7 MOV %RAX,(%RDX,%R8,8) |
0x4effb MOV -0x50(%RBP),%RDX |
0x4efff MOV %RCX,(%RDX,%R8,8) |
0x4f003 MOV -0xa0(%RBP),%RDX |
0x4f00a MOV (%RDX,%R8,8),%RSI |
0x4f00e CMP 0x8(%RDX,%R8,8),%RSI |
0x4f013 JGE 4f2e0 |
0x4f019 MOV -0x110(%RBP),%RDX |
0x4f020 MOV (%RDX),%RDI |
0x4f023 MOV %RDI,-0x48(%RBP) |
0x4f027 JMP 4f04d |
(1327) 0x4f030 MOV -0x30(%RBP),%RSI |
(1327) 0x4f034 MOV -0x48(%RBP),%RDI |
(1327) 0x4f038 INC %RSI |
(1327) 0x4f03b MOV -0xa0(%RBP),%RDX |
(1327) 0x4f042 CMP 0x8(%RDX,%R8,8),%RSI |
(1327) 0x4f047 JGE 4f2e0 |
(1327) 0x4f04d MOV -0x140(%RBP),%RDX |
(1327) 0x4f054 MOV (%RDX,%RSI,8),%R11 |
(1327) 0x4f058 MOV (%R14),%RDX |
(1327) 0x4f05b DEC %RDX |
(1327) 0x4f05e CMP %RDX,(%RDI,%R11,8) |
(1327) 0x4f062 JNE 4f038 |
(1327) 0x4f064 MOV %RSI,-0x30(%RBP) |
(1327) 0x4f068 MOV -0xf8(%RBP),%RDX |
(1327) 0x4f06f MOV (%RDX),%RDX |
(1327) 0x4f072 MOV 0x8(%RDX,%R11,8),%RSI |
(1327) 0x4f077 TEST %RSI,%RSI |
(1327) 0x4f07a JLE 4f0cc |
(1327) 0x4f07c MOV -0x68(%RBP),%RDI |
(1327) 0x4f080 MOV %R11,-0x38(%RBP) |
(1327) 0x4f084 MOV (%RDI,%R11,8),%RDI |
(1327) 0x4f088 ADD %RDI,%RSI |
(1327) 0x4f08b MOV -0xa8(%RBP),%R9 |
(1327) 0x4f092 MOV (%R9),%R10 |
(1327) 0x4f095 LEA 0x1(%RDI),%R9 |
(1327) 0x4f099 CMP %R9,%RSI |
(1327) 0x4f09c CMOVLE %R9,%RSI |
(1327) 0x4f0a0 MOV %RSI,%R9 |
(1327) 0x4f0a3 SUB %RDI,%R9 |
(1327) 0x4f0a6 CMP $0x4,%R9 |
(1327) 0x4f0aa MOV %R9,-0x70(%RBP) |
(1327) 0x4f0ae JAE 4f15c |
(1327) 0x4f0b4 MOV -0x70(%RBP),%R11 |
(1327) 0x4f0b8 MOV %R11,%R9 |
(1327) 0x4f0bb AND $-0x4,%R9 |
(1327) 0x4f0bf CMP %R11,%R9 |
(1327) 0x4f0c2 JNE 4f1fd |
(1327) 0x4f0c8 MOV -0x38(%RBP),%R11 |
(1327) 0x4f0cc MOV -0x100(%RBP),%RDX |
(1327) 0x4f0d3 MOV (%RDX),%RDX |
(1327) 0x4f0d6 MOV 0x8(%RDX,%R11,8),%RSI |
(1327) 0x4f0db TEST %RSI,%RSI |
(1327) 0x4f0de JLE 4f030 |
(1327) 0x4f0e4 MOV -0x50(%RBP),%RDI |
(1327) 0x4f0e8 MOV (%RDI,%R11,8),%RDI |
(1327) 0x4f0ec ADD %RDI,%RSI |
(1327) 0x4f0ef MOV -0x78(%RBP),%R9 |
(1327) 0x4f0f3 MOV (%R9),%R10 |
(1327) 0x4f0f6 LEA 0x1(%RDI),%R9 |
(1327) 0x4f0fa CMP %R9,%RSI |
(1327) 0x4f0fd CMOVLE %R9,%RSI |
(1327) 0x4f101 MOV %RSI,%R9 |
(1327) 0x4f104 SUB %RDI,%R9 |
(1327) 0x4f107 CMP $0x4,%R9 |
(1327) 0x4f10b MOV %R9,-0x38(%RBP) |
(1327) 0x4f10f JAE 4f23c |
(1327) 0x4f115 MOV -0x38(%RBP),%R11 |
(1327) 0x4f119 MOV %R11,%R9 |
(1327) 0x4f11c AND $-0x4,%R9 |
(1327) 0x4f120 CMP %R11,%R9 |
(1327) 0x4f123 JE 4f030 |
(1327) 0x4f129 ADD %R9,%RDI |
(1327) 0x4f12c JMP 4f13c |
(1328) 0x4f130 INC %RDI |
(1328) 0x4f133 CMP %RDI,%RSI |
(1328) 0x4f136 JE 4f030 |
(1328) 0x4f13c MOV (%R14),%R9 |
(1328) 0x4f13f MOV -0x8(%R10,%R9,8),%R9 |
(1328) 0x4f144 MOV (%R9,%RDI,8),%R9 |
(1328) 0x4f148 CMP %R8,(%R15,%R9,8) |
(1328) 0x4f14c JE 4f130 |
(1328) 0x4f14e INC %RCX |
(1328) 0x4f151 INCQ 0x8(%RDX,%R8,8) |
(1328) 0x4f156 MOV %R8,(%R15,%R9,8) |
(1328) 0x4f15a JMP 4f130 |
(1327) 0x4f15c MOV %R9,%R13 |
(1327) 0x4f15f SHR $0x2,%R13 |
(1327) 0x4f163 LEA (,%RDI,8),%R12 |
(1327) 0x4f16b JMP 4f17d |
(1331) 0x4f170 ADD $0x20,%R12 |
(1331) 0x4f174 DEC %R13 |
(1331) 0x4f177 JE 4f0b4 |
(1331) 0x4f17d MOV (%R14),%R9 |
(1331) 0x4f180 MOV -0x8(%R10,%R9,8),%R11 |
(1331) 0x4f185 MOV (%R11,%R12,1),%R9 |
(1331) 0x4f189 CMP %R8,(%RBX,%R9,8) |
(1331) 0x4f18d JE 4f1a3 |
(1331) 0x4f18f INCQ 0x8(%RDX,%R8,8) |
(1331) 0x4f194 INC %RAX |
(1331) 0x4f197 MOV %R8,(%RBX,%R9,8) |
(1331) 0x4f19b MOV (%R14),%R9 |
(1331) 0x4f19e MOV -0x8(%R10,%R9,8),%R11 |
(1331) 0x4f1a3 MOV 0x8(%R11,%R12,1),%R9 |
(1331) 0x4f1a8 CMP %R8,(%RBX,%R9,8) |
(1331) 0x4f1ac JE 4f1c2 |
(1331) 0x4f1ae INCQ 0x8(%RDX,%R8,8) |
(1331) 0x4f1b3 INC %RAX |
(1331) 0x4f1b6 MOV %R8,(%RBX,%R9,8) |
(1331) 0x4f1ba MOV (%R14),%R9 |
(1331) 0x4f1bd MOV -0x8(%R10,%R9,8),%R11 |
(1331) 0x4f1c2 MOV 0x10(%R11,%R12,1),%R9 |
(1331) 0x4f1c7 CMP %R8,(%RBX,%R9,8) |
(1331) 0x4f1cb JE 4f1e1 |
(1331) 0x4f1cd INCQ 0x8(%RDX,%R8,8) |
(1331) 0x4f1d2 INC %RAX |
(1331) 0x4f1d5 MOV %R8,(%RBX,%R9,8) |
(1331) 0x4f1d9 MOV (%R14),%R9 |
(1331) 0x4f1dc MOV -0x8(%R10,%R9,8),%R11 |
(1331) 0x4f1e1 MOV 0x18(%R11,%R12,1),%R9 |
(1331) 0x4f1e6 CMP %R8,(%RBX,%R9,8) |
(1331) 0x4f1ea JE 4f170 |
(1331) 0x4f1ec INC %RAX |
(1331) 0x4f1ef INCQ 0x8(%RDX,%R8,8) |
(1331) 0x4f1f4 MOV %R8,(%RBX,%R9,8) |
(1331) 0x4f1f8 JMP 4f170 |
(1327) 0x4f1fd ADD %R9,%RDI |
(1327) 0x4f200 MOV -0x38(%RBP),%R11 |
(1327) 0x4f204 JMP 4f21c |
(1330) 0x4f210 INC %RDI |
(1330) 0x4f213 CMP %RDI,%RSI |
(1330) 0x4f216 JE 4f0cc |
(1330) 0x4f21c MOV (%R14),%R9 |
(1330) 0x4f21f MOV -0x8(%R10,%R9,8),%R9 |
(1330) 0x4f224 MOV (%R9,%RDI,8),%R9 |
(1330) 0x4f228 CMP %R8,(%RBX,%R9,8) |
(1330) 0x4f22c JE 4f210 |
(1330) 0x4f22e INC %RAX |
(1330) 0x4f231 INCQ 0x8(%RDX,%R8,8) |
(1330) 0x4f236 MOV %R8,(%RBX,%R9,8) |
(1330) 0x4f23a JMP 4f210 |
(1327) 0x4f23c MOV %R9,%R12 |
(1327) 0x4f23f SHR $0x2,%R12 |
(1327) 0x4f243 LEA (,%RDI,8),%R13 |
(1327) 0x4f24b JMP 4f25d |
(1329) 0x4f250 ADD $0x20,%R13 |
(1329) 0x4f254 DEC %R12 |
(1329) 0x4f257 JE 4f115 |
(1329) 0x4f25d MOV (%R14),%R9 |
(1329) 0x4f260 MOV -0x8(%R10,%R9,8),%R11 |
(1329) 0x4f265 MOV (%R11,%R13,1),%R9 |
(1329) 0x4f269 CMP %R8,(%R15,%R9,8) |
(1329) 0x4f26d JE 4f283 |
(1329) 0x4f26f INCQ 0x8(%RDX,%R8,8) |
(1329) 0x4f274 INC %RCX |
(1329) 0x4f277 MOV %R8,(%R15,%R9,8) |
(1329) 0x4f27b MOV (%R14),%R9 |
(1329) 0x4f27e MOV -0x8(%R10,%R9,8),%R11 |
(1329) 0x4f283 MOV 0x8(%R11,%R13,1),%R9 |
(1329) 0x4f288 CMP %R8,(%R15,%R9,8) |
(1329) 0x4f28c JE 4f2a2 |
(1329) 0x4f28e INCQ 0x8(%RDX,%R8,8) |
(1329) 0x4f293 INC %RCX |
(1329) 0x4f296 MOV %R8,(%R15,%R9,8) |
(1329) 0x4f29a MOV (%R14),%R9 |
(1329) 0x4f29d MOV -0x8(%R10,%R9,8),%R11 |
(1329) 0x4f2a2 MOV 0x10(%R11,%R13,1),%R9 |
(1329) 0x4f2a7 CMP %R8,(%R15,%R9,8) |
(1329) 0x4f2ab JE 4f2c1 |
(1329) 0x4f2ad INCQ 0x8(%RDX,%R8,8) |
(1329) 0x4f2b2 INC %RCX |
(1329) 0x4f2b5 MOV %R8,(%R15,%R9,8) |
(1329) 0x4f2b9 MOV (%R14),%R9 |
(1329) 0x4f2bc MOV -0x8(%R10,%R9,8),%R11 |
(1329) 0x4f2c1 MOV 0x18(%R11,%R13,1),%R9 |
(1329) 0x4f2c6 CMP %R8,(%R15,%R9,8) |
(1329) 0x4f2ca JE 4f250 |
(1329) 0x4f2cc INC %RCX |
(1329) 0x4f2cf INCQ 0x8(%RDX,%R8,8) |
(1329) 0x4f2d4 MOV %R8,(%R15,%R9,8) |
(1329) 0x4f2d8 JMP 4f250 |
0x4f2e0 MOV -0x98(%RBP),%RSI |
0x4f2e7 MOV (%RSI,%R8,8),%RDX |
0x4f2eb MOV 0x8(%RSI,%R8,8),%RDI |
0x4f2f0 JMP 4f30f |
(1325) 0x4f300 MOV -0x98(%RBP),%RSI |
(1325) 0x4f307 MOV 0x8(%RSI,%R8,8),%RDI |
(1325) 0x4f30c INC %RDX |
(1325) 0x4f30f CMP %RDI,%RDX |
(1325) 0x4f312 JGE 4efd0 |
(1325) 0x4f318 MOV -0x148(%RBP),%RSI |
(1325) 0x4f31f MOV (%RSI,%RDX,8),%R9 |
(1325) 0x4f323 MOV (%R14),%RSI |
(1325) 0x4f326 DEC %RSI |
(1325) 0x4f329 MOV -0x138(%RBP),%R10 |
(1325) 0x4f330 CMP %RSI,(%R10,%R9,8) |
(1325) 0x4f334 JNE 4f30c |
(1325) 0x4f336 MOV -0x130(%RBP),%RSI |
(1325) 0x4f33d MOV 0x8(%RSI,%R9,8),%RSI |
(1325) 0x4f342 TEST %RSI,%RSI |
(1325) 0x4f345 JLE 4f30c |
(1325) 0x4f347 MOV -0x120(%RBP),%RDI |
(1325) 0x4f34e MOV (%RDI,%R9,8),%RDI |
(1325) 0x4f352 ADD %RDI,%RSI |
(1325) 0x4f355 MOV -0x128(%RBP),%R9 |
(1325) 0x4f35c MOV (%R9),%R9 |
(1325) 0x4f35f JMP 4f378 |
(1326) 0x4f370 INC %RDI |
(1326) 0x4f373 CMP %RSI,%RDI |
(1326) 0x4f376 JGE 4f300 |
(1326) 0x4f378 MOV (%R14),%R10 |
(1326) 0x4f37b MOV (%R9,%R10,8),%R10 |
(1326) 0x4f37f MOV (%R10,%RDI,8),%R10 |
(1326) 0x4f383 TEST %R10,%R10 |
(1326) 0x4f386 JS 4f3b0 |
(1326) 0x4f388 CMP %R8,(%R15,%R10,8) |
(1326) 0x4f38c JE 4f370 |
(1326) 0x4f38e INC %RCX |
(1326) 0x4f391 MOV -0x100(%RBP),%R11 |
(1326) 0x4f398 MOV (%R11),%R11 |
(1326) 0x4f39b INCQ 0x8(%R11,%R8,8) |
(1326) 0x4f3a0 MOV %R8,(%R15,%R10,8) |
(1326) 0x4f3a4 JMP 4f370 |
(1326) 0x4f3b0 NOT %R10 |
(1326) 0x4f3b3 CMP %R8,(%RBX,%R10,8) |
(1326) 0x4f3b7 JE 4f370 |
(1326) 0x4f3b9 INC %RAX |
(1326) 0x4f3bc MOV -0xf8(%RBP),%R11 |
(1326) 0x4f3c3 MOV (%R11),%R11 |
(1326) 0x4f3c6 INCQ 0x8(%R11,%R8,8) |
(1326) 0x4f3cb MOV %R8,(%RBX,%R10,8) |
(1326) 0x4f3cf JMP 4f370 |
/scratch_na/users/xoserete/qaas_runs/171-587-0005/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 917 - 999 |
-------------------------------------------------------------------------------- |
917: for (i=0; i < n_coarse; i++) |
[...] |
939: for (i=thread_start; i < thread_stop; i++) |
940: { |
941: i1 = pass_array[i]; |
942: P_diag_start[i1] = cnt_nz; |
943: P_offd_start[i1] = cnt_nz_offd; |
944: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
945: { |
946: j1 = S_diag_j[j]; |
947: if (assigned[j1] == pass-1) |
948: { |
949: j_start = P_diag_start[j1]; |
950: j_end = j_start+P_diag_i[j1+1]; |
951: for (k=j_start; k < j_end; k++) |
952: { |
953: k1 = P_diag_pass[pass-1][k]; |
954: if (P_marker[k1] != i1) |
955: { |
956: cnt_nz++; |
957: P_diag_i[i1+1]++; |
958: P_marker[k1] = i1; |
959: } |
960: } |
961: j_start = P_offd_start[j1]; |
962: j_end = j_start+P_offd_i[j1+1]; |
963: for (k=j_start; k < j_end; k++) |
964: { |
965: k1 = P_offd_pass[pass-1][k]; |
966: if (P_marker_offd[k1] != i1) |
967: { |
968: cnt_nz_offd++; |
969: P_offd_i[i1+1]++; |
970: P_marker_offd[k1] = i1; |
[...] |
976: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
977: { |
978: j1 = S_offd_j[j]; |
979: if (assigned_offd[j1] == pass-1) |
980: { |
981: j_start = Pext_start[j1]; |
982: j_end = j_start+Pext_i[j1+1]; |
983: for (k=j_start; k < j_end; k++) |
984: { |
985: k1 = Pext_pass[pass][k]; |
986: if (k1 < 0) |
987: { |
988: if (P_marker[-k1-1] != i1) |
989: { |
990: cnt_nz++; |
991: P_diag_i[i1+1]++; |
992: P_marker[-k1-1] = i1; |
993: } |
994: } |
995: else if (P_marker_offd[k1] != i1) |
996: { |
997: cnt_nz_offd++; |
998: P_offd_i[i1+1]++; |
999: P_marker_offd[k1] = i1; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.17 |
Bottlenecks | P2, P3, P11, |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source | par_multi_interp.c:939-944,par_multi_interp.c:947-947,par_multi_interp.c:970-970,par_multi_interp.c:976-976 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 4.67 |
CQA cycles if no scalar integer | 4.67 |
CQA cycles if FP arith vectorized | 4.67 |
CQA cycles if fully vectorized | 0.58 |
Front-end cycles | 4.00 |
DIV/SQRT cycles | 1.00 |
P0 cycles | 0.80 |
P1 cycles | 4.67 |
P2 cycles | 4.67 |
P3 cycles | 2.00 |
P4 cycles | 0.60 |
P5 cycles | 1.00 |
P6 cycles | 2.00 |
P7 cycles | 2.00 |
P8 cycles | 2.00 |
P9 cycles | 0.60 |
P10 cycles | 4.67 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 5.65 |
Stall cycles (UFS) | 1.50 |
Nb insns | 23.00 |
Nb uops | 23.00 |
Nb loads | 14.00 |
Nb stores | 4.00 |
Nb stack references | 9.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 30.86 |
Bytes prefetched | 0.00 |
Bytes loaded | 112.00 |
Bytes stored | 32.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.17 |
Bottlenecks | P2, P3, P11, |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source | par_multi_interp.c:939-944,par_multi_interp.c:947-947,par_multi_interp.c:970-970,par_multi_interp.c:976-976 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 4.67 |
CQA cycles if no scalar integer | 4.67 |
CQA cycles if FP arith vectorized | 4.67 |
CQA cycles if fully vectorized | 0.58 |
Front-end cycles | 4.00 |
DIV/SQRT cycles | 1.00 |
P0 cycles | 0.80 |
P1 cycles | 4.67 |
P2 cycles | 4.67 |
P3 cycles | 2.00 |
P4 cycles | 0.60 |
P5 cycles | 1.00 |
P6 cycles | 2.00 |
P7 cycles | 2.00 |
P8 cycles | 2.00 |
P9 cycles | 0.60 |
P10 cycles | 4.67 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 5.65 |
Stall cycles (UFS) | 1.50 |
Nb insns | 23.00 |
Nb uops | 23.00 |
Nb loads | 14.00 |
Nb stores | 4.00 |
Nb stack references | 9.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 30.86 |
Bytes prefetched | 0.00 |
Bytes loaded | 112.00 |
Bytes stored | 32.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source file and lines | par_multi_interp.c:917-999 |
Module | libparcsr_ls.so |
nb instructions | 23 |
nb uops | 23 |
loop length | 107 |
used x86 registers | 7 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 9 |
micro-operation queue | 4.00 cycles |
front end | 4.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.00 | 0.80 | 4.67 | 4.67 | 2.00 | 0.60 | 1.00 | 2.00 | 2.00 | 2.00 | 0.60 | 4.67 |
cycles | 1.00 | 0.80 | 4.67 | 4.67 | 2.00 | 0.60 | 1.00 | 2.00 | 2.00 | 2.00 | 0.60 | 4.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 5.65 |
Stall cycles | 1.50 |
LM full (events) | 4.95 |
Front-end | 4.00 |
Dispatch | 4.67 |
Overall L1 | 4.67 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x60(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP -0xe0(%RBP),%RDI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 4f3d5 <hypre_BoomerAMGBuildMultipass.extracted.34+0x6b5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xf0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RSI,%RDI,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RDX,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x50(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,(%RDX,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xa0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R8,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP 0x8(%RDX,%R8,8),%RSI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 4f2e0 <hypre_BoomerAMGBuildMultipass.extracted.34+0x5c0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x110(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 4f04d <hypre_BoomerAMGBuildMultipass.extracted.34+0x32d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x98(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI,%R8,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RSI,%R8,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4f30f <hypre_BoomerAMGBuildMultipass.extracted.34+0x5ef> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source file and lines | par_multi_interp.c:917-999 |
Module | libparcsr_ls.so |
nb instructions | 23 |
nb uops | 23 |
loop length | 107 |
used x86 registers | 7 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 9 |
micro-operation queue | 4.00 cycles |
front end | 4.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.00 | 0.80 | 4.67 | 4.67 | 2.00 | 0.60 | 1.00 | 2.00 | 2.00 | 2.00 | 0.60 | 4.67 |
cycles | 1.00 | 0.80 | 4.67 | 4.67 | 2.00 | 0.60 | 1.00 | 2.00 | 2.00 | 2.00 | 0.60 | 4.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 5.65 |
Stall cycles | 1.50 |
LM full (events) | 4.95 |
Front-end | 4.00 |
Dispatch | 4.67 |
Overall L1 | 4.67 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x60(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP -0xe0(%RBP),%RDI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 4f3d5 <hypre_BoomerAMGBuildMultipass.extracted.34+0x6b5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xf0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RSI,%RDI,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RDX,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x50(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,(%RDX,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xa0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%R8,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP 0x8(%RDX,%R8,8),%RSI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 4f2e0 <hypre_BoomerAMGBuildMultipass.extracted.34+0x5c0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x110(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 4f04d <hypre_BoomerAMGBuildMultipass.extracted.34+0x32d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x98(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI,%R8,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RSI,%R8,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4f30f <hypre_BoomerAMGBuildMultipass.extracted.34+0x5ef> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |